公开(公告)号：US07152315B1

公开(公告)日：2006-12-26

申请号：US10826019

申请日：2004-04-17

Applicant: Mohan R. Paruchuri

Inventor： Mohan R. Paruchuri

IPC: H05K3/20

CPC classification number: H05K3/44 ,  H05K3/4038 ,  H05K3/445 ,  H05K2201/0305 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/09554 ,  H05K2203/063 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155

Abstract: A method 10, 80, 81 for making multi-layer electronic circuit boards 77, 137, 139 having metallized apertures 18, 20, 34, 40, 104, 106, 120.

Abstract translation: 一种用于制造具有金属化孔18,20,34,40,104,106,120的多层电子电路板77,137,139的方法10,80,81。

公开(公告)号：US20060141676A1

公开(公告)日：2006-06-29

申请号：US11317179

申请日：2005-12-22

Applicant: Kei Murayama ,  Mitsutoshi Higashi

Inventor： Kei Murayama ,  Mitsutoshi Higashi

IPC: H01L21/50 ,  H01L21/48 ,  H01L21/44

CPC classification number: H01L21/486 ,  H05K3/4038 ,  H05K2201/0305 ,  H05K2201/09572 ,  H05K2203/0278 ,  H05K2203/082

Abstract: To provide a method for producing a semiconductor substrate able to uniformly and quickly fill through-holes in the semiconductor substrate with conductive material. This method comprises a process for forming through-holes (14) in a substrate (10), a process for disposing solder (42) on one surface of the substrate, and a process for pressing the solder on a side of the substrate by a press (40) and heat-melting the solder to fill the through-holes in the substrate with the solder.

Abstract translation: 提供一种能够均匀且快速地用导电材料填充半导体衬底中的通孔的半导体衬底的制造方法。 该方法包括在基板（10）中形成通孔（14）的工艺，在基板的一个表面上设置焊料（42）的工艺，以及用于将基板上的焊料按压 按压（40）并对焊料进行加热熔化，以用焊料填充衬底中的通孔。

公开(公告)号：US20060042824A1

公开(公告)日：2006-03-02

申请号：US11260077

申请日：2005-10-27

Applicant: Masaru Takada ,  Hiroyuki Kobayashi ,  Kenji Chihara ,  Hisashi Minoura ,  Kiyotaka Tsukada ,  Mitsuhiro Kondo

Inventor： Masaru Takada ,  Hiroyuki Kobayashi ,  Kenji Chihara ,  Hisashi Minoura ,  Kiyotaka Tsukada ,  Mitsuhiro Kondo

IPC: H05K5/06

CPC classification number: H01L24/32 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/112 ,  H05K1/116 ,  H05K3/0008 ,  H05K3/0035 ,  H05K3/027 ,  H05K3/242 ,  H05K3/243 ,  H05K3/28 ,  H05K3/3452 ,  H05K3/3457 ,  H05K3/4038 ,  H05K3/421 ,  H05K3/428 ,  H05K3/4602 ,  H05K3/4611 ,  H05K2201/0305 ,  H05K2201/0394 ,  H05K2201/09381 ,  H05K2201/09509 ,  H05K2201/09527 ,  H05K2201/0959 ,  H05K2201/09781 ,  H05K2203/0554 ,  H05K2203/0571 ,  H05K2203/107 ,  H05K2203/175 ,  Y10S428/901 ,  Y10T29/49117 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T428/24917 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: A solder resist comprising a thermosetting resin is printed on a surface of an insulating board (7) having a conductor circuit (6). The solder resist is then heat-cured to form an insulating film (1) having a low thermal expansion coefficient. A laser beam (2) is then applied to the portion of the insulating film in which an opening is to be formed, to burn off the same portion for forming an opening (10), whereby the conductor circuit (6) is exposed. This opening may be formed as a hole for conduction by forming a metal plating film on an inner surface thereof. It is preferable that an external connecting pad be formed so as to cover the opening. The film of coating of a metal is formed by using an electric plating lead, which is preferably cut off by a laser beam after the electric plating has finished.

公开(公告)号：US20050287783A1

公开(公告)日：2005-12-29

申请号：US10879838

申请日：2004-06-29

Applicant: Kyle Kirby ,  Salman Akram ,  David Hembree ,  Sidney Rigg ,  Warren Farnworth ,  William Hiatt

Inventor： Kyle Kirby ,  Salman Akram ,  David Hembree ,  Sidney Rigg ,  Warren Farnworth ,  William Hiatt

IPC: H01L21/44 ,  H01L21/4763 ,  H01L21/768 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H05K1/03 ,  H05K3/40 ,  H05K3/42

CPC classification number: H01L21/76898 ,  H01L23/481 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K1/0306 ,  H05K3/4038 ,  H05K3/422 ,  H05K3/423 ,  H05K2201/0305 ,  H05K2201/09827 ,  H05K2203/072 ,  H05K2203/1147 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Microelectronic devices, methods for packaging microelectronic devices, and methods for forming interconnects in microelectronic devices are disclosed herein. In one embodiment, a method comprises providing a microelectronic substrate having a front side and a backside. The substrate has a microelectronic die including an integrated circuit and a terminal operatively coupled to the integrated circuit. The method also includes forming a passage at least partially through the substrate and having an opening at the front side and/or backside of the substrate. The method further includes sealing the opening with a conductive cap that closes one end of the passage while another end of the passage remains open. The method then includes filling the passage with a conductive material.

Abstract translation: 本文公开了微电子器件，用于封装微电子器件的方法，以及用于在微电子器件中形成互连的方法。 在一个实施例中，一种方法包括提供具有正面和背面的微电子衬底。 衬底具有包括集成电路的微电子管芯和可操作地耦合到集成电路的端子。 该方法还包括至少部分地形成通过基底并且在基底的前侧和/或后侧具有开口的通道。 该方法还包括用封闭通道一端的导电盖密封开口，同时通道的另一端保持打开。 该方法然后包括用导电材料填充通道。

公开(公告)号：US06977441B2

公开(公告)日：2005-12-20

申请号：US10788397

申请日：2004-03-01

Applicant: Nobuaki Hashimoto

Inventor： Nobuaki Hashimoto

IPC: H01L23/538 ,  H05K1/14 ,  H05K1/18 ,  H05K3/00 ,  H05K3/38 ,  H05K3/40 ,  H05K3/46 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H05K3/4691 ,  H01L23/5385 ,  H01L23/5387 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H05K1/141 ,  H05K1/189 ,  H05K3/386 ,  H05K3/4038 ,  H05K3/4084 ,  H05K3/4614 ,  H05K3/4617 ,  H05K3/4652 ,  H05K2201/0195 ,  H05K2201/0305 ,  H05K2201/0394 ,  H05K2203/0195 ,  H01L2224/0401

Abstract: An interconnect substrate including a first substrate on which a first interconnect pattern is formed, having a mounting region for an electronic chip; and a second substrate on which a second interconnect pattern electrically connected to the first interconnect pattern is formed. The second substrate includes a region to which at least a part of the first substrate is adhered, and a mounting region for an electronic chip.

Abstract translation: 一种互连基板，包括：第一基板，其上形成有第一互连图案，具有用于电子芯片的安装区域; 以及第二基板，其上形成有电连接到第一互连图案的第二布线图案。 第二基板包括粘附有第一基板的至少一部分的区域和电子芯片的安装区域。

公开(公告)号：US20050073034A1

公开(公告)日：2005-04-07

申请号：US10622038

申请日：2003-07-17

Applicant: Takashi Takamura

Inventor： Takashi Takamura

IPC: H01L23/12 ,  H01L23/60 ,  H05K1/02 ,  H05K3/34 ,  H01L23/02

CPC classification number: H05K3/3436 ,  H01L23/60 ,  H01L2924/0002 ,  H05K1/0259 ,  H05K2201/0305 ,  H05K2201/10424 ,  H05K2203/175 ,  Y02P70/613 ,  H01L2924/00

Abstract: The present invention provides a package for enclosing a semiconductor chip and having a plurality of terminals, wherein the terminals are connected with each other by a conductive member in a manner that the electrical connection is disabled by an action of mounting the package on a printed circuit board. During storage, the terminals that are connected by a conductive material are in a short-circuited state until such time immediately before the package is mounted on a printed circuit board. This package prevents high voltage that results from static electricity between the terminals from being applied to circuits of the chip during storage or handling. Therefore, the short-circuited state maintained between the terminals is released after the mounting process, with the result that the operation of the semiconductor chip is not obstructed. The mounting of the package on a printed circuit board may be by soldering the terminals, and the conductive members are solder lines or a conductive thin film that are melt during mounding. The mounting may alternatively be by inserting the terminals into sockets, and the conductive members are wires connecting the terminals that are cut during mounting.

Abstract translation: 本发明提供了一种用于封装半导体芯片并具有多个端子的封装，其中端子通过导电构件彼此连接，使得通过将封装安装在印刷电路上的动作来禁用电连接 板。 在存储期间，通过导电材料连接的端子处于短路状态，直到封装安装在印刷电路板之前的时间。 该封装防止由端子之间的静电引起的高电压在存储或处理期间被施加到芯片的电路。 因此，在安装处理之后，端子之间保持的短路状态被释放，结果半导体芯片的操作不被阻碍。 封装在印刷电路板上的安装可以通过焊接端子，并且导电构件是在隆起期间熔化的焊接线或导电薄膜。 安装可以替代地通过将端子插入插座中，并且导电构件是连接在安装期间切割的端子的导线。

公开(公告)号：US06875962B2

公开(公告)日：2005-04-05

申请号：US10466750

申请日：2002-01-17

Applicant: Günther Uhl ,  Steffen Geiger ,  Thomas Alban ,  Thomas Giffels ,  Dirk Wenske ,  Andreas Hamburger ,  Mike Riether

Inventor： Günther Uhl ,  Steffen Geiger ,  Thomas Alban ,  Thomas Giffels ,  Dirk Wenske ,  Andreas Hamburger ,  Mike Riether

IPC: B60H1/03 ,  B60H1/22 ,  H05K1/02 ,  H05K3/38 ,  H05K3/40 ,  H05B3/06

CPC classification number: B60H1/2225 ,  B60H1/034 ,  F24H3/0441 ,  H05K1/0206 ,  H05K3/0061 ,  H05K3/386 ,  H05K3/4038 ,  H05K2201/0305 ,  H05K2201/0382 ,  H05K2201/10166 ,  H05K2201/2036 ,  H05K2203/0315

Abstract: An electric heating system for motor vehicles including one or several electric heating elements; a control circuit provided for controlling the power dissipated by the heating elements; the control circuit including one or several power semiconductors arranged on a circuit board; the circuit board is by means of a solid matter connection connected by the side facing away from the power semiconductors to a metal plate intended to be mass potential; the metal plate being electrically insulated from conductor paths located on the underside of the circuit board and intended to carry a voltage in relation to the ground potential; the control circuit being arranged in a housing. One or several heat sinks are provided outside the housing. The metal plate is connected with the heat sinks arranged outside the housing by thermally conductive connectors.

Abstract translation: 一种用于机动车辆的电加热系统，包括一个或多个电加热元件; 控制电路，用于控制由所述加热元件消耗的功率; 所述控制电路包括布置在电路板上的一个或多个功率半导体; 电路板是借助于一个固体物质的连接方式，该固体物质连接通过一个远离功率半导体的一侧连接到一个意图成为质量电势的金属板; 金属板与位于电路板的下侧上的导体路径电绝缘并且旨在承载相对于地电势的电压; 控制电路布置在壳体中。 一个或多个散热器设置在外壳的外部。 金属板通过导热连接器与布置在壳体外部的散热器连接。

公开(公告)号：US06817094B2

公开(公告)日：2004-11-16

申请号：US10292452

申请日：2002-11-13

Applicant: Ted Ju

Inventor： Ted Ju

IPC: H01R4300

CPC classification number: H05K3/3478 ,  H05K2201/0305 ,  H05K2201/10424 ,  H05K2201/10734 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49222

Abstract: An electric connector and IC tin ball shaping and fixing manufacturing method is used in welding portions of terminals of one of an electric connector, IC and other electronic elements. A tin film is covered on a bottom of the ball grid array seat; wherein the tin film is formed by connecting a plurality of round small tin pieces with respect to the terminals, and a periphery of the small tin pieces being enclosed by slender connecting portions the ball grid array seat is melt so that the small tin pieces of the tin film weld as tin liquid, then the slender connecting portions will break and the small tin pieces are connected as a tin ball; thereby, the liquid tin ball will enclose the welding portion of the terminal. Finally the tin balls is cooled and condensed and then combined to the welding portions of the terminals.

Abstract translation: 电连接器和IC锡球成形和定影制造方法用于电连接器，IC和其它电子元件之一的端子的焊接部分。 锡膜覆盖在球栅阵列座的底部; 其中，所述锡膜通过将多个圆形小锡片相对于所述端子连接而形成，并且所述小锡片的周边由细长的连接部分包围，所述球栅阵列座被熔化，使得所述小锡片 锡膜焊锡为锡液，则细长连接部分断裂，小锡片作为锡球连接; 从而液态锡球将封闭端子的焊接部分。 最后，锡球被冷却并冷凝，然后组合到端子的焊接部分。

公开(公告)号：US06815815B2

公开(公告)日：2004-11-09

申请号：US09991931

申请日：2001-11-26

Applicant: Nobuaki Hashimoto

Inventor： Nobuaki Hashimoto

IPC: H01L2304

CPC classification number: H01L24/10 ,  H01L21/486 ,  H01L21/563 ,  H01L23/13 ,  H01L23/16 ,  H01L23/24 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/562 ,  H01L24/13 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05548 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/8385 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/07811 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15151 ,  H01L2924/15183 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/351 ,  H05K1/112 ,  H05K3/3457 ,  H05K3/386 ,  H05K3/4038 ,  H05K2201/0305 ,  H05K2201/0394 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05647 ,  H01L2224/05099 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: The semiconductor device comprises an insulating film in which penetrating holes are formed, a semiconductor chip having electrodes, a wiring pattern adhered by an adhesive over a region including penetrating holes on one side of the insulating film and electrically connected to the electrodes of the semiconductor chip, and external electrodes provided on the wiring pattern through the penetrating holes and projecting from the surface opposite to the surface of the substrate on which the wiring pattern is formed. Part of the adhesive is drawn in to be interposed between the penetrating holes and external electrodes.

Abstract translation: 半导体器件包括其中形成有穿透孔的绝缘膜，具有电极的半导体芯片，通过粘合剂粘附在包括在绝缘膜的一侧上的穿透孔的区域上的电连接到半导体芯片的电极的布线图案 以及通过贯通孔设置在布线图案上并从与形成布线图案的基板的表面相反的表面突出的外部电极。 粘合剂的一部分被拉入以插入在穿透孔和外部电极之间。

公开(公告)号：US20040099960A1

公开(公告)日：2004-05-27

申请号：US10715736

申请日：2003-11-18

Inventor： Sylvia Adae-Amoakoh ,  John S. Kresge ,  Voya R. Markovich ,  Thurston B. Youngs JR.

IPC: H01L023/48

CPC classification number: H05K3/4069 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H05K1/113 ,  H05K3/061 ,  H05K3/062 ,  H05K3/247 ,  H05K3/3484 ,  H05K3/4038 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/0305 ,  H05K2201/035 ,  H01L2224/0401

Abstract: A flip-chip joinable substrate having non-plated-on contact pads and a method for making the same. The substrate has an external metal foil layer upon a dielectric layer upon a patterned internal metal layer having an internal contact area. An area of the external metal foil layer above the internal contact area is selected. A microvia cavity extending to the internal contact area is perforated centrally within the selected area and is filled with a mass of conductive paste forming an external contact pad. The external contact pad is used as an etch mask for removing the adjacent external metal foil.

Abstract translation: 具有非电镀接触焊盘的倒装芯片可连接基板及其制造方法。 衬底在具有内部接触面积的图案化内部金属层上的介电层上具有外部金属箔层。 选择内部接触区域上方的外部金属箔层的区域。 延伸到内部接触区域的微孔腔在所选择的区域内中心穿孔，并且填充有形成外部接触焊盘的导电浆料块。 外部接触焊盘用作蚀刻掩模以去除相邻的外部金属箔。