公开(公告)号：US06711021B1

公开(公告)日：2004-03-23

申请号：US10342833

申请日：2003-01-15

Applicant: Terrel L. Morris

Inventor： Terrel L. Morris

IPC: H05K720

CPC classification number: H05K7/20154 ,  H01L2224/16225 ,  H01L2924/00014 ,  H05K1/0203 ,  H05K1/14 ,  H05K1/141 ,  H05K3/366 ,  H05K3/368 ,  H05K2201/045 ,  H05K2201/064 ,  H05K2201/10189 ,  H05K2201/10515 ,  H01L2224/0401

Abstract: One embodiment of the invention is a system comprising a first component that generates heat, and a second component that is thermally connected to the first component, wherein the from the first component is transferred to a coolant through the second component, and the second component has a function in the computer system associated with an operation of the system other than transferring heat.

Abstract translation: 本发明的一个实施例是一种包括产生热量的第一部件和与第一部件热连接的第二部件的系统，其中第一部件通过第二部件被传送到冷却剂，而第二部件具有 与计算机系统相关联的功能，除了传递热量之外的系统的操作。

公开(公告)号：US20030230802A1

公开(公告)日：2003-12-18

申请号：US10197986

申请日：2002-07-17

Inventor： Chia Yong Poo ,  Boon Suan Jeung ,  Chua Swee Kwang ,  Low Siu Waf ,  Chan Min Yu ,  Neo Yong Loo

IPC: H01L023/48

CPC classification number: H01L23/13 ,  H01L23/3128 ,  H01L23/49805 ,  H01L25/105 ,  H01L2224/16145 ,  H01L2225/1035 ,  H01L2225/1064 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/19041 ,  H05K1/141 ,  H05K3/3436 ,  H05K3/3442 ,  H05K3/403 ,  H05K2201/045 ,  H05K2201/049 ,  H05K2201/09181 ,  H05K2201/10727

Abstract: A multichip assembly includes semiconductor devices or semiconductor device components with outer connectors on peripheral edges thereof. The outer connectors are formed by creating via holes along boundary lines between adjacent, unsevered semiconductor devices, or semiconductor device components, then plating or filling the holes with conductive material. When adjacent semiconductor devices or semiconductor device components are severed from one another, the conductive material in each via between the semiconductor devices is bisected. The semiconductor devices and components of the multichip assembly may have different sizes, as well as arrays of outer connectors with differing diameters and pitches. Either or both ends of each outer connector may be electrically connected to another aligned outer connector or contact area of another semiconductor device or component. Assembly in this manner provides a low-profile stacked assembly.

公开(公告)号：US20030230801A1

公开(公告)日：2003-12-18

申请号：US10184340

申请日：2002-06-27

Inventor： Tongbi Jiang ,  Setho Sing Fee ,  Tay Wuu Yean ,  Lim Thiam Chye

IPC: H01L023/34

CPC classification number: H01L23/13 ,  H01L23/3128 ,  H01L23/49805 ,  H01L25/105 ,  H01L2224/16145 ,  H01L2225/1035 ,  H01L2225/1064 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/19041 ,  H05K1/141 ,  H05K3/3436 ,  H05K3/3442 ,  H05K3/403 ,  H05K2201/045 ,  H05K2201/049 ,  H05K2201/09181 ,  H05K2201/10727

Abstract: A multidie semiconductor device (MDSCD) package includes a generally planar interposer comprising a substrate with a central receptacle, upper surface conductors, and outer connectors on the lower surface of the interposer. Conductive vias connect upper surface conductors with outer connectors. One or more semiconductor devices may be mounted in the receptacle and one or more other semiconductor devices mounted above and/or below the interposer and attached thereto. The package may be configured to have a footprint not significantly larger than the footprint of the largest device and/or a thickness not significantly greater than the combined thickness of included devices. Methods for assembling and encapsulating packages from multidie wafers and multi-interposer sheets or strips are disclosed. Methods for combining a plurality of packages into a single stacked package are disclosed. The methods may include use of somewhat laterally extending intermediate conductive elements, flip-chip style electrical connection, or both within the same package.

Abstract translation: 多芯片半导体器件（MDSCD）封装包括大体上平面的中介层，其包括具有中心插座的基板，上表面导体以及插入件下表面上的外部连接器。 导电通孔将上表面导体与外部连接器相连。 一个或多个半导体器件可以安装在插座中，以及安装在插入件上方和/或下方并附着于其上的一个或多个其它半导体器件。 封装可以被配置为具有不显着大于最大器件的占地面积和/或不显着大于所包括的器件的组合厚度的厚度。 公开了用于组装和封装来自多芯片晶片和多中介片片或条的封装的方法。 公开了将多个封装组合成单个堆叠封装的方法。 这些方法可以包括在相同封装内使用稍微侧向延伸的中间导电元件，倒装片式电连接或两者。

公开(公告)号：US20030186569A1

公开(公告)日：2003-10-02

申请号：US10278446

申请日：2002-10-23

Inventor： Yukiko Suzuki ,  Katsumi Sakuma ,  Takehiro Seino ,  Keiji Masuda ,  Akihiko Sugata

IPC: H01R012/00

CPC classification number: H05K1/141 ,  H05K1/0243 ,  H05K3/0061 ,  H05K3/3442 ,  H05K3/366 ,  H05K3/403 ,  H05K2201/045 ,  H05K2201/049 ,  H05K2201/0792 ,  H05K2201/09181 ,  H05K2201/1003 ,  H05K2201/10515 ,  H05K2201/10522 ,  H05K2201/10636 ,  Y02P70/611

Abstract: A component mounting structure including a metal base; a first substrate bonded to the upper surface of the metal base; a first wiring pattern formed on the upper surface of the first substrate; a second substrate horizontally mounted on the upper surface of the first substrate so that the lower surface of the second substrate is in contact with the upper surface of the first substrate; a second wiring pattern formed on the second substrate so as to be connected to the first wiring pattern; and a component mounted on the second substrate so as to be connected to the second wiring pattern.

Abstract translation: 一种组件安装结构，包括金属底座; 与所述金属基体的上表面接合的第一基板; 形成在第一基板的上表面上的第一布线图案; 第二基板，其水平地安装在所述第一基板的上表面上，使得所述第二基板的下表面与所述第一基板的上表面接触; 形成在第二基板上以与第一布线图案连接的第二布线图形; 以及安装在第二基板上以与第二布线图形连接的部件。

公开(公告)号：US20030172216A1

公开(公告)日：2003-09-11

申请号：US10093187

申请日：2002-03-07

Inventor： Ralph Gundacker

IPC: G06F013/00

CPC classification number: H05K1/141 ,  H05K2201/045 ,  H05K2201/10159 ,  H05K2201/10689

Abstract: An adapter may have a plurality of sockets secured to a separate card that is in turn secured to the backside of the adapter. As a result, memory modules may be separated from other processor-based components that are positioned on the component side of the adapter. By providing modular sockets for receiving the memory modules, the user may have the option to select the memory that is incorporated on the adapter.

Abstract translation: 适配器可以具有固定到单独的卡的多个插座，该插座又固定到适配器的背面。 结果，存储器模块可以与位于适配器的组件侧上的其他基于处理器的组件分离。 通过提供用于接收存储器模块的模块化插座，用户可以选择选择并入适配器的存储器。

公开(公告)号：US20030068920A1

公开(公告)日：2003-04-10

申请号：US09461065

申请日：1999-12-14

Inventor： CHE-YU LI ,  THOMAS L. SLY ,  WEIMIN SHI

IPC: H01R011/00

CPC classification number: G11C5/143 ,  G11C5/00 ,  H05K1/0203 ,  H05K1/141 ,  H05K3/3447 ,  H05K3/366 ,  H05K2201/045 ,  H05K2201/066 ,  H05K2201/09709 ,  Y10T29/49004

Abstract: The present invention features an ultra high density, high frequency, three-dimensional electronic circuit package suitable for constructing high capacity, high speed computer memory cards and the like. A demountable contact system allows easy test and/or burn-in. A memory card has a number of electrical receptacles adapted to receive a daughter card. The daughter card has memory devices attached to it and a corresponding number of electrical connectors placed along at least one edge, adapted to detachably mate with the electrical receptacles of the memory card. The demountable connectors allow easy rework of the package before optional, permanent solder attach. Bare dies or thin packages are mounted onto daughter cards, which in turn are mounted onto either a motherboard or memory card using pin/hole technology. The daughter cards may be equipped with structures such as ground planes, etc. to minimize electrical noise, control and match impedances and signal path lengths, and maintain signal synchronization (i.e., controlling skew). The inventive memory daughter cards may also contain thermal management structures contacting the chips, which conduct heat away from the chips. Such structures may be constructed by interleaving heat-spreading fins between the individual chip components and/or daughter boards.

Abstract translation: 本发明具有适用于构造高容量，高速计算机存储卡等的超高密度，高频三维电子电路封装。 可拆卸的触点系统允许轻松测试和/或老化。 存储卡具有适于接收子卡的许多电插座。 子卡具有连接到其上的存储器件和沿着至少一个边缘放置的相应数量的电连接器，其适于可拆卸地与存储卡的电插座配合。 可拆卸的连接器允许在可选的永久焊接附着之前容易地对包装进行返工。 子卡上安装裸芯片或薄封装，子卡再次使用针/孔技术安装在主板或存储卡上。 子卡可以配备诸如接地层等的结构，以最小化电噪声，控制和匹配阻抗和信号路径长度，并保持信号同步（即控制偏斜）。 本发明的存储子卡还可以包含接触芯片的热管理结构，其将热量从芯片导出。 这样的结构可以通过在各个芯片部件和/或子板之间交错散热翅片来构造。

公开(公告)号：US20020114726A1

公开(公告)日：2002-08-22

申请号：US10104108

申请日：2002-03-22

Applicant: Hitachi, Ltd.

Inventor： Tasao Soga ,  Hanae Shimokawa ,  Tetsuya Nakatsuka ,  Kazuma Miura ,  Mikio Negishi ,  Hirokazu Nakajima ,  Tsuneo Endoh

IPC: H01L023/48

CPC classification number: H01L24/13 ,  B32B15/01 ,  C22C5/02 ,  C22C9/02 ,  C22C11/06 ,  C22C13/00 ,  H01L21/50 ,  H01L21/56 ,  H01L21/563 ,  H01L23/10 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/4334 ,  H01L23/4924 ,  H01L23/49513 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/97 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/06102 ,  H01L2224/10135 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/29294 ,  H01L2224/29298 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81024 ,  H01L2224/81054 ,  H01L2224/81139 ,  H01L2224/81203 ,  H01L2224/81205 ,  H01L2224/8121 ,  H01L2224/81409 ,  H01L2224/81815 ,  H01L2224/8319 ,  H01L2224/83801 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01088 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/0133 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15738 ,  H01L2924/1576 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/16315 ,  H01L2924/166 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H05K1/141 ,  H05K3/3463 ,  H05K3/3484 ,  H05K2201/0215 ,  H05K2201/045 ,  H05K2201/09572 ,  H05K2201/10636 ,  Y02P70/611 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01031 ,  H01L2924/01026 ,  H01L2924/3512 ,  H01L2924/00015 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929 ,  H01L2224/83205

Abstract: Each of junctions formed between a semiconductor device and a substrate comprises metal balls of Cu, or other materials and compounds of Sn and the metal balls, and the metal balls are bonded together by the compounds.

Abstract translation: 在半导体器件和衬底之间形成的每一个接合点包括Cu的金属球或Sn的其它材料和化合物以及金属球，金属球通过化合物结合在一起。

公开(公告)号：US20020100965A1

公开(公告)日：2002-08-01

申请号：US10000031

申请日：2001-12-04

Applicant: Mitsubishi Denki Kabushiki Kaisha

Inventor： Tetsuya Matsuura ,  Yasushi Kasatani ,  Kazunari Michii ,  Hajime Maeda

IPC: H01L023/02

CPC classification number: H05K1/141 ,  H01L25/105 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2225/1005 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2924/15311 ,  H05K1/144 ,  H05K1/145 ,  H05K1/182 ,  H05K1/183 ,  H05K3/3436 ,  H05K2201/045 ,  H05K2201/049 ,  H05K2201/09036 ,  H05K2201/10303 ,  H05K2201/10378 ,  H05K2201/10386 ,  H05K2201/10515 ,  H05K2201/10689 ,  H05K2203/1572

Abstract: A semiconductor module can be produced that is capable of achieving higher density of the semiconductor module itself as well as of being disposed in an area-efficient manner to another electronic component such as a mother substrate and the like. The semiconductor module includes a mounting substrate having on the underside a solder ball for connecting to the interconnection of a mother substrate and a plurality of semiconductor packages mounted in multiple layers on the surface side of the mounting substrate and connected to electrodes provided on the mounting substrate.

Abstract translation: 可以制造半导体模块，其能够实现半导体模块本身的更高密度以及以区域有效的方式设置到诸如母基板等的另一电子部件。 该半导体模块包括安装基板，其下侧具有焊球，用于连接到母基板和安装在安装基板的表面侧上的多层的多个半导体封装的互连，并连接到设置在安装基板上的电极 。

公开(公告)号：US06392896B1

公开(公告)日：2002-05-21

申请号：US09469372

申请日：1999-12-22

Applicant: Herbert I. Stoller

Inventor： Herbert I. Stoller

IPC: H05K702

CPC classification number: H05K1/141 ,  H01L2224/16225 ,  H01L2924/15311 ,  H05K1/0306 ,  H05K3/366 ,  H05K3/368 ,  H05K2201/045 ,  H05K2201/10159 ,  H05K2201/10734

Abstract: A semiconductor package in which a memory module (a SIMM or DIMM, for example) is mounted edgewise on a ceramic substrate. In another embodiment, a semiconductor package in which a chip scale package is mounted edgewise on a ceramic substrate.

Abstract translation: 存储模块（例如，SIMM或DIMM）沿边缘安装在陶瓷基板上的半导体封装。 在另一个实施例中，其中芯片级封装沿边缘安装在陶瓷衬底上的半导体封装。

公开(公告)号：US6160647A

公开(公告)日：2000-12-12

申请号：US904130

申请日：1997-08-09

Applicant: Patrick B. Gilliland ,  Evgueniy Anguelov

Inventor： Patrick B. Gilliland ,  Evgueniy Anguelov

IPC: H01S5/02 ,  H04B10/155 ,  H05K1/14 ,  H05K3/34 ,  H05K3/36 ,  H04B10/00 ,  H04B10/04

CPC classification number: H05K1/141 ,  H04B10/40 ,  H04B10/504 ,  H04B10/564 ,  H04B10/58 ,  H05K3/3442 ,  H05K3/366 ,  H05K2201/045 ,  H05K2201/10446

Abstract: An optoelectronic transmitter is provided including a semiconductor laser as the active optical transmitting element. The transmitter includes first and second printed circuit boards, with the first printed circuit board having mounted thereon electronic components and circuitry for driving the optoelectronic transmitter. A transmitting optical sub-assembly (TOSA) is mounted to the second printed circuit board. The second printed circuit board has an array of solder pads disposed on the back surface thereof, and the first printed circuit board has a corresponding array of solder pads disposed along an outer edge of the board. Spacing of the solder pads is such that when the first printed circuit board is placed in perpendicular abutment against the outer edge of the first printed circuit board, the solder pads formed on the first printed circuit board are aligned adjacent to the solder pads disposed on the back of the second printed circuit board. Solder joints are then formed in the angular space between the solder pads disposed on the first and second printed circuit boards, bonding the boards together while simultaneously providing electrical connections between the various components mounted on the individual printed circuit boards. An improved control circuit for driving the semiconductor laser transmitter facilitates this arrangement. The improved control circuit provides both automatic power control and laser slope compensation in order to normalize the output characteristics of individual transceivers. An alternate embodiment further includes a laser fault latching circuit for disabling the laser transmitter, and providing laser fault indication.

Abstract translation: 提供了包括半导体激光器作为有源光发射元件的光电发射器。 发射机包括第一和第二印刷电路板，其中第一印刷电路板上安装有用于驱动光电发射机的电子部件和电路。 传输光学子组件（TOSA）安装到第二印刷电路板。 第二印刷电路板具有设置在其背面上的焊盘阵列，并且第一印刷电路板具有沿着板的外边缘设置的相应的焊盘阵列。 焊盘的间距使得当第一印刷电路板被放置成垂直邻接第一印刷电路板的外边缘时，形成在第一印刷电路板上的焊盘邻近布置在第一印刷电路板上的焊盘 第二印刷电路板背面。 然后在布置在第一和第二印刷电路板上的焊盘之间的角度空间中形成焊接点，将板粘合在一起，同时在安装在各个印刷电路板上的各种部件之间提供电连接。 用于驱动半导体激光发射器的改进的控制电路有助于这种布置。 改进的控制电路提供自动功率控制和激光斜率补偿，以便标准化各个收发器的输出特性。 替代实施例还包括用于禁用激光发射器的激光故障锁存电路，以及提供激光故障指示。