公开(公告)号：US20230420295A1

公开(公告)日：2023-12-28

申请号：US18133102

申请日：2023-04-11

Applicant: Applied Materials, Inc.

Inventor： Tsung-Han YANG ,  Xingyao GAO ,  Shiyu YUE ,  Chih-Hsun HSU ,  Shirish PETHE ,  Rongjun WANG ,  Yi XU ,  Wei LEI ,  Yu LEI ,  Aixi ZHANG ,  Xianyuan ZHAO ,  Zhimin QI ,  Jiang LU ,  Xianmin TANG

IPC: H01L21/768 ,  H01L21/285 ,  H01J37/32

CPC classification number: H01L21/76877 ,  H01L21/76876 ,  H01L21/76865 ,  H01L21/2855 ,  H01J2237/338 ,  H01L21/76856 ,  H01L21/76861 ,  H01J37/32899 ,  H01L21/76843

Abstract: A method and apparatus for tungsten gap-fill in semiconductor devices are provided. The method includes performing a gradient oxidation process to oxidize exposed portions of a liner layer, wherein the gradient oxidation process preferentially oxidizes an overhang portion of the liner layer, which obstructs or blocks top openings of one or more features formed within a field region of a substrate. The method further includes performing an etchback process to remove or reduce the oxidized overhang portion of the liner layer, exposing the liner layer to a chemical vapor transport (CVT) process to remove metal oxide remaining from the gradient oxidation process and the etchback process, and performing a tungsten gap-fill process to fill or partially fill the one or more features.

公开(公告)号：US20150255333A1

公开(公告)日：2015-09-10

申请号：US14717375

申请日：2015-05-20

Applicant: APPLIED MATERIALS, INC.

Inventor： Jiang LU ,  Hyoung-Chan HA ,  Paul F. MA ,  Seshadri GANGULI ,  Joseph F. AUBUCHON ,  Sang-ho YU ,  Murali K. NARASIMHAN

IPC: H01L21/768 ,  H01L21/285

CPC classification number: H01L21/76871 ,  C23C16/16 ,  C23C16/18 ,  C23C16/42 ,  C23C16/56 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/28568 ,  H01L21/76846 ,  H01L21/76862 ,  H01L21/76864 ,  H01L21/76873

Abstract: Embodiments of the invention provide processes for depositing a cobalt layer on a barrier layer and subsequently depositing a conductive material, such as copper or a copper alloy, thereon. In one embodiment, a method for depositing materials on a substrate surface is provided which includes forming a barrier layer on a substrate, exposing the substrate to dicobalt hexacarbonyl butylacetylene (CCTBA) and hydrogen to form a cobalt layer on the barrier layer during a vapor deposition process (e.g., CVD or ALD), and depositing a conductive material over the cobalt layer. In some examples, the barrier layer and/or the cobalt layer may be exposed to a gas or a reagent during a treatment process, such as a thermal process, an in situ plasma process, or a remote plasma process.

公开(公告)号：US20250157824A1

公开(公告)日：2025-05-15

申请号：US18947949

申请日：2024-11-14

Applicant: Applied Materials, Inc.

Inventor： Shumao ZHANG ,  Qihao ZHU ,  Liqi WU ,  Chih-Hsun HSU ,  Jiang LU ,  Rongjun WANG

IPC: H01L21/285 ,  C23C16/455 ,  C23C16/458 ,  C23C16/52 ,  H01L21/02

Abstract: Embodiments of the present disclosure generally relate to methods and processes for selectively depositing a metal fill layer into a feature on the surface of a semiconductor structure. In some embodiments, a method of forming a contact structure includes performing a preclean operation on a contact structure to form a precleaned contact structure. The contact structure includes a silicon-based portion exposed in a cavity of a substrate. The method further includes depositing a metal layer over the precleaned contact structure to form a deposited contact structure. The method further includes introducing a metal halide precursor to the deposited contact structure to at least partially remove the second layer from the deposited contact structure to form an etched contact structure. The method further includes depositing a metal fill layer onto the first layer to form a filled contact structure. The deposited metal fill layer comprises a super conformal profile.

公开(公告)号：US20250054812A1

公开(公告)日：2025-02-13

申请号：US18400819

申请日：2023-12-29

Applicant: Applied Materials, Inc.

Inventor： Qihao ZHU ,  Shumao ZHANG ,  Weifeng YE ,  Yiyang WAN ,  Gary HOW ,  Jianqiu GUO ,  Dong WANG ,  Shihchung CHEN ,  Liqi WU ,  Jiang LU

IPC: H01L21/768 ,  H01L23/532 ,  H01L23/535

Abstract: Embodiments include a method of forming a contact structure on a semiconductor substrate. The method including selectively depositing a metal silicide layer over a contact formed within a cavity of a substrate and a bottom surface of the cavity using a selective deposition process, including forming a residual layer on a surface of a dielectric layer forming sidewalls of the cavity, wherein a thickness of the metal silicide layer deposited over the contact is greater than a thickness of the residual layer, removing at least a portion of the residual layer formed on the dielectric layer using an etching process that comprises exposing the metal selectively deposited layer to a metal halide containing precursor, and selectively depositing a metal fill over the metal silicide layer remaining over the contact after removing the at least the portion of the residual layer using a selective metal fill process.

公开(公告)号：US20240371654A1

公开(公告)日：2024-11-07

申请号：US18142940

申请日：2023-05-03

Applicant: Applied Materials, Inc.

Inventor： Qihao ZHU ,  Chi Hong CHING ,  Liqi WU ,  Tsungjui LIU ,  Gaurav THAREJA ,  Xinke WANG ,  Feng Q. LIU ,  Xi CEN ,  Kai WU ,  Yixiong YANG ,  Yuanhung LIU ,  Jiang LU ,  Rongjun WANG ,  Xianmin TANG

IPC: H01L21/3213 ,  H01L21/02 ,  H01L21/768

Abstract: A method of filling a feature in a semiconductor structure with metal includes depositing a metal cap layer on a bottom surface of a feature formed within a dielectric layer and top surfaces of the dielectric layer, partially filling the feature from the bottom surface with a flowable polymer layer, performing a metal pullback process to remove the metal cap layer on the top surfaces of the dielectric layer selectively to the dielectric layer, wherein the metal pullback process includes a first etch process including a chemical etch process using molybdenum hexafluoride (MoF6) to remove the metal cap layer selectively to the dielectric layer, and a second etch process to remove residues on etched surfaces of the dielectric layer, removing the flowable polymer layer, pre-cleaning a surface of the metal cap layer, and filling the feature from the surface of the metal cap layer with metal fill material.

公开(公告)号：US20240105444A1

公开(公告)日：2024-03-28

申请号：US18139590

申请日：2023-04-26

Applicant: Applied Materials, Inc.

Inventor： Jiang LU ,  Liqi WU ,  Wei DOU ,  Weifeng YE ,  Shih Chung CHEN ,  Rongjun WANG ,  Xianmin TANG ,  Yiyang WAN ,  Shumao ZHANG ,  Jianqiu GUO

IPC: H01L21/02 ,  C23C16/04

CPC classification number: H01L21/0217 ,  C23C16/045 ,  H01L21/02274 ,  H01L21/0228

Abstract: Methods for reducing contact resistance include performing a selective titanium silicide (TiSi) deposition process on a middle of the line (MOL) contact structure that includes a cavity in a substrate of dielectric material. The contact structure also includes a silicon-based connection portion at a bottom of the cavity. The selective TiSi deposition process is selective to silicon-based material over dielectric material. The methods also include performing a selective deposition process of a metal material on the MOL contact structure. The selective deposition process is selective to TiSi material over dielectric material and forms a silicide capping layer on the silicon-based connection portion. The methods further include performing a seed layer deposition process of the metal material on the contact structure.

公开(公告)号：US20230377892A1

公开(公告)日：2023-11-23

申请号：US17748329

申请日：2022-05-19

Applicant: Applied Materials, Inc.

Inventor： Yiyang WAN ,  Weifeng YE ,  Shumao ZHANG ,  Gary HOW ,  Jiang LU ,  Lei ZHOU ,  Dien-yeh WU ,  Douglas LONG ,  Avgerinos V. GELATOS ,  Ying-Bing JIANG ,  Rongjun WANG ,  Xianmin TANG ,  Halbert CHONG

IPC: H01L21/285 ,  H01J37/32 ,  C23C16/42 ,  C23C16/507

CPC classification number: H01L21/28518 ,  H01J37/32082 ,  H01J37/3244 ,  H01J37/32357 ,  C23C16/42 ,  C23C16/507 ,  H01J37/32816 ,  H01J2237/332

Abstract: Methods and apparatus for processing a substrate are provided herein. For example, a method for processing a substrate comprises forming a plasma reaction between titanium tetrachloride (TlCl4), hydrogen (H2), and argon (Ar) in a region between a lid heater and a showerhead of a process chamber or the showerhead and a substrate while providing RF power at a pulse frequency of about 5 kHz to about 100 kHz and at a duty cycle of about 10% to about 20% and flowing reaction products into the process chamber to selectively form a titanium material layer upon a silicon surface of the substrate.

公开(公告)号：US20230343645A1

公开(公告)日：2023-10-26

申请号：US18128389

申请日：2023-03-30

Applicant: Applied Materials, Inc.

Inventor： Meng-Shan WU ,  Chih-Hsun HSU ,  Jiang LU ,  Shiyu YUE ,  Chun-chieh WANG ,  Annamalai LAKSHMANAN ,  Yixiong YANG

IPC: H01L21/768 ,  H01L23/532

CPC classification number: H01L21/76879 ,  H01L21/76871 ,  H01L21/76843 ,  H01L23/53266 ,  H01L21/76865 ,  H01L21/76831

Abstract: A method and apparatus for a gap-fill in semiconductor devices are provided. The method includes forming a metal seed layer on exposed top surface of the substrate, wherein the substrate has features in the form of trenches or vias formed in the top surface of the substrate, the features having sidewalls and a bottom surface extending between the sidewalls. A gradient oxidation process is performed to oxidize exposed portions of the metal seed layer to form a metal oxide, wherein the gradient oxidation process preferentially oxidizes a field region of the substrate over the bottom surface of the features. An etch back process removes the oxidized portion of the seed layer. A second etch process removes portions of the seed layer. A metal gap-fill process fills or partially fills the features with a gap fill material.