Dummy core plus plating resist restrict resin process and structure

    公开(公告)号:US10321560B2

    公开(公告)日:2019-06-11

    申请号:US14995087

    申请日:2016-01-13

    Abstract: A printed circuit board (PCB) has multiple layers, where select portions of inner layer circuitry, referred to as inner core circuitry, are exposed from the remaining layers. The PCB having an exposed inner core circuitry is formed using a dummy core plus plating resist process. The select inner core circuitry is part of an inner core. The inner core corresponding to the exposed inner core circuitry forms a semi-flexible PCB portion. The semi-flexible PCB portion is an extension of the remaining adjacent multiple layer PCB. The remaining portion of the multiple layer PCB is rigid. The inner core is common to both the semi-flexible PCB portion and the remaining rigid PCB portion.

    Disconnect cavity by plating resist process and structure

    公开(公告)号:US10292279B2

    公开(公告)日:2019-05-14

    申请号:US15159665

    申请日:2016-05-19

    Abstract: A disconnect cavity is formed within a PCB, where the disconnect cavity is electrically disconnected from a PCB landing layer. The disconnect cavity is formed using a plating resist process which does not require low flow prepreg nor selective copper etching. Plating resist is printed on a core structure selectively positioned within a PCB stack-up. The volume occupied by the plating resist forms a subsequently formed disconnect cavity. After lamination of the PCB stack-up, depth control milling, drilling and electroless copper plating are performed, followed by a plating resist stripping process to substantially remove the plating resist and all electroless copper plated to the plating resist, thereby forming the disconnect cavity. In a subsequent copper plating process, without electric connectivity copper cannot be plated to the side walls and bottom surface of the disconnect cavity, resulting in the disconnect cavity wall being electrically disconnected from the PCB landing layer.

    DUMMY CORE RESTRICT RESIN PROCESS AND STRUCTURE

    公开(公告)号:US20170238416A1

    公开(公告)日:2017-08-17

    申请号:US15064437

    申请日:2016-03-08

    Inventor: JL Zhou Pui Yin Yu

    CPC classification number: H05K3/4691 H05K2201/09781 H05K2203/308

    Abstract: A printed circuit board (PCB) has multiple layers, where select portions of inner layer circuitry, referred to as inner core circuitry, are covered by a coverlay material and the covered inner core circuitry is exposed from the remaining layers of the PCB. The PCB having covered inner core circuitry is formed using a dummy core plus coverlay process. The select inner core circuitry is part of an inner core. The inner core corresponding to the covered inner core circuitry forms a flexible PCB portion. The flexible PCB portion is an extension of the remaining adjacent multiple layer PCB. The remaining portion of the multiple layer PCB is rigid. The inner core is common to both the flexible PCB portion and the remaining rigid PCB portion.

    RESIN FLOW RESTRICTION PROCESS AND STRUCTURE

    公开(公告)号:US20210385952A1

    公开(公告)日:2021-12-09

    申请号:US16946712

    申请日:2020-07-01

    Abstract: A printed circuit board includes a first and second core. The first core has a first conductive layer, a first non-conductive layer, a first copper layer and a first opening. The first core also has a first solder mask connected to the first copper layer and a first FR4 laminate bonded to the first solder mask. The second core has a second conductive layer, a second non-conductive layer, a second copper layer and a second opening. The second core also has a second solder mask connected to the second copper layer and a second FR4 laminate bonded to the second solder mask. A prepreg layer is between the first copper layer and the second copper layer but not between the first FR4 laminate and the second FR4 laminate.

    PCB with coin and dielectric layer
    15.
    发明授权

    公开(公告)号:US11122674B1

    公开(公告)日:2021-09-14

    申请号:US16946711

    申请日:2020-07-01

    Abstract: A printed circuit board includes a first, second, and third conductive layer. The printed circuit boards also includes a first non-conductive layer between the first and second conductive layers and a second non-conductive layer between the second and third conductive layers. The printed circuit board further includes a dielectric layer between the second conductive layer and the second non-conductive layer and a coin for heat dispersion located underneath the dielectric layer. The printed circuit board also includes a cavity for receiving a component and a plating within the cavity to connect the coin with the second conductive layer. The plating extends less than 50 um above the second conductive layer.

    Rigid-bend printed circuit board fabrication

    公开(公告)号:US09992880B2

    公开(公告)日:2018-06-05

    申请号:US14995139

    申请日:2016-01-13

    Abstract: A printed circuit board (PCB) has multiple layers, where select portions of one or more conductive layers, referred to as core circuitry, form a semi-flexible PCB portion that is protected by an exposed prepreg layer. The semi-flexible PCB portion having an exposed prepreg layer is formed using a dummy core process that leaves the exposed prepreg layer smooth and undamaged. The core circuitry is part of a core structure. The semi-flexible PCB portion is an extension of the remaining adjacent multiple layer PCB. The remaining portion of the multiple layer PCB is rigid. The core structure is common to both the semi-flexible PCB portion and the remaining rigid PCB portion.

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