Abstract:
In one embodiment, a method of forming an out-of-plane electrode includes forming an oxide layer above an upper surface of a device layer, etching an etch stop perimeter defining trench extending through the oxide layer, forming a first cap layer portion on an upper surface of the oxide layer and within the etch stop perimeter defining trench, etching a first electrode perimeter defining trench extending through the first cap layer portion and stopping at the oxide layer, depositing a first material portion within the first electrode perimeter defining trench, depositing a second cap layer portion above the deposited first material portion, and vapor releasing a portion of the oxide layer with the etch stop portion providing a lateral etch stop.
Abstract:
A method for manufacturing MEMS structures having at least one functional layer of silicon that contains structures that are exposed by removing a sacrificial layer, at least one sacrificial layer and at least one functional layer being deposited such that they grow in a monocrystalline manner, and the sacrificial layer is made up of a silicon-germanium mixed layer.
Abstract:
A movable mass forming a seismic mass is formed starting from an epitaxial layer and is covered by a weighting region of tungsten which has high density. To manufacture the mass, buried conductive regions are formed in the substrate. Then, at the same time, a sacrificial region is formed in the zone where the movable mass is to be formed and oxide insulating regions are formed on the buried conductive regions so as to partially cover them. An epitaxial layer is then grown, using a nucleus region. A tungsten layer is deposited and defined and, using a silicon carbide layer as mask, the suspended structure is defined. Finally, the sacrificial region is removed, forming an air gap.
Abstract:
A method for creating a semiconductor structure is provided. In accordance with the method, a semiconductor substrate (101) is provided over which is disposed a sacrificial layer (103), and which has a thin single crystal semiconductor layer (105) disposed over the sacrificial layer (103). An opening (107) is then created which extends through the semiconductor layer (105) and into the sacrificial layer (103). The semiconductor layer (105) is then epitaxially grown to a suitable device thickness, thereby resulting in a device layer. The semiconductor layer is grown such that the resulting device layer extends over the opening (107), and such that the surface of the portion of the device layer extending over the opening is single crystal silicon.
Abstract:
A semiconductor component for a semiconductor substrate, in which a first section and a second section are provided, and in which the pore structure of the first section differs from the pore structure of the second section.
Abstract:
The method is based on the use of a silicon carbide mask for removing a sacrificial region. In case of manufacture of integrated semiconductor material structures, the following steps are performed: forming a sacrificial region of silicon oxide on a substrate of semiconductor material; growing a pseudo-epitaxial layer; forming electronic circuit components; depositing a silicon carbide layer; defining photolithographically the silicon carbon layer so as to form an etching mask containing the topography of a microstructure to be formed; with the etching mask, forming trenches in the pseudo-epitaxial layer as far as the sacrificial region so as to laterally define the microstructure; and removing the sacrificial region through the trenches.
Abstract:
A semiconductor component. The semiconductor component has a semiconductor substrate, an insulation layer, and a first monocrystalline silicon layer. The insulation layer is arranged on the semiconductor substrate, and the first monocrystalline silicon layer is arranged on the insulation layer and at least one first region that extends starting from the first monocrystalline silicon layer up to a surface of the semiconductor substrate. The at least one first region includes second monocrystalline silicon.
Abstract:
A process for fabricating a suspended microelectromechanical system (MEMS) structure comprising epitaxial semiconductor functional layers that are partially or completely suspended over a substrate. A sacrificial release layer and a functional device layer are formed on a substrate. The functional device layer is etched to form windows in the functional device layer defining an outline of a suspended MEMS device to be formed from the functional device layer. The sacrificial release layer is then etched with a selective release etchant to remove the sacrificial release layer underneath the functional layer in the area defined by the windows to form the suspended MEMS structure.
Abstract:
A process for fabricating a suspended microelectromechanical system (MEMS) structure comprising epitaxial semiconductor functional layers that are partially or completely suspended over a substrate. A sacrificial release layer and a functional device layer are formed on a substrate. The functional device layer is etched to form windows in the functional device layer defining an outline of a suspended MEMS device to be formed from the functional device layer. The sacrificial release layer is then etched with a selective release etchant to remove the sacrificial release layer underneath the functional layer in the area defined by the windows to form the suspended MEMS structure.
Abstract:
A method of manufacturing a microphone using epitaxially grown silicon. A monolithic wafer structure is provided. A wafer surface of the structure includes poly-crystalline silicon in a first horizontal region and mono-crystalline silicon in a second horizontal region surrounding a perimeter of the first horizontal region. A hybrid silicon layer is epitaxially deposited on the wafer surface. Portions of the hybrid silicon layer that contact the poly-crystalline silicon use the poly-crystalline silicon as a seed material and portions that contact the mono-crystalline silicon use the mono-crystalline silicon as a seed material. As such, the hybrid silicon layer includes both mono-crystalline silicon and poly-crystalline silicon in the same layer of the same wafer structure. A CMOS/membrane layer is then deposited on top of the hybrid silicon layer.