公开(公告)号：US12122668B2

公开(公告)日：2024-10-22

申请号：US17858855

申请日：2022-07-06

Applicant: Brookhaven Science Associates, LLC

Inventor： Charles T. Black ,  Atikur Rahman ,  Matthew Eisaman ,  Ahsan Ashraf

IPC: B81C1/00 ,  B82Y30/00 ,  B82Y40/00 ,  G02B1/118 ,  G03F7/00 ,  G03F7/40 ,  H01L21/027 ,  H01L21/033 ,  H01L21/3065 ,  H01L21/308 ,  H01L31/0236

CPC classification number: B81C1/00031 ,  B81C1/00111 ,  B82Y30/00 ,  G02B1/118 ,  G03F7/0002 ,  G03F7/405 ,  H01L21/0271 ,  H01L21/0273 ,  H01L21/0337 ,  H01L21/3065 ,  H01L21/3086 ,  H01L31/02363 ,  B81C2201/0132 ,  B81C2201/0149 ,  B82Y40/00 ,  H01J2237/334 ,  Y02E10/50

Abstract: Methods for etching nanostructures in a substrate include depositing a patterned block copolymer on the substrate, the patterned block copolymer including first and second polymer block domains, applying a precursor to the patterned block copolymer to generate an infiltrated block copolymer, the precursor infiltrating into the first polymer block domain and generating a material in the first polymer block domain, applying a removal agent to the infiltrated block copolymer to generate a patterned material, the removal agent removing the first and second polymer block domains from the substrate, and etching the substrate, the patterned material on the substrate masking the substrate to pattern the etching. The etching may be performed under conditions to produce nanostructures in the substrate.

公开(公告)号：US20240347323A1

公开(公告)日：2024-10-17

申请号：US18301126

申请日：2023-04-14

Applicant: VELVETCH LLC

Inventor： David Irwin Margolese ,  William Andrew Goddard ,  Stewart Francis Sando ,  Samir John Anz

IPC: H01J37/32 ,  H03H7/38

CPC classification number: H01J37/32715 ,  H01J37/32027 ,  H01J37/32045 ,  H03H7/38 ,  H01J2237/0044 ,  H01J2237/0458 ,  H01J2237/2007 ,  H01J2237/334

Abstract: A composite stage for electron enhanced material processing is presented. The composite stage provides capacitive coupling of a biasing signal to a substrate supported by the composite stage. The composite stage comprises a pedestal and a support plate that includes stacked layer construction. The stacked layer construction includes a plurality of layers of electrically conductive and dielectric materials. According to one aspect, the plurality of layers includes at least one electrically conductive layer for receiving a basing signal, and at least one dielectric layer in contact with and overlying the at least one electrically conductive layer. According to one aspect, the substrate is held in place via an electrically insulating clamp, the clamp providing an aperture for processing of a portion of the substrate. A matching circuit is arranged between a biasing signal generator and the composite stage. A shunting resistor is coupled to the matching circuit.

公开(公告)号：US20240339302A1

公开(公告)日：2024-10-10

申请号：US18206456

申请日：2023-06-06

Applicant: Applied Materials, Inc.

Inventor： Yogananda Sarode Vishwanath ,  Andrew Nguyen ,  Tom K. Cho

IPC: H01J37/32 ,  B33Y80/00

CPC classification number: H01J37/32449 ,  B33Y80/00 ,  H01J2237/334

Abstract: Systems, methods, and apparatus including designs embodied in machine-readable media for a gas break used in semiconductor processing systems. The apparatus includes a gas break structure comprising an insulating material and having one or more gas flow paths formed within a body of the gas break structure, the gas break structure configured to provide a specified impedance when coupled between a grounded gas distribution manifold and an electrically charged gas delivery nozzle, the gas break structure further comprising an internal structure having a specified geometry comprising a repeating structure and one or more empty gaps between elements of the repeating structure. The gas break can be formed using additive manufacturing.

公开(公告)号：US20240339297A1

公开(公告)日：2024-10-10

申请号：US18296944

申请日：2023-04-06

Applicant: Tokyo Electron Limited

Inventor： Qiang Wang ,  Peter Lowell George Ventzek ,  Shyam Sridhar ,  Mitsunori Ohata

IPC: H01J37/32 ,  H03H7/38

CPC classification number: H01J37/32183 ,  H01J37/32091 ,  H01J37/3211 ,  H03H7/38 ,  H01J37/32155 ,  H01J2237/24564 ,  H01J2237/334

Abstract: An embodiment matching circuit for a plasma tool includes an impedance matching network configured to be coupled between a power supply and an antenna of a plasma chamber. The power supply is configured to provide power to and excite the antenna at a first frequency to generate a plasma. The impedance matching network is configured such that, during operation of the plasma chamber at the first frequency, a phase angle between a voltage and a current in the impedance matching network is matched to be 0°, and an impedance of the impedance matching network and the plasma chamber equals an impedance of the power supply. The impedance matching network includes a first adjustable reactive component; and a first fixed-length transmission line coupled between the first adjustable reactive component and an input of the antenna.

公开(公告)号：US20240331978A1

公开(公告)日：2024-10-03

申请号：US18740007

申请日：2024-06-11

Applicant: Tokyo Electron Limited

Inventor： Chishio KOSHIMIZU

IPC: H01J37/32

CPC classification number: H01J37/32183 ,  H01J37/32568 ,  H01J37/32642 ,  H01J37/32715 ,  H01J2237/2007 ,  H01J2237/334

Abstract: The disclosed plasma processing apparatus includes a chamber, a substrate support, a radio frequency power source, and a bias power source. The radio frequency power source generates radio frequency power to generate plasma. The bias power source is connected to a bias electrode of the substrate support, and generates an electric bias. An edge ring mounted on the substrate support receives a part of the electric bias through an impedance adjuster or receives another electric bias. An outer ring extends outside the edge ring in a radial direction, and receives a part of the radio frequency power or other radio frequency power.

公开(公告)号：US12100601B2

公开(公告)日：2024-09-24

申请号：US18257751

申请日：2021-12-15

Applicant: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.

Inventor： Yu Zhang ,  Aki Akiba ,  Zhaocheng Liu

IPC: H01L21/311 ,  B08B5/00 ,  B08B9/00 ,  H01J37/32 ,  H01L21/3105

CPC classification number: H01L21/31144 ,  B08B5/00 ,  B08B9/00 ,  H01J37/32449 ,  H01L21/31058 ,  H01L21/31116 ,  H01J2237/334

Abstract: Embodiments of the present disclosure provide an etching method with a metal hard mask. The method is performed on a wafer surface and includes sequentially forming a metal hard mask layer and at least one functional film layer on a wafer surface in a direction away from the wafer surface. The method includes performing a plurality of etching processes on the at least one functional layer and the metal hard mask layer sequentially in a direction close to the wafer surface. An etching gas adopted by at least one etching process includes a hydrogen element and a fluorine element. A ratio of a content of the hydrogen element in the etching gas to a content of the fluorine element in the etching gas is smaller than a predetermined threshold to reduce generation of a byproduct of hydrogen fluorine.

公开(公告)号：US12094691B2

公开(公告)日：2024-09-17

申请号：US17369838

申请日：2021-07-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Yen Chang ,  Yu-Tien Shen ,  Chih-Kai Yang ,  Ya-Hui Chang ,  Shih-Ming Chang

IPC: H01J37/32 ,  H01L21/68 ,  H01L21/683

CPC classification number: H01J37/32623 ,  H01J37/32715 ,  H01J37/32935 ,  H01L21/68 ,  H01L21/6833 ,  H01J2237/334

Abstract: The current disclosure includes a plasma etching system that includes a movable plasma source and a moveable wafer stage. A relative position between the movable plasma source and the movable wafer stage can be varied to set up an angle along which plasma particles of the plasma hits a wafer positioned on the wafer stage.

公开(公告)号：US12094689B2

公开(公告)日：2024-09-17

申请号：US16932794

申请日：2020-07-19

Applicant: Applied Materials, Inc.

Inventor： Sai Susmita Addepalli ,  Yue Chen ,  Abhigyan Keshri ,  Qiang Ma ,  Zhijun Jiang ,  Shailendra Srivastava ,  Daemian Raj Benjamin Raj ,  Ganesh Balasubramanian

IPC: H01J37/32 ,  C23C16/40 ,  C23C16/44 ,  C23C16/50 ,  H01L21/67

CPC classification number: H01J37/32449 ,  C23C16/401 ,  C23C16/4412 ,  C23C16/50 ,  H01J37/32357 ,  H01J2237/332 ,  H01J2237/334 ,  H01L21/67069

Abstract: Exemplary semiconductor processing systems may include a processing chamber including a lid stack having an output manifold. The systems may include a gas panel. The systems may include an input manifold. The input manifold may fluidly couple the gas panel with the output manifold of the processing chamber. A delivery line may extend from the input manifold to the output manifold. The systems may include a first transmission line extending from a first set of precursor sources of the gas panel to the delivery line. The systems may include a second transmission line extending from a second set of precursor sources of the gas panel to the delivery line. The second transmission line may be switchably coupled between the delivery line and an exhaust of the semiconductor processing system.

公开(公告)号：US20240304422A1

公开(公告)日：2024-09-12

申请号：US18668480

申请日：2024-05-20

Applicant: Applied Materials, Inc.

Inventor： Sandip NIYOGI ,  Wei LIU ,  Dileep Venkata Sai VADLADI ,  Lily HUANG

IPC: H01J37/32 ,  H01L21/02

CPC classification number: H01J37/32449 ,  H01J37/321 ,  H01J37/32357 ,  H01J37/32724 ,  H01L21/02164 ,  H01L21/0228 ,  H01J2237/334

Abstract: Embodiments of the present disclosure generally relate to inductively coupled plasma sources and plasma processing apparatus. In at least one embodiment, a plasma processing method includes introducing a gas including helium and nitrogen into a gas injection channel of a plasma source. The method includes generating a plasma within the gas injection channel. The plasma includes helium radicals and nitrogen radicals. The method includes delivering the plasma from the plasma source to a process chamber including a substrate. The method includes producing a treated substrate by processing the substrate with the plasma within the process chamber, in which processing the substrate includes contacting the plasma including the helium radicals and nitrogen radicals with a first side of the substrate.

公开(公告)号：US12087557B2

公开(公告)日：2024-09-10

申请号：US17016888

申请日：2020-09-10

Applicant: LAM RESEARCH CORPORATION

Inventor： Shen Peng ,  Tamarak Pandhumsoporn ,  Anthony Nguyen ,  Dan Marohl

IPC: H01L21/306 ,  C23C16/00 ,  H01J37/32 ,  H01L21/67 ,  H10N30/082

CPC classification number: H01J37/32651 ,  H01J37/321 ,  H01J37/3211 ,  H01J37/32174 ,  H01J37/32183 ,  H01J37/32477 ,  H01J37/32504 ,  H01J37/32715 ,  H01L21/67069 ,  H01J2237/334 ,  H10N30/082

Abstract: A substrate processing system includes a processing chamber including a dielectric window and a substrate support arranged therein to support a substrate. A coil is arranged outside of the processing chamber adjacent to the dielectric window. A Faraday shield is arranged between the coil and the dielectric window. An RF generator is configured to supply RF power to the coil. The coil is coupled by stray capacitance and/or directly coupled to the Faraday shield. A capacitor is connected to one of the coil and the Faraday shield to adjust a position of a voltage standing wave along the coil.