公开(公告)号：US4339305A

公开(公告)日：1982-07-13

申请号：US231712

申请日：1981-02-05

Applicant: Addison B. Jones

Inventor： Addison B. Jones

IPC: H01F41/34 ,  H01L21/48 ,  H05K1/03 ,  H05K3/00 ,  H05K3/04 ,  H05K3/10 ,  H05K3/24 ,  H05K3/46 ,  B44C1/22 ,  B29C17/08 ,  C03C15/00 ,  C03C25/06

CPC classification number: H01L21/4846 ,  H01F41/34 ,  H05K3/107 ,  H05K1/0306 ,  H05K2201/0347 ,  H05K2201/0376 ,  H05K2201/09036 ,  H05K2203/072 ,  H05K3/002 ,  H05K3/0041 ,  H05K3/048 ,  H05K3/244 ,  H05K3/4661

Abstract: The method of manufacturing predetermined microcircuit conductor patterns, which includes forming on the surface plane of a substrate a layer of insulator material, forming a layer of resist on the layer of insulator material, patterning the layer of resist to define a channel pattern, etching the channel pattern with relatively overwide channels, conditioning the channel bases to receive plating material, and thereafter filling the overwide channels with the plating material to a height at least substantially co-planar with the insulator material to define the predetermined conductor patterns, removing the mask and plated material thereon to uncover completely the conductor pattern.

Abstract translation: 制造预定微电路导体图案的方法包括在绝缘体材料层上形成绝缘体材料层，在绝缘体材料层上形成抗蚀剂层，图案化抗蚀剂层以限定沟道图案，蚀刻 通道图案具有相对超范围的通道，调节通道基底以接收电镀材料，然后用电镀材料填充超宽通道至与绝缘体材料至少基本共面的高度，以限定预定导体图案，去除掩模和 在其上镀覆材料以完全揭露导体图案。

公开(公告)号：US4184729A

公开(公告)日：1980-01-22

申请号：US841917

申请日：1977-10-13

Applicant: Howard L. Parks ,  John M. Kuronen

Inventor： Howard L. Parks ,  John M. Kuronen

IPC: H05K1/00 ,  H05K3/28 ,  H05K3/40 ,  H05K3/42 ,  H05K3/46 ,  H05K1/12 ,  H05K3/36

CPC classification number: H01R12/62 ,  H05K3/4007 ,  H05K1/0393 ,  H05K2201/0347 ,  H05K2201/0355 ,  H05K2201/0367 ,  H05K2201/0394 ,  H05K2201/09336 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2203/1572 ,  H05K3/281 ,  H05K3/423 ,  H05K3/4647 ,  Y10T29/49126

Abstract: A flexible connector cable for providing high density and reliable electrical interconnections between printed circuit boards or any other surfaces having conductive paths that need connection to conductive paths on adjacent surfaces. The connector cable comprises a flat flexible laminar structure including an electrically-insulative layer and an electrically-conductive layer. The insulative layer is typically formed on a bonded plastic such as Polyimide and the conductive layer is typically formed of copper. Openings are formed in the insulative layer to expose the conductive layer and raised contacts or buttons are deposited on the conductive layer on both surfaces of the cable. The raised contacts are formed of ductile conductive material which exhibits plastic deformation under pressure to form good electrical connections.

Abstract translation: 一种柔性连接器电缆，用于在印刷电路板或具有需要连接到相邻表面上的导电路径的导电路径的任何其它表面之间提供高密度和可靠的电互连。 连接器电缆包括包括电绝缘层和导电层的扁平柔性层状结构。 绝缘层通常形成在诸如聚酰亚胺的粘结塑料上，并且导电层通常由铜形成。 在绝缘层中形成开口以暴露导电层，并且将凸起的触点或按钮沉积在电缆的两个表面上的导电层上。 凸起的触点由韧性导电材料形成，其在压力下表现出塑性变形以形成良好的电连接。

公开(公告)号：US4121007A

公开(公告)日：1978-10-17

申请号：US713317

申请日：1976-08-10

Applicant: Hidehiko Kobayashi ,  Tatsumi Arakawa ,  Tetsuo Shiga ,  Kaoru Ohmura ,  Sakae Ito

Inventor： Hidehiko Kobayashi ,  Tatsumi Arakawa ,  Tetsuo Shiga ,  Kaoru Ohmura ,  Sakae Ito

IPC: H05K1/03 ,  H05K3/02 ,  H05K3/10 ,  H05K3/18 ,  H05K3/24 ,  H05K3/38 ,  H01K3/18

CPC classification number: H05K1/036 ,  H05K3/02 ,  H05K3/102 ,  H05K3/185 ,  H05K2201/0129 ,  H05K2201/0347 ,  H05K2203/107 ,  H05K2203/1142 ,  H05K3/027 ,  H05K3/246 ,  H05K3/387 ,  Y10S428/901 ,  Y10T428/24835 ,  Y10T428/24851 ,  Y10T428/24975

Abstract: A novel printed circuit board with a circuit of high precision having a polymer coat layer between a base and a dispersion imaging material layer and a pattern circuit on undispersed portions of the dispersion imaging material layer. Such a printed circuit board is prepared by a simplified process which comprises essentially two steps, namely, exposure of the dispersion imaging material through a circuit pattern mask to obtain a pattern circuit of the unexposed portions and conductive metal plating wherein said unexposed portions are selectively deposited with the conductive metal due to the specific effect of provision of the polymer coat layer directly under the dispersion imaging material layer.

Abstract translation: 一种具有高精度电路的新型印刷电路板，其在基底和分散成像材料层之间具有聚合物涂层，并且在分散成像材料层的未分散部分上具有图案电路。 这样的印刷电路板通过简单的工艺制备，其包括基本上两个步骤，即通过电路图案掩模曝光分散成像材料，以获得未曝光部分和导电金属电镀的图案电路，其中所述未曝光部分被选择性沉积 与导电金属由于在分散成像材料层下面提供聚合物涂层的具体效果。

公开(公告)号：US3773514A

公开(公告)日：1973-11-20

申请号：US3773514D

申请日：1971-08-12

Applicant: FROMSON H A

Inventor： FROMSON H

IPC: H05K3/00 ,  H05K3/04 ,  H05K3/10 ,  H05K3/14 ,  H05K3/18 ,  H05K3/38 ,  G03C1/94

CPC classification number: H05K3/108 ,  H05K3/0023 ,  H05K3/048 ,  H05K3/146 ,  H05K3/185 ,  H05K3/388 ,  H05K2201/0347 ,  H05K2203/072 ,  Y10S430/167

Abstract: A light-sensitive composite especially useful in the printing and electronic circuit arts includes a substrate, a soluble light-sensitive coating thereon which becomes insoluble upon exposure to actinic radiation, or vice versa, and an ultra-thin tough, wear-resistant protective coating over the light-sensitive coating which will transmit actinic radiation for altering the solubility of areas of the light-sensitive coating and which is permeable to solvents for dissolving and removing areas of the light-sensitive coating which remain soluble after exposure to actinic radiation. The preferred protective coating is a vacuum deposited metal coating which is useful per se or provides a basis for further metal coatings such as electroless and electrolytic deposited metal coatings.

Abstract translation: 特别适用于印刷和电子电路领域的光敏复合材料包括基材，其上可溶的光敏涂层，其在曝露于光化辐射下变得不溶，反之亦然，以及超薄韧性耐磨保护涂层 在光敏涂层上，其将透射光化辐射以改变感光涂层的区域的溶解度，并且其可透过溶剂溶解并除去在曝光于光化辐射之后保持可溶的感光涂层的区域。 优选的保护涂层是真空沉积的金属涂层，其本身是有用的，或者为进一步的金属涂层如无电镀和电解沉积金属涂层提供基础。

公开(公告)号：US3548494A

公开(公告)日：1970-12-22

申请号：US3548494D

申请日：1968-01-31

Applicant: WESTERN ELECTRIC CO

Inventor： HARING ALLEN R

IPC: H01L21/48 ,  H01L23/498 ,  H05K1/03 ,  H05K1/09 ,  H05K3/24 ,  H05K3/30

CPC classification number: H01L23/49838 ,  H01L21/4846 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K1/092 ,  H05K3/242 ,  H05K3/246 ,  H05K2201/0347 ,  H05K2201/09027 ,  H05K2201/09727 ,  H05K2203/1115 ,  H05K2203/175 ,  Y10T29/435 ,  Y10T29/49099 ,  Y10T29/49107 ,  Y10T29/49128 ,  Y10T29/49156 ,  Y10T29/49799 ,  Y10T29/49982 ,  H01L2924/00

公开(公告)号：US3506482A

公开(公告)日：1970-04-14

申请号：US3506482D

申请日：1967-04-25

Applicant: MATSUSHITA ELECTRIC IND CO LTD

Inventor： HIROHATA HYOGO ,  NAKAMURA TSUNESHI

IPC: C23C18/16 ,  C23C18/20 ,  H05K3/10 ,  H05K3/24 ,  H05K3/42 ,  B44D1/18 ,  B41M3/08 ,  H05K3/12

CPC classification number: H05K3/246 ,  C23C18/1608 ,  C23C18/285 ,  C23C18/30 ,  H05K3/102 ,  H05K3/428 ,  H05K2201/0347 ,  H05K2203/0522 ,  Y10S428/901 ,  Y10T428/24909 ,  Y10T428/24917

公开(公告)号：US3462349A

公开(公告)日：1969-08-19

申请号：US3462349D

申请日：1966-09-19

Applicant: HUGHES AIRCRAFT CO

Inventor： GORGENYI GEZA E

IPC: C25D5/02 ,  H01L21/00 ,  H01L21/288 ,  H01L23/29 ,  H01L23/485 ,  H05K3/40 ,  C23B5/50 ,  C23B5/66

CPC classification number: H05K3/4007 ,  C25D5/02 ,  H01L21/00 ,  H01L21/288 ,  H01L23/291 ,  H01L23/485 ,  H01L2924/0002 ,  H05K2201/0347 ,  H05K2201/0367 ,  H05K2203/1476 ,  H01L2924/00

公开(公告)号：US20230276578A1

公开(公告)日：2023-08-31

申请号：US18314054

申请日：2023-05-08

Applicant: NVIDIA CORPORATION

Inventor： Mingyi YU ,  Gregory Patrick BODI

IPC: H05K3/24 ,  H05K3/04 ,  H05K3/00 ,  H05K1/11

CPC classification number: H05K3/242 ,  H05K1/117 ,  H05K3/0047 ,  H05K3/043 ,  H05K2201/0347

Abstract: A method for forming a printed circuit board includes: forming on a substrate a first conductive layer for a first edge connector pin and a first conductive layer for a second edge connector pin, wherein the first conductive layer for the first edge connector pin and the first conductive layer for the second edge connector pin are electrically coupled to one another via a first conductive layer for an electrical bridging element; electroplating a second conductive layer onto both the first conductive layer for the first edge connector pin and the first conductive layer for the second edge connector pin via a plating current conductor; and removing at least a portion of the electrical bridging element to electrically separate the first edge connector pin from the second edge connector pin.

公开(公告)号：US11674235B2

公开(公告)日：2023-06-13

申请号：US16366064

申请日：2019-03-27

Applicant: Hutchinson Technology Incorporated

Inventor： Douglas P. Riemer ,  Peter F. Ladwig

IPC: C25D3/48 ,  C25D3/62 ,  C25D5/04 ,  C25D5/18 ,  C25D7/00 ,  H05K3/18 ,  H05K1/09 ,  C25D5/10 ,  C25D5/00

CPC classification number: C25D7/00 ,  C25D3/48 ,  H05K1/09 ,  H05K3/188 ,  C25D5/10 ,  C25D5/623 ,  H05K2201/0347 ,  H05K2203/0723

Abstract: A method of plating a copper substrate with gold that reduces or eliminates the presence of microvoids at the interface of the gold/copper substrate is described. Suitably, live entry of the substrate into the plating bath is performed with application of external current to the bath such that no portion of the substrate is exposed to the bath for more than one second without the application of the external current. Increase of the applied current for gold strike to the mass-transfer-limit for gold reduction accomplishes the full measure of improvement in eliminating microvoids.

公开(公告)号：US11653454B2

公开(公告)日：2023-05-16

申请号：US17446333

申请日：2021-08-30

Applicant: SUMITOMO ELECTRIC PRINTED CIRCUITS, INC. ,  SUMITOMO ELECTRIC INDUSTRIES, LTD.

Inventor： Kohei Okamoto ,  Kousuke Miura ,  Hiroshi Ueda ,  Shoichiro Sakai ,  Maki Ikebe

IPC: H05K3/10 ,  H05K1/02 ,  H05K3/24

CPC classification number: H05K3/108 ,  H05K1/0296 ,  H05K3/241 ,  H05K3/244 ,  H05K2201/0347 ,  H05K2203/072 ,  H05K2203/0723

Abstract: A printed wiring board according to an aspect of the present invention includes a base film having insulation properties and a conductive pattern including multiple wiring portions laminated, the conductive pattern running on at least one surface of the base film, wherein each wiring portion includes a first conductive portion and a second conductive portion coating an outer surface of the first conductive portion, wherein an average width of each wiring portion is 10 μm or greater to 50 μm or smaller, and an average thickness of the second conductive portion is 1 μn or greater to smaller than 8.5 μm.