公开(公告)号：US06525429B1

公开(公告)日：2003-02-25

申请号：US09517852

申请日：2000-03-02

Applicant: Zlata Kovac ,  Craig Mitchell ,  Thomas Distefano ,  John Smith

Inventor： Zlata Kovac ,  Craig Mitchell ,  Thomas Distefano ,  John Smith

IPC: H01L2348

CPC classification number: H01L24/81 ,  H01L21/56 ,  H01L21/563 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/4985 ,  H01L24/72 ,  H01L24/75 ,  H01L2224/16 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/75 ,  H01L2224/75301 ,  H01L2224/81801 ,  H01L2224/83136 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/16152 ,  H01L2924/19041 ,  H01L2924/19043 ,  H05K1/118 ,  H05K3/361 ,  H05K3/4084 ,  H05K2201/0133 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/09081 ,  H05K2201/091 ,  H05K2203/063 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49174 ,  H01L2924/00014

Abstract: A method of making a microelectronic assembly including a compliant interface includes providing a first support structure, such as a flexible dielectric sheet, having a first surface and a porous resilient layer on the first surface of the first support structure, stretching the first support structure and bonding the stretched first support structure to a ring structure. The first surface of a second support structure, such as a semiconductor wafer, is then abutted against the porous layer and, desirably after the abutting step, a first curable liquid is disposed between the first and second support structures and within the porous layer. The first curable liquid may then be at least partially cured.

公开(公告)号：US06521480B1

公开(公告)日：2003-02-18

申请号：US09672208

申请日：2000-09-28

Applicant: Craig Mitchell ,  Mike Warner ,  Jim Behlen

Inventor： Craig Mitchell ,  Mike Warner ,  Jim Behlen

IPC: H01L2144

CPC classification number: H01L21/56 ,  H01L21/563 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/4985 ,  H01L24/72 ,  H01L24/75 ,  H01L24/81 ,  H01L2224/16 ,  H01L2224/73203 ,  H01L2224/75 ,  H01L2224/81801 ,  H01L2224/83136 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/16152 ,  H01L2924/19041 ,  H01L2924/19043 ,  H05K1/118 ,  H05K3/361 ,  H05K3/4084 ,  H05K2201/0133 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/09081 ,  H05K2201/091 ,  H05K2203/063 ,  H01L2924/00

Abstract: A method for making a semiconductor chip package. At least one compliant pad is provided on a surface of a substrate and a chip unit is attached to the at least one compliant pad. The at least one compliant pad has a first coefficient of thermal expansion (“CTE”). An encapsulant having a second CTE lower than the CTE of the compliant pads is disposed around the at least one compliant pad to form a composite layer between the chip unit and the substrate.

Abstract translation: 一种制造半导体芯片封装的方法。 至少一个柔性衬垫设置在衬底的表面上，并且芯片单元附接到至少一个兼容衬垫。 至少一个柔性垫具有第一热膨胀系数（“CTE”）。 具有低于柔性焊盘的CTE的第二CTE的密封剂设置在所述至少一个柔性焊盘周围，以在芯片单元和衬底之间形成复合层。

公开(公告)号：US06518091B1

公开(公告)日：2003-02-11

申请号：US09655300

申请日：2000-09-05

Applicant: Belgacem Haba

Inventor： Belgacem Haba

IPC: H01L2144

CPC classification number: H01L21/568 ,  B29C70/62 ,  B29C70/882 ,  G02F1/1339 ,  H01L21/6835 ,  H01L23/49827 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/27438 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/29499 ,  H01L2224/83101 ,  H01L2224/83192 ,  H01L2224/83851 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/12044 ,  H01L2924/14 ,  H05K3/323 ,  H05K3/368 ,  H05K3/4623 ,  H05K2201/0133 ,  H05K2201/0248 ,  H05K2201/083 ,  H05K2201/09536 ,  H05K2203/104 ,  H05K2203/105 ,  H01L2924/00

Abstract: A method of making an anisotropic conductive element for use in microelectronic packaging includes providing a layer of material having a pair of oppositely-directed major faces, the layer incorporating a curable dielectric material in a fluid condition and electrically conductive particles in the curable dielectric material and applying a magnetic field to the layer of a material so as to alter the configuration of the particles and so as to form areas of high particle concentration defining a plurality of conductive paths extending between the major faces of the layer of a material. After applying the magnetic field, the dielectric material is cured. The layer may be compressed for moving the conductive particles together to provide lower resistance electrical paths through the layer. In certain embodiments, at last some of the conductive particles are elongated so that when the magnetic field is applied to the layer of a material, the magnetic field turns the axes of elongation of at least some of the elongated particles towards the vertical direction. In other embodiments, the magnetic field moves at least some of the conductive particles in horizontal directions.

Abstract translation: 制造用于微电子封装的各向异性导电元件的方法包括提供具有一对相反方向的主面的材料层，该层包含处于流体状态的可固化电介质材料和可固化电介质材料中的导电颗粒，以及 对材料层施加磁场，以便改变颗粒的构型并形成高的颗粒浓度的区域，从而限定在材料层的主要表面之间延伸的多个导电路径。 施加磁场后，介电材料固化。 该层可以被压缩以将导电颗粒移动到一起以提供穿过层的较低电阻的电路径。 在某些实施例中，最后一些导电颗粒是细长的，使得当磁场被施加到材料层时，磁场使至少一些细长颗粒的伸长轴线向垂直方向转动。 在其他实施例中，磁场沿水平方向移动至少一些导电颗粒。

公开(公告)号：US20030011998A1

公开(公告)日：2003-01-16

申请号：US10232273

申请日：2002-08-30

Applicant: Hughes Electronics Corporation

Inventor： C. P. Lo ,  Daniel A. Huang ,  Pete Hudson

IPC: H05K007/20 ,  H05K001/00

CPC classification number: H01L24/81 ,  H01L23/49822 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H05K1/0271 ,  H05K1/056 ,  H05K3/0061 ,  H05K3/3436 ,  H05K2201/0133 ,  H05K2201/068 ,  H05K2201/10734 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2224/29099 ,  H01L2924/00

Abstract: A circuit assembly has a heat sink assembly and a chip scale package assembly. The chip scale package assembly has an integrated circuit die coupled to a first printed wiring board. The heat sink assembly has an integrated circuit die coupled to a second printed wiring board. Preferably, the heat sink assembly and the chip scale package assembly are assembled separately then assembled together. The circuit pads on the first printed wiring board correspond with circuit pads on the second printed wiring board. The circuit pads may be coupled together by solder or adhesive bonding. The circuit pads on the first printed wiring board may have solder balls formed of high temperature solder that do not melt when the heat sink assembly is assembled with chip scale package assembly. The solder balls allow chip scale package assembly to maintain a predetermined distance from the circuit pads on the second printed wiring board.

公开(公告)号：US20020187352A1

公开(公告)日：2002-12-12

申请号：US09905918

申请日：2001-07-17

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Sang-Jun Bae ,  Sung-Il Oh

IPC: B32B027/38

CPC classification number: H05K3/4661 ,  H05K2201/0133 ,  H05K2201/0195 ,  H05K2201/0209 ,  Y10S428/901 ,  Y10T428/24942 ,  Y10T428/31515 ,  Y10T428/31522

Abstract: Disclosed are an insulating film having improved adhesive strength and a multilayer printed circuit board having the same. The insulating film made of an epoxy resin, a rubber and a filler, for use in an insulating layer of a multilayer printed circuit board, is composed of a desmear-treated first coating layer and a non-desmear treated second coating layer. As such, the first coating layer has more rubber and filler amounts and less epoxy resin amount than does the second coating layer. The insulating film is advantageous in light of high roughness thereon by the desmear treatment, and an improvement of adhesive strength between an insulating layer and a plating layer formed on the insulating layer, upon preparation of the multilayer printed circuit board.

Abstract translation: 公开了具有改进的粘合强度的绝缘膜和具有该绝缘膜的多层印刷电路板。 由多层印刷电路板的绝缘层使用的由环氧树脂，橡胶和填料构成的绝缘膜由去污处理的第一涂层和未脱胶处理的第二涂层组成。 因此，第一涂层比第二涂层具有更多的橡胶和填料量和更少的环氧树脂量。 在制备多层印刷电路板时，通过去污处理，绝缘膜在其上具有高粗糙度的优点以及在绝缘层上形成的绝缘层和镀层之间的粘合强度的改善。

公开(公告)号：US06486415B2

公开(公告)日：2002-11-26

申请号：US09761124

申请日：2001-01-16

Applicant: Lisa J. Jimarez ,  Miguel A. Jimarez ,  Voya R. Markovich ,  Cynthia S. Milkovich ,  Charles H. Perry ,  Brenda L. Peterson

Inventor： Lisa J. Jimarez ,  Miguel A. Jimarez ,  Voya R. Markovich ,  Cynthia S. Milkovich ,  Charles H. Perry ,  Brenda L. Peterson

IPC: H01P1204

CPC classification number: H01L21/4857 ,  H01L21/486 ,  H01L23/15 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49894 ,  H01L2924/0002 ,  H05K1/0271 ,  H05K1/0306 ,  H05K1/113 ,  H05K3/3436 ,  H05K3/3457 ,  H05K3/4053 ,  H05K3/4069 ,  H05K3/4605 ,  H05K3/4644 ,  H05K3/4688 ,  H05K2201/0133 ,  H05K2201/015 ,  H05K2201/09436 ,  H05K2201/09509 ,  H05K2201/10734 ,  H05K2203/061 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49153 ,  Y10T29/49165 ,  H01L2924/00

Abstract: An electronic package and method of making the electronic package is provided. A layer of dielectric material is positioned on a first surface of a substrate which includes a plurality of conductive contacts. At least one through hole is formed in the layer of dielectric material in alignment with at least one of the plurality of conductive contacts. A conductive material is positioned in the at least one through hole substantially filling the through hole. At least one conductive member is positioned on the conductive material in the through hole and in electrical contact with the conductive material. The electronic package improves field operating life of an assembly which includes a semiconductor chip attached to a second surface of the substrate and a printed wiring board attached to the conductive members.

Abstract translation: 提供电子封装和制造电子封装的方法。 电介质材料层位于包括多个导电触点的衬底的第一表面上。 至少一个通孔形成在电介质材料层中，与多个导电触点中的至少一个对准。 导电材料位于基本上填充通孔的至少一个通孔中。 至少一个导电构件定位在通孔中的导电材料上并与导电材料电接触。 该电子封装提高了组件的现场使用寿命，该组件包括附接到衬底的第二表面的半导体芯片和附着到导电构件的印刷线路板。

公开(公告)号：US20020173175A1

公开(公告)日：2002-11-21

申请号：US09855308

申请日：2001-05-15

Applicant: International Business Machines Corporation

Inventor： William Louis Brodsky ,  David Vincent Caletka

IPC: H05K001/00

CPC classification number: H05K1/036 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K1/0271 ,  H05K1/113 ,  H05K1/114 ,  H05K1/141 ,  H05K3/42 ,  H05K3/4644 ,  H05K2201/0133 ,  H05K2201/0154 ,  H05K2201/09063 ,  H05K2201/10378 ,  H01L2924/00

Abstract: An interposer member having strategically positioned apertures for electrically connecting an electronic device to a circuitized substrate. The member includes a homogeneous elastomer core having strategically positioned apertures. The apertures are positioned through the member approximately equidistant between adjacent plated through holes and/or conductive pads. Such positioning relieves stress from the plated through holes and/or conductive pads, and increases the contact compliancy of the member.

Abstract translation: 具有用于将电子设备电连接到电路化基板的具有策略定位的孔的插入件。 该构件包括具有策略定位孔的均质弹性体芯。 这些孔通过该构件定位在相邻的电镀通孔和/或导电焊盘之间大致等距离。 这种定位可以减轻电镀通孔和/或导电垫的应力，并增加构件的接触顺应性。

公开(公告)号：US20020160786A1

公开(公告)日：2002-10-31

申请号：US10118092

申请日：2002-04-09

Inventor： Manfred Rietzler ,  Francisco Martinez de Velasco Cortina

IPC: H04Q005/22

CPC classification number: C23F1/02 ,  G06K19/0723 ,  G06K19/07745 ,  G06K19/07749 ,  G06K19/0775 ,  G06K19/07758 ,  G06K19/0776 ,  G06K19/07771 ,  G06K19/07779 ,  G06K19/07783 ,  G06K19/16 ,  G06K19/18 ,  G06K2019/0629 ,  H01L2924/0002 ,  H01Q1/22 ,  H01Q9/27 ,  H01Q13/10 ,  H05K1/0393 ,  H05K3/067 ,  H05K3/068 ,  H05K2201/0133 ,  H05K2203/0143 ,  H05K2203/1545 ,  Y10T29/49016 ,  H01L2924/00

Abstract: A method for selectively removing metal from a metallized substrate (e.g., a metallized polymer film) and the formation fo devices thereby are provided. The method involves selectively exposing the metallized surface to a demetallizing (i.e., an oxidizing) chemical solution. The metallized layer can be selectively exposed to the demetallizing solution using a flexographic printing process wherein printing rollers are used to transfer the demetallizing solution to the metallized surface. An identification device including, for example, a holographic, retro-reflective, or other metallized material and a radio-frequency transponder are also provided. The radio-frequency transponder includes an RF chip and an antenna in electrical communication with the chip. The identification device including the holographic image allows both electronic identification through the reading of identification data stored in the chip and optical identification via the holographic image.

Abstract translation: 提供了从金属化基板（例如，金属化聚合物膜）选择性地去除金属和由此形成的方法。 该方法包括将金属化表面选择性地暴露于脱金属（即氧化）化学溶液。 金属化层可以使用柔性版印刷方法选择性地暴露于脱金属溶液，其中使用印刷辊将去金属化溶液转移到金属化表面。 还提供了包括例如全息，回射或其它金属化材料和射频转发器的识别装置。 射频转发器包括RF芯片和与芯片电连通的天线。 包括全息图像的识别装置允许通过读取存储在芯片中的识别数据和通过全息图像进行光学识别来进行电子识别。

公开(公告)号：US20020139576A1

公开(公告)日：2002-10-03

申请号：US09824506

申请日：2001-04-02

Inventor： Andrew Michael Cherniski ,  James Kristian Koch

IPC: H05K001/16

CPC classification number: H01L23/48 ,  H01L23/49562 ,  H01L23/49586 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0256 ,  H05K3/301 ,  H05K3/306 ,  H05K3/3447 ,  H05K2201/0133 ,  H05K2201/0761 ,  H05K2201/10166 ,  H05K2201/10424 ,  Y10T29/4913 ,  Y10T29/49139 ,  Y10T29/49142 ,  Y10T29/49144 ,  Y10T29/53174 ,  Y10T29/53183 ,  H01L2924/00

Abstract: A method and apparatus to eliminate conductive contamination reliability problems for assembled substrates, such as electrical arcing in power semiconductor leads. One embodiment of the invention involves a method for assembling an electrical component having leads on a substrate having conductive contacts, wherein an elastomer part encapsulates the leads of the electrical component. A second embodiment of the invention involves assembling an electrical component having leads to a substrate having conductive contacts, wherein an elastomer shape cut by a punch die encapsulates the leads of the electrical component. A third embodiment of the invention involves an assembled substrate including an electrical component having leads, and an elastomer surrounding the leads to encapsulate the leads.

Abstract translation: 一种用于消除组装的衬底的导电污染可靠性问题的方法和装置，例如功率半导体引线中的电弧。 本发明的一个实施例涉及一种用于组装具有导体的电气部件的方法，所述导线在具有导电触点的基板上，其中弹性体部件封装电气部件的引线。 本发明的第二实施例涉及将具有导线的电气部件组装到具有导电触点的基板上，其中由冲压模切割的弹性体形状封装电气部件的引线。 本发明的第三实施例涉及包括具有引线的电气部件的组装的基板和围绕引线的弹性体以封装引线。

公开(公告)号：US20020109213A1

公开(公告)日：2002-08-15

申请号：US10123547

申请日：2002-04-16

Inventor： Zlata Kovac ,  Craig S. Mitchell ,  Thomas H. DiStefano ,  John W. Smith

IPC: H01L023/495

CPC classification number: H01L24/81 ,  H01L21/56 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/4985 ,  H01L24/29 ,  H01L24/72 ,  H01L24/97 ,  H01L2224/16 ,  H01L2224/73203 ,  H01L2224/81136 ,  H01L2224/81801 ,  H01L2224/83136 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/16152 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/351 ,  H05K1/118 ,  H05K3/361 ,  H05K3/4084 ,  H05K2201/0133 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/09081 ,  H05K2203/063 ,  H01L2224/81 ,  H01L2924/3512 ,  H01L2924/00

Abstract: A method of making a microelectronic assembly including a compliant interface includes providing a first support structure, such as a flexible dielectric sheet, having a first surface and a porous resilient layer on the first surface of the first support structure, stretching the first support structure and bonding the stretched first support structure to a ring structure. The first surface of a second support structure, such as a semiconductor wafer, is then abutted against the porous layer and, desirably after the abutting step, a first curable liquid is disposed between the first and second support structures and within the porous layer. The first curable liquid may then be at least partially cured.

Abstract translation: 制造包括柔性界面的微电子组件的方法包括提供第一支撑结构，例如柔性电介质片，在第一支撑结构的第一表面上具有第一表面和多孔弹性层，拉伸第一支撑结构和 将拉伸的第一支撑结构结合到环结构。 然后，第二支撑结构（例如半导体晶片）的第一表面与多孔层抵接，并且理想地在邻接步骤之后，将第一可固化液体设置在第一和第二支撑结构之间以及多孔层内。 然后可以将第一可固化液体至少部分固化。