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    SYSTEMS AND METHODS FOR ELECTROMAGNETIC NOISE SUPPRESSION USING HYBRID ELECTROMAGNETIC BANDGAP STRUCTURES
    251.
    发明申请
    SYSTEMS AND METHODS FOR ELECTROMAGNETIC NOISE SUPPRESSION USING HYBRID ELECTROMAGNETIC BANDGAP STRUCTURES 有权
    使用混合电磁带结构的电磁噪声抑制系统和方法

    公开(公告)号：US20100180437A1

    公开(公告)日：2010-07-22

    申请号：US12603071

    申请日：2009-10-21

    Applicant: William E. McKinzie, III

    Inventor： William E. McKinzie, III

    IPC: H01R43/00

    CPC classification number: H01P1/20 ,  H01P1/2005 ,  H05K1/0218 ,  H05K1/0231 ,  H05K1/0233 ,  H05K1/0236 ,  H05K1/0239 ,  H05K1/162 ,  H05K1/165 ,  H05K1/181 ,  H05K2201/093 ,  H05K2201/09318 ,  H05K2201/09609 ,  H05K2201/09663 ,  H05K2201/09672 ,  H05K2201/0969 ,  H05K2201/09718 ,  Y10T29/49018 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49155

    Abstract: A hybrid electromagnetic bandgap (EBG) structure for broadband suppression of noise on printed wiring boards includes an array of coplanar patches interconnected into a grid by series inductances, and a corresponding array of shunt LC networks connecting the coplanar patches to a second conductive plane. This combination of series inductances and shunt resonant vias lowers the cutoff frequency for the fundamental stopband. The series inductances and shunt capacitances may be implemented using surface mount component technology, or printed traces. Patches may also be interconnected by coplanar coupled transmission lines. The even and odd mode impedances of the coupled lines may be increased by forming slots in the second conductive plane disposed opposite to the transmission line, lowering the cutoff frequency and increasing the bandwidth of the fundamental stopband. Coplanar EBG structures may be integrated into power distribution networks of printed wiring boards for broadband suppression of electromagnetic noise.

    Abstract translation: 用于宽带抑制印刷电路板上的噪声的混合电磁带隙（EBG）结构包括通过串联电感互连到电网中的共面贴片阵列，以及将共面贴片连接到第二导电平面的相应阵列的分流LC网络。 串联电感和并联谐振通孔的组合降低了基波阻带的截止频率。 串联电感和分流电容可以使用表面贴装元件技术或印刷迹线实现。 补片也可以通过共面耦合传输线相互连接。 可以通过在与传输线相对布置的第二导电平面中形成槽，降低截止频率并增加基带阻带的带宽来增加耦合线的偶模和奇模阻抗。 共面EBG结构可以集成到用于宽带抑制电磁噪声的印刷线路板的配电网络中。

    MULTILAYER PRINTED CIRCUIT BOARD
    252.
    发明申请
    MULTILAYER PRINTED CIRCUIT BOARD 审中-公开
    多层印刷电路板

    公开(公告)号：US20100132984A1

    公开(公告)日：2010-06-03

    申请号：US12629162

    申请日：2009-12-02

    Applicant: Yuya Narazako ,  Kazunari Sakaki

    Inventor： Yuya Narazako ,  Kazunari Sakaki

    IPC: H05K1/03 ,  H05K1/16

    CPC classification number: H05K1/0216 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2201/09972

    Abstract: In order to reduce noise propagating from a digital signal circuit to an analog signal circuit, a multilayer printed circuit board includes a first digital signal circuit formed in a first region of a front surface, a first analog signal circuit formed in a second region of the front surface, a second digital signal circuit formed at a back surface corresponding to the first region, a second analog signal circuit formed at the back surface corresponding to the second region; an analog ground circuit formed between the front surface and the back surface to ground the first analog signal circuit and the second analog signal circuit, and a first digital ground circuit arranged between the first digital signal circuit and the analog ground circuit and a second digital ground circuit arranged between the second digital signal circuit and the analog ground circuit to ground the first digital signal circuit and the second digital signal circuit.

    Abstract translation: 为了减少从数字信号电路传播到模拟信号电路的噪声，多层印刷电路板包括形成在前表面的第一区域中的第一数字信号电路，形成在第一区域的第一模拟信号电路 形成在与第一区域对应的背面的第二数字信号电路，形成在与第二区域对应的背面的第二模拟信号电路; 形成在所述前表面和所述后表面之间以将所述第一模拟信号电路和所述第二模拟信号电路接地的模拟接地电路，以及布置在所述第一数字信号电路和所述模拟地电路之间的第一数字接地电路和第二数字接地 布置在第二数字信号电路和模拟地电路之间以将第一数字信号电路和第二数字信号电路接地的电路。

    PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME
    254.
    发明申请
    PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME 失效
    印刷电路板及其制造方法

    公开(公告)号：US20100101850A1

    公开(公告)日：2010-04-29

    申请号：US12277250

    申请日：2008-11-24

    Applicant: HOU-YUAN CHOU

    Inventor： HOU-YUAN CHOU

    IPC: H05K1/11 ,  H05K3/00

    CPC classification number: H05K1/0268 ,  G01R31/2818 ,  H05K1/0237 ,  H05K1/11 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2203/162 ,  Y10T29/49124 ,  Y10T29/49147

    Abstract: A printed circuit board includes a signal layer, an insulation layer, and a reference layer. A transmission line is located on the signal layer. A probing pad is located on the transmission line. Two aligned slots defined in opposite sides of the reference layer leaving a connecting portion. The slots and the connecting portion are in vertical alignment with the probing pad. The signal layer, the insulation layer, and the reference layer are configured in a cascading order. An arrangement of the signal layer in relation to the reference layer including the slots and the connecting portion reduces a capacitance effect caused by the probing pad.

    Abstract translation: 印刷电路板包括信号层，绝缘层和参考层。 传输线位于信号层上。 探测板位于传输线上。 限定在参考层的相对侧中的两个对准的槽留下连接部分。 槽和连接部分与探测板垂直对准。 信号层，绝缘层和参考层以级联顺序配置。 信号层相对于包括狭缝和连接部分的参考层的布置减小了由探测垫引起的电容效应。

    Printed circuit board able to suppress simultaneous switching noise
    255.
    发明授权
    Printed circuit board able to suppress simultaneous switching noise 有权
    印刷电路板能够抑制同时开关噪声

    公开(公告)号：US07655870B2

    公开(公告)日：2010-02-02

    申请号：US11829972

    申请日：2007-07-30

    Applicant: Liang-Yao Chang ,  Shou-Kuo Hsu

    Inventor： Liang-Yao Chang ,  Shou-Kuo Hsu

    IPC: H05K1/03

    CPC classification number: H05K1/0225 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2201/09972

    Abstract: An exemplary printed circuit board includes a power plane, and a ground plane. The power plane includes two power modules, and an insulating medium for insulating the two power modules from each other. The ground plane is insulated from the power plane, a plurality of slots is defined in the ground plane and located close to facing edges of the two power modules, and the slots are arranged in rows along the facing edges of the two power modules.

    Abstract translation: 示例性印刷电路板包括电源平面和接地平面。 电力平面包括两个电源模块和用于将两个电源模块彼此绝缘的绝缘介质。 接地层与电源平面绝缘，多个槽位于接地平面内，靠近两个电源模块的相对边缘，并沿着两个电源模块的相对边缘排成行。

    Sub-mount, light emitting device including sub-mount and methods of manufacturing such sub-mount and/or light emitting device
    256.
    发明申请
    Sub-mount, light emitting device including sub-mount and methods of manufacturing such sub-mount and/or light emitting device 有权
    子安装式发光器件，包括副安装座以及制造这种子座和/或发光器件的方法

    公开(公告)号：US20090316409A1

    公开(公告)日：2009-12-24

    申请号：US12457803

    申请日：2009-06-22

    Applicant: Yu-Sik Kim ,  Woo-Sung Han

    Inventor： Yu-Sik Kim ,  Woo-Sung Han

    IPC: F21S4/00 ,  F21V19/00 ,  H01J9/24

    CPC classification number: H05K1/0295 ,  H01L25/0753 ,  H01L2224/16225 ,  H05K2201/09227 ,  H05K2201/09254 ,  H05K2201/09318 ,  H05K2201/0949 ,  H05K2201/09663 ,  H05K2201/09954 ,  H05K2201/10106 ,  H05K2203/173

    Abstract: A sub-mount adapted for AC and DC operation of devices mountable thereon, the sub-mount including a base substrate including a first surface and a second surface different from the first surface, a conductive pattern on the first surface, a first pair and a second pair of first and second electrodes on the second surface, and vias extending through the base substrate between the first and second surfaces, wherein the conductive pattern includes a first set of mounting portions and two via portions along a first electrical path between the first pair of first and second electrodes, and a second set of mounting portions and two via portions along a second electrical path between the second pair of first and second electrodes, the via portions connecting respective portions of the conductive pattern to respective electrodes of the first and second pair of first and second electrodes through the vias.

    Abstract translation: 一种用于可安装在其上的装置的AC和DC操作的子安装座，所述子安装件包括基底基板，所述基底基板包括第一表面和与所述第一表面不同的第二表面，所述第一表面上的导电图案， 在第二表面上的第二对第一和第二电极以及在第一和第二表面之间延伸通过基底基板的通孔，其中导电图案包括第一组安装部分和沿着第一对之间的第一电路径的两个通孔部分 的第一和第二电极，以及第二组安装部分和沿着第二对电极之间的第二电气路径的两个通孔部分，所述通孔部分将导电图案的各个部分连接到第一和第二电极的相应电极 一对第一和第二电极穿过通孔。

    Systems and methods for electromagnetic noise suppression using hybrid electromagnetic bandgap structures
    257.
    发明授权
    Systems and methods for electromagnetic noise suppression using hybrid electromagnetic bandgap structures 有权
    使用混合电磁带隙结构的电磁噪声抑制系统和方法

    公开(公告)号：US07626216B2

    公开(公告)日：2009-12-01

    申请号：US11583212

    申请日：2006-10-18

    Applicant: William E. McKinzie, III

    Inventor： William E. McKinzie, III

    IPC: H01L31/072 ,  H01L31/109 ,  H01L31/0328 ,  H01L31/0336

    CPC classification number: H01P1/20 ,  H01P1/2005 ,  H05K1/0218 ,  H05K1/0231 ,  H05K1/0233 ,  H05K1/0236 ,  H05K1/0239 ,  H05K1/162 ,  H05K1/165 ,  H05K1/181 ,  H05K2201/093 ,  H05K2201/09318 ,  H05K2201/09609 ,  H05K2201/09663 ,  H05K2201/09672 ,  H05K2201/0969 ,  H05K2201/09718 ,  Y10T29/49018 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49155

    Abstract: A hybrid electromagnetic bandgap (EBG) structure for broadband suppression of noise on printed wiring boards includes an array of coplanar patches interconnected into a grid by series inductances, and a corresponding array of shunt LC networks connecting the coplanar patches to a second conductive plane. This combination of series inductances and shunt resonant vias lowers the cutoff frequency for the fundamental stopband. The series inductances and shunt capacitances may be implemented using surface mount component technology, or printed traces. Patches may also be interconnected by coplanar coupled transmission lines. The even and odd mode impedances of the coupled lines may be increased by forming slots in the second conductive plane disposed opposite to the transmission line, lowering the cutoff frequency and increasing the bandwidth of the fundamental stopband. Coplanar EBG structures may be integrated into power distribution networks of printed wiring boards for broadband suppression of electromagnetic noise.

    Abstract translation: 用于宽带抑制印刷电路板上的噪声的混合电磁带隙（EBG）结构包括通过串联电感互连到电网中的共面贴片阵列，以及将共面贴片连接到第二导电平面的相应阵列的分流LC网络。 串联电感和并联谐振通孔的组合降低了基波阻带的截止频率。 串联电感和分流电容可以使用表面贴装元件技术或印刷迹线实现。 补片也可以通过共面耦合传输线相互连接。 可以通过在与传输线相对布置的第二导电平面中形成槽，降低截止频率并增加基带阻带的带宽来增加耦合线的偶模和奇模阻抗。 共面EBG结构可以集成到用于宽带抑制电磁噪声的印刷线路板的配电网络中。

    Surface Mount Power Module Dual Footprint
    259.
    发明申请
    Surface Mount Power Module Dual Footprint 有权
    表面贴装电源模块双脚印

    公开(公告)号：US20090251873A1

    公开(公告)日：2009-10-08

    申请号：US12061453

    申请日：2008-04-02

    Applicant: Sun-Wen Cyrus Cheng ,  Paulette Lemond ,  Carl Milton Wildrick

    Inventor： Sun-Wen Cyrus Cheng ,  Paulette Lemond ,  Carl Milton Wildrick

    IPC: H05K7/06 ,  H01B13/34

    CPC classification number: H05K3/3442 ,  H05K1/141 ,  H05K3/403 ,  H05K2201/09181 ,  H05K2201/09663 ,  H05K2201/099 ,  H05K2201/09954 ,  Y02P70/613

    Abstract: A dual footprint mounting package for a surface mount power converter modules and its method of manufacture. Castellated regions are formed on the edge of the component package using the appropriate sized drill or milling bit. Edge plating is applied to the castellated surfaces to create edge pads. The edge plating provides electrical continuity between the edge pads and the SMT pads. Solder mask, or other materials, is applied to prevent solder from wicking between each SMT pad and its respective edge pad. Such component may be attached to a larger device PWB using either the edge pads or the SMT pads, or may even be attached using a combination of the two, such as in the event of a pad failure or other defect.

    Abstract translation: 一种用于表面贴装功率转换器模块及其制造方法的双重封装安装封装。 使用适当尺寸的钻头或铣削钻头在组件封装的边缘上形成铸造区域。 将边缘电镀施加到cast形表面以形成边缘焊盘。 边缘电镀提供边缘焊盘和SMT焊盘之间的电气连续性。 施加焊接掩模或其他材料以防止焊料在每个SMT焊盘和其相应的边缘焊盘之间芯吸。 这样的组件可以使用边缘焊盘或SMT焊盘连接到更大的设备PWB，或者甚至可以使用两者的组合来连接，例如在焊盘故障或其他缺陷的情况下。

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