公开(公告)号：US20170027058A1

公开(公告)日：2017-01-26

申请号：US14804486

申请日：2015-07-21

Applicant: Apple Inc.

Inventor： Ryan C. Perkins ,  Trevor J. Ness ,  Tyler S. Bushnell ,  Steven P. Cardinali

IPC: H05K1/18 ,  H05K1/16 ,  H05K1/11 ,  H05K9/00 ,  H05K1/02

CPC classification number: H05K1/0218 ,  H01L23/28 ,  H01L23/564 ,  H01L23/60 ,  H01L31/048 ,  H01L2224/16225 ,  H01L2924/181 ,  H05K1/147 ,  H05K1/167 ,  H05K1/185 ,  H05K3/284 ,  H05K9/0022 ,  H05K2201/0133 ,  H05K2201/0707 ,  H05K2201/10098 ,  H05K2201/10151 ,  H05K2201/10371 ,  H05K2201/10977 ,  H05K2203/1316 ,  H01L2924/00012

Abstract: Electrical components such as integrated circuits and other components may be mounted on a substrate such as a printed circuit substrate. A molded plastic cap may cover the components and a portion of the printed circuit substrate to form a packaged electrical device. Metal structures such as springs, posts, and other metal members may be insert molded within the plastic cap. A metal layer on the surface of the cap may be patterned to from electromagnetic shielding, signal paths, contact pads, sensor electrodes, antennas, and other structures. Multiple substrates each with a respective set of mounted electrical components may be joined using a flexible printed circuit. The flexible printed circuit may be covered with a rigid cap portion or an elastomeric material or may be left uncovered.

Abstract translation: 诸如集成电路和其他部件的电气部件可以安装在诸如印刷电路基板的基板上。 模制塑料帽可以覆盖部件和印刷电路基板的一部分以形成封装的电气装置。 诸如弹簧，柱和其它金属构件的金属结构可以嵌入模塑在塑料盖内。 盖的表面上的金属层可以被图案化为电磁屏蔽，信号路径，接触焊盘，传感器电极，天线和其他结构。 可以使用柔性印刷电路连接各自具有相应的一组安装的电气部件的多个基板。 柔性印刷电路可以用刚性盖部分或弹性体材料覆盖，或者可以不被覆盖。

公开(公告)号：US20160322284A1

公开(公告)日：2016-11-03

申请号：US15205416

申请日：2016-07-08

Applicant: HARRIS CORPORATION

Inventor： MICHAEL RAYMOND WEATHERSPOON ,  DAVID B. NICOL ,  LOUIS JOSEPH RENDEK, JR.

IPC: H01L23/498 ,  H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L21/48 ,  H01L21/683

CPC classification number: H01L23/4985 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/6835 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/5383 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2221/68381 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48229 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01327 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1421 ,  H01L2924/1431 ,  H01L2924/1511 ,  H01L2924/1579 ,  H05K1/036 ,  H05K1/0393 ,  H05K1/115 ,  H05K1/181 ,  H05K1/189 ,  H05K3/32 ,  H05K3/3436 ,  H05K3/4038 ,  H05K3/4602 ,  H05K3/4632 ,  H05K3/467 ,  H05K3/4688 ,  H05K2201/0133 ,  H05K2201/0141 ,  H05K2201/10674 ,  Y10T29/4913 ,  Y10T29/49224 ,  Y10T428/24917 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A method is for making an electronic device and includes forming an interconnect layer stack on a sacrificial substrate and having a plurality of patterned electrical conductor layers, and a dielectric layer between adjacent patterned electrical conductor layers. The method also includes laminating and electrically joining through an intermetallic bond a liquid crystal polymer (LCP) substrate to the interconnect layer stack on a side thereof opposite the sacrificial substrate. The method further includes removing the sacrificial substrate to expose a lowermost patterned electrical conductor layer, and electrically coupling at least one first device to the lowermost patterned electrical conductor layer.

Abstract translation: 一种用于制造电子器件的方法，包括在牺牲衬底上形成互连层堆叠并且具有多个图案化的导电层，以及在相邻的图案化电导体层之间的介电层。 该方法还包括通过液晶聚合物（LCP）衬底的金属间键合层叠和电连接到与牺牲衬底相对的一侧上的互连层堆叠。 该方法还包括去除牺牲衬底以暴露最下图案化电导体层，并将至少一个第一器件电耦合到最下图案化电导体层。

公开(公告)号：US09474148B2

公开(公告)日：2016-10-18

申请号：US14038352

申请日：2013-09-26

Applicant: Trumpet Holdings, Inc.

Inventor： James Liberty ,  John W. Ramonas ,  Dennis A. Maller

IPC: H05K1/00 ,  H05K1/02 ,  H05K1/14

CPC classification number: H05K1/0271 ,  H05K1/144 ,  H05K2201/0133 ,  H05K2201/2036 ,  H05K2203/1322

Abstract: A compliant middle member to be used between encapsulated stacked circuit boards contained in an enclosure. The compliant middle member absorbing expansion forces from an encapsulant experiencing thermal expansion, thereby diverting and reducing the expansion forces exerted upon the electrical components.

Abstract translation: 用于封装中包含的封装的堆叠电路板之间的兼容中间构件。 柔性中间构件从经历热膨胀的密封剂吸收膨胀力，从而转移并减少施加在电气部件上的膨胀力。

公开(公告)号：US09427582B2

公开(公告)日：2016-08-30

申请号：US14532982

申请日：2014-11-04

Applicant: Second Sight Medical Products, Inc.

Inventor： Robert J Greenberg ,  Matthew J McMahon ,  Jordan Matthew Neysmith ,  James S Little ,  Neil Hamilton Talbot ,  Kelly H McClure ,  Brian V Mech

IPC: A61N1/36 ,  A61N1/05 ,  A61N1/372 ,  H05K1/02 ,  H05K3/00 ,  H05K1/11 ,  H05K3/28

CPC classification number: A61N1/36046 ,  A61N1/0543 ,  A61N1/37223 ,  H05K1/028 ,  H05K1/0281 ,  H05K1/118 ,  H05K3/0014 ,  H05K3/28 ,  H05K2201/0133 ,  H05K2201/09018 ,  H05K2201/09145 ,  H05K2201/09909 ,  H05K2201/2009 ,  H05K2203/1105 ,  H05K2203/1476 ,  H05K2203/302 ,  Y10T29/49158

Abstract: Polymer materials are useful as electrode array bodies for neural stimulation. They are particularly useful for retinal stimulation to create artificial vision, cochlear stimulation to create artificial hearing, and cortical stimulation, and many related purposes. The pressure applied against the retina, or other neural tissue, by an electrode array is critical. Too little pressure causes increased electrical resistance, along with electric field dispersion. Too much pressure may block blood flow. Common flexible circuit fabrication techniques generally require that a flexible circuit electrode array be made flat. Since neural tissue is almost never flat, a flat array will necessarily apply uneven pressure. Further, the edges of a flexible circuit polymer array may be sharp and cut the delicate neural tissue. It is advantageous that the array edges not contact tissue.

Abstract translation: 聚合物材料可用作神经刺激的电极阵列体。 它们特别有用于视网膜刺激以产生人造视觉，耳蜗刺激以产生人造听觉和皮质刺激以及许多相关目的。 通过电极阵列对视网膜或其他神经组织施加的压力是至关重要的。 太小的压力会导致电阻增加以及电场分散。 太大的压力可能会阻止血液流动。 通常的柔性电路制造技术通常需要使柔性电路电极阵列平坦。 由于神经组织几乎从不平坦，平面阵列必然会施加不均匀的压力。 此外，柔性电路聚合物阵列的边缘可以是尖锐的并切割精细的神经组织。 阵列边缘不接触组织是有利的。

公开(公告)号：US09420687B2

公开(公告)日：2016-08-16

申请号：US14483934

申请日：2014-09-11

Applicant: HARRIS CORPORATION

Inventor： Michael Raymond Weatherspoon ,  David B. Nicol ,  Louis Joseph Rendek, Jr.

IPC: H05K5/00 ,  H05K1/03 ,  H01L21/683 ,  H01L25/065 ,  H05K1/18 ,  H01L25/00 ,  H01L23/498 ,  H01L23/538 ,  H05K1/11 ,  H05K3/32 ,  H05K3/40 ,  H05K3/34 ,  H05K3/46 ,  H01L23/00

CPC classification number: H01L23/4985 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/6835 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/5383 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2221/68381 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48229 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01327 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1421 ,  H01L2924/1431 ,  H01L2924/1511 ,  H01L2924/1579 ,  H05K1/036 ,  H05K1/0393 ,  H05K1/115 ,  H05K1/181 ,  H05K1/189 ,  H05K3/32 ,  H05K3/3436 ,  H05K3/4038 ,  H05K3/4602 ,  H05K3/4632 ,  H05K3/467 ,  H05K3/4688 ,  H05K2201/0133 ,  H05K2201/0141 ,  H05K2201/10674 ,  Y10T29/4913 ,  Y10T29/49224 ,  Y10T428/24917 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A method is for making an electronic device and includes forming an interconnect layer stack on a sacrificial substrate and having a plurality of patterned electrical conductor layers, and a dielectric layer between adjacent patterned electrical conductor layers. The method also includes laminating and electrically joining through an intermetallic bond a liquid crystal polymer (LCP) substrate to the interconnect layer stack on a side thereof opposite the sacrificial substrate. The method further includes removing the sacrificial substrate to expose a lowermost patterned electrical conductor layer, and electrically coupling at least one first device to the lowermost patterned electrical conductor layer.

Abstract translation: 一种用于制造电子器件的方法，包括在牺牲衬底上形成互连层堆叠并且具有多个图案化的导电层，以及在相邻的图案化电导体层之间的介电层。 该方法还包括通过液晶聚合物（LCP）衬底的金属间键合层叠和电连接到与牺牲衬底相对的一侧上的互连层堆叠。 该方法还包括去除牺牲衬底以暴露最下图案化电导体层，并将至少一个第一器件电耦合到最下图案化电导体层。

公开(公告)号：US09408305B2

公开(公告)日：2016-08-02

申请号：US14947558

申请日：2015-11-20

Applicant: MC10, Inc.

Inventor： Yung-Yu Hsu

IPC: H05K1/00 ,  H05K1/11 ,  H05K1/18 ,  H05K1/03 ,  H05K1/16 ,  H01R9/00 ,  H05K1/02 ,  H05K3/46

CPC classification number: H05K1/185 ,  H05K1/0271 ,  H05K1/028 ,  H05K1/0283 ,  H05K1/036 ,  H05K1/0393 ,  H05K1/09 ,  H05K1/118 ,  H05K1/147 ,  H05K1/148 ,  H05K1/189 ,  H05K3/4691 ,  H05K3/4694 ,  H05K2201/0133 ,  H05K2201/0154 ,  H05K2201/0187 ,  H05K2201/09245 ,  H05K2201/1028 ,  H05K2201/10287 ,  H05K2201/2009

Abstract: Buffer structures are provided that can be used to reduce a strain in a conformable electronic system that includes compliant components in electrical communication with more rigid device components. The buffer structures are disposed on, or at least partially embedded in, the conformable electronic system such that the buffer structures overlap with at least a portion of a junction region between a compliant component and a more rigid device component. The buffer structure can have a higher value of Young's modulus than an encapsulant of the conformable electronic system.

公开(公告)号：US20160212894A1

公开(公告)日：2016-07-21

申请号：US14991432

申请日：2016-01-08

Applicant: Innolux Corporation

Inventor： Wei-Jen Tsai ,  Hui-Lang Lee ,  Ying-Wen Yang

IPC: H05K9/00 ,  H05K5/00 ,  H05K1/02 ,  H05K5/04

CPC classification number: H05K9/0054 ,  H05K1/0215 ,  H05K1/0259 ,  H05K1/0271 ,  H05K2201/0133 ,  H05K2201/0314 ,  H05K2201/10128 ,  H05K2201/10257

Abstract: A display device includes a display panel, a circuit board, and a conductive element. The circuit board is adjacent to the display panel and electrically connected to the display panel. The circuit board has at least a conductive pattern configured at a ground zone, and the conductive pattern has a plurality of conductive portions spaced apart each other. The quantities of the conductive portions respectively arranged along a first direction and a second direction are plural, and the first direction is substantially perpendicular to the second direction. The conductive element is disposed on the conductive pattern, and the conductive element is electrically connected to the conductive portions.

Abstract translation: 显示装置包括显示面板，电路板和导电元件。 电路板与显示面板相邻并电连接到显示面板。 电路板至少具有配置在接地区的导电图案，导电图案具有彼此隔开的多个导电部。 分别沿第一方向和第二方向布置的导电部分的数量是多个，并且第一方向基本上垂直于第二方向。 导电元件设置在导电图案上，并且导电元件电连接到导电部分。

公开(公告)号：US20160165719A1

公开(公告)日：2016-06-09

申请号：US14644183

申请日：2015-03-10

Applicant: VivaLnk Limited (Cayman Islands)

Inventor： Jiang Li ,  Junfeng Mei

IPC: H05K1/02 ,  H05K1/18 ,  H04B5/00 ,  A61B5/00 ,  H04B1/3827 ,  H05K1/03 ,  H05K1/14

CPC classification number: H05K1/0283 ,  A61B5/6823 ,  A61B5/6824 ,  A61B5/6825 ,  A61B5/6828 ,  A61B5/6829 ,  A61B5/6833 ,  A61B2562/046 ,  H04B1/385 ,  H04B2001/3866 ,  H05K1/148 ,  H05K1/189 ,  H05K3/0014 ,  H05K3/30 ,  H05K2201/0133 ,  H05K2201/09027 ,  H05K2201/09263 ,  H05K2201/10015 ,  H05K2201/10022 ,  H05K2201/1003 ,  H05K2201/10098 ,  H05K2201/10151 ,  H05K2201/10166 ,  H05K2201/10174 ,  H05K2203/1316

Abstract: An electronic patch includes a foldable circuit layer that includes a foldable network that includes comprising: a plurality of electronic modules comprising a plurality of electronic components, and flexible straps that connect the plurality of electronic modules, wherein the flexible straps comprise conductive circuit that are conductively connected with the plurality of electronic components in the plurality of electronic modules. Neighboring electronic modules can undulate in opposite directions normal to the foldable circuit layer. The electronic patch also includes an elastic layer that encloses the foldable circuit layer.

Abstract translation: 电子贴片包括可折叠电路层，其包括可折叠网络，其包括：包括多个电子部件的多个电子模块和连接多个电子模块的柔性带，其中柔性带包括导电的导电电路 与多个电子模块中的多个电子部件连接。 相邻的电子模块可以在垂直于可折叠电路层的相反方向波动。 电子贴片还包括包围可折叠电路层的弹性层。

公开(公告)号：US20160157363A1

公开(公告)日：2016-06-02

申请号：US14558357

申请日：2014-12-02

Applicant: FLEXTRONICS AP, LLC

Inventor： Anwar Mohammed ,  Weifeng Liu ,  Murad Kurwa

IPC: H05K3/46 ,  H05K1/02 ,  H05K3/12

CPC classification number: H05K1/0283 ,  B29C65/72 ,  B29L2031/3425 ,  H05K1/028 ,  H05K1/0284 ,  H05K1/0296 ,  H05K1/092 ,  H05K3/0058 ,  H05K3/125 ,  H05K3/20 ,  H05K2201/0133 ,  H05K2201/0323

Abstract: A method and apparatus for forming a conductor on an uneven two-dimensional (2-D) or three-dimensional (3-D) surface is described. An amount of conductive material needed to form a conductor between two points on a surface of an object is determined. The determined amount of conductive material is deposited on a substrate. The substrate with the deposited conductive material is applied to the object to form a conductor between the two points on the surface of the object. The conductive material and substrate may be stretchable. The conductive material may be deposited by an inkjet printer or an embedded 3-D printer. The substrate with the deposited conductive material may be applied to the object by laminating the substrate with the deposited conductive material to the object.

Abstract translation: 描述了在不均匀的二维（2-D）或三维（3-D）表面上形成导体的方法和装置。 确定在物体表面上的两个点之间形成导体所需的导电材料的量。 将确定量的导电材料沉积在基底上。 将具有沉积的导电材料的基板施加到物体上以在物体的表面上的两个点之间形成导体。 导电材料和基底可以是可拉伸的。 导电材料可以由喷墨打印机或嵌入式三维打印机进行沉积。 具有沉积的导电材料的衬底可以通过将衬底与沉积的导电材料层压到物体上而被施加到物体。

公开(公告)号：US20160150644A1

公开(公告)日：2016-05-26

申请号：US14441400

申请日：2013-10-02

Applicant: DOOSAN CORPORATION

Inventor： Hang Seok LEE ,  Duk Sang HAN ,  Yoon Ho JUNG ,  Dong Bo YANG

IPC: H05K1/03 ,  C08L63/00 ,  C08L63/04

CPC classification number: H05K1/0373 ,  B32B15/06 ,  B32B15/092 ,  B32B15/20 ,  B32B27/20 ,  B32B27/38 ,  B32B2264/102 ,  B32B2264/104 ,  B32B2307/206 ,  B32B2307/306 ,  B32B2307/718 ,  B32B2457/08 ,  C08G59/182 ,  C08K3/00 ,  C08L63/00 ,  C08L63/04 ,  H05K1/0353 ,  H05K1/036 ,  H05K3/0061 ,  H05K3/386 ,  H05K2201/0133 ,  H05K2201/0209

Abstract: The present disclosure relates to a resin composition, which serves as an insulation layer of a laminate for a printed circuit board while exhibiting adhesiveness to a metal base layer, the resin composition including: a rubber-modified epoxy resin; an epoxy resin; an inorganic filler; and a curing agent.

Abstract translation: 本发明涉及树脂组合物，该树脂组合物用作印刷电路板层压体的绝缘层，同时对金属基层具有粘附性，该树脂组合物包括：橡胶改性环氧树脂; 环氧树脂; 无机填料; 和固化剂。