公开(公告)号：US06501661B1

公开(公告)日：2002-12-31

申请号：US10027443

申请日：2001-12-21

Applicant: Kevin D. Moore ,  Thomas P. Gall ,  Jeffrey Lord

Inventor： Kevin D. Moore ,  Thomas P. Gall ,  Jeffrey Lord

IPC: H05K500

CPC classification number: H05K1/0278 ,  H05K1/189 ,  H05K3/0061 ,  H05K2201/09063 ,  H05K2201/09109 ,  H05K2201/09745 ,  H05K2203/302

Abstract: An electronic control unit (ECU) includes a flexible circuit substrate having a first partition interconnected to a third partition by a second, flexible partition. The electronic control unit further includes a rigidizer having a first partition interconnected to a third partition by a second partition. When the ECU is twice folded, the second, flexible partition of the circuit substrate assumes an approximate ‘U’-shape, resulting in a reduced cracking and splitting rate than the prior art. In various embodiments of the present invention, the assumption of a ‘U’-shaped fold in the second, flexible partition of the circuit substrate is facilitated by multiple apertures in a second rigidizer partition, by a depression in a second rigidizer partition, or by non-slidably affixing a first circuit substrate partition to a first rigidizer partition via a first adhesive and non-slidably affixing a third circuit substrate partition to a third rigidizer partition via a second adhesive.

Abstract translation: 电子控制单元（ECU）包括柔性电路基板，该柔性电路基板具有通过第二柔性隔板互连到第三隔板的第一隔板。 电子控制单元还包括刚性化器，其具有通过第二分隔件互连到第三分隔件的第一分隔件。 当ECU被两次折叠时，电路基板的第二柔性隔板呈现近似的“U”形，导致与现有技术相比降低的开裂和分裂速率。在本发明的各种实施例中，假设a “在第二刚性分隔器中的多个孔口，通过在第二刚性化器隔板中的凹陷，或通过不可滑动地将第一电路衬底隔板固定到第一刚性分隔件 经由第一粘合剂的刚性分隔件，并且通过第二粘合剂将第三电路基板隔板不可滑动地附接到第三刚性分隔件。

公开(公告)号：US06271477B1

公开(公告)日：2001-08-07

申请号：US09099700

申请日：1998-06-19

Applicant: David W. Carroll ,  Terry L. Travis

Inventor： David W. Carroll ,  Terry L. Travis

IPC: H05J100

CPC classification number: H05K1/028 ,  H05K2201/0133 ,  H05K2201/09109 ,  H05K2201/10204 ,  H05K2201/10598 ,  H05K2201/2027

Abstract: An apparatus and method for extending the durability and life span of flexible circuitry by limiting the bend radius of the flexible circuitry and distributing the flexure point about an extended portion of the circuitry. The assembly includes one or more flex-limiting members associated with and integrated between the layers of flexible circuitry laminate. A fastener is affixed to the flexible circuitry laminate, operatively coupling the one or more flex-limiting members in position adjacent the flexible circuitry laminate. The flex-limiting member limits flexure of the circuitry, during each individual bend, to or below a predetermined angle, thereby decreasing the rate of failure in the circuitry, for example via short circuit, as a result of repeated or excessive bending.

Abstract translation: 一种用于通过限制柔性电路的弯曲半径并且围绕电路的延伸部分分布挠曲点来延长柔性电路的耐久性和寿命的装置和方法。 该组件包括一个或多个柔性限制构件，其与柔性电路层叠体的层相关联并且在其之间集成。 紧固件固定到柔性电路层压板上，可操作地将一个或多个弯曲限制构件联接在与柔性电路层压板相邻的位置。 柔性限制部件将每个单独弯曲期间的电路的弯曲限制在预定角度或低于预定角度，从而由于重复或过度弯曲的结果，例如经由短路而降低电路的故障率。

公开(公告)号：US5804771A

公开(公告)日：1998-09-08

申请号：US721268

申请日：1996-09-26

Applicant: John F. McMahon ,  Ravi Mahajan

Inventor： John F. McMahon ,  Ravi Mahajan

IPC: H01L23/498 ,  H05K1/02 ,  H05K1/11 ,  H05K3/00 ,  H05K3/34 ,  H05K1/03

CPC classification number: H01L23/49822 ,  H01L23/49816 ,  H05K1/0271 ,  H01L2224/16 ,  H05K1/118 ,  H05K2201/068 ,  H05K2201/09109 ,  H05K2201/10674 ,  H05K2201/10734 ,  H05K3/0058 ,  H05K3/3436 ,  Y10T29/4913 ,  Y10T29/49144

Abstract: A flip chip integrated circuit package which provides stress relief for the solder bumps of the package. The package includes an integrated circuit that is mounted to a substrate. The integrated circuit is attached to a plurality of bond pads of the substrate by a number of corresponding solder bumps. The substrate has a first layer that is attached to a second layer. An area that is located between the layers and adjacent to the bond pads is left unattached so that a portion of the first layer can move independent of the remaining portion of the substrate. The unattached area allows the integrated circuit to "float" and expand at a different rate than the substrate when the package is thermally cycled.

Abstract translation: 一种倒装芯片集成电路封装，为封装的焊料凸块提供应力消除。 封装包括一个安装在基板上的集成电路。 集成电路通过多个对应的焊料凸点附着到衬底的多个接合焊盘。 衬底具有附接到第二层的第一层。 位于层之间并且与接合焊盘相邻的区域不附着，使得第一层的一部分可以独立于衬底的剩余部分移动。 未连接区域允许集成电路在封装热循环时以与衬底不同的速率“漂浮”并膨胀。

公开(公告)号：US5379193A

公开(公告)日：1995-01-03

申请号：US97520

申请日：1993-07-27

Applicant: Thomas P. Gall ,  James R. Loomis

Inventor： Thomas P. Gall ,  James R. Loomis

IPC: G06F1/18 ,  G06F15/173 ,  G06F15/80 ,  G11C5/00 ,  H01L21/822 ,  H01L23/52 ,  H01L27/04 ,  H05K1/03 ,  H05K3/00 ,  H05K3/46 ,  H05K1/14

CPC classification number: H05K3/4691 ,  H05K1/0373 ,  H05K2201/015 ,  H05K2201/09109 ,  H05K2201/10159 ,  H05K3/4641

Abstract: Disclosed is a parallel processor packaging structure and a method for manufacturing the structure. The individual logic and memory elements are on printed circuit cards. These printed circuit boards and cards are, in turn, mounted on or connected to circuitized flexible substrates extending outwardly from a laminate of the circuitized, flexible substrates. Intercommunication is provided through a switch structure that is implemented in the laminate. The printed circuit cards are mounted on or connected to a plurality of circuitized flexible substrates, with one printed circuit card at each end of the circuitized flexible circuit. The circuitized flexible substrates connect the separate printed circuit boards and cards through the central laminate portion. This laminate portion provides XY plane and Z-axis interconnection for inter-processor, inter-memory, inter-processor/memory element, and processor to memory bussing interconnection, and communication. The planar circuitization, as data lines, address lines, and control lines of a logic chip or a memory chip are on the individual printed circuit boards and cards, which are connected through the circuitized flex, and communicate with other layers of flex through Z-axis circuitization (vias and through holes) in the laminate.

Abstract translation: 公开了一种并行处理器封装结构和用于制造该结构的方法。 单独的逻辑和存储器元件在印刷电路卡上。 这些印刷电路板和卡依次安装在或连接到从电路化的柔性基板的层叠体向外延伸的电路化柔性基板上。 通过在层压板中实现的开关结构来提供互通。 印刷电路卡安装在或连接到多个电路化的柔性基板上，在电路化柔性电路的每一端具有一个印刷电路卡。 电路化的柔性基板通过中央层压体部分连接分开的印刷电路板和卡。 该层压部分为处理器间，存储器间，处理器间/存储器元件以及处理器到存储器总线互连和通信提供XY平面和Z轴互连。 作为逻辑芯片或存储器芯片的数据线，地址线和控制线的平面电路在通过电路化的柔性连接的各个印刷电路板和卡上，并且通过Z轴与其它柔性层通信， 轴向电路（通孔和通孔）。

公开(公告)号：US5347710A

公开(公告)日：1994-09-20

申请号：US098485

申请日：1993-07-27

Applicant: Thomas P. Gall ,  Howard L. Heck ,  John S. Kresge

Inventor： Thomas P. Gall ,  Howard L. Heck ,  John S. Kresge

IPC: H01L23/52 ,  G06F15/173 ,  G06F15/80 ,  H05K1/00 ,  H05K1/03 ,  H05K3/00 ,  H05K3/46 ,  H05K3/36

CPC classification number: H05K3/4635 ,  H05K3/462 ,  H05K1/0373 ,  H05K1/0393 ,  H05K2201/015 ,  H05K2201/0154 ,  H05K2201/09109 ,  H05K2201/09536 ,  H05K2201/10159 ,  H05K3/4623 ,  H05K3/4626 ,  H05K3/4641 ,  Y10T29/49126 ,  Y10T29/49155

Abstract: Disclosed is a parallel processor packaging structure and a method for manufacturing the structure. The individual logic and memory elements are on printed circuit cards. These printed circuit boards and cards are, in turn, mounted on or connected to circuitized flexible substrates extending outwardly from a laminate of the circuitized, flexible substrates. Intercommunication is provided through a switch structure that is implemented in the laminate. The printed circuit cards are mounted on or connected to a plurality of circuitized flexible substrates, with one printed circuit card at each end of the circuitized flexible circuit. The circuitized flexible substrates connect the separate printed circuit boards and cards through the central laminate portion. This laminate portion provides XY plane and Z-axis interconnection for inter-processor, inter-memory, inter-processor/memory element, and processor to memory bussing interconnection, and communication. The planar circuitization, as data lines, address lines, and control lines of a logic chip or a memory chip are on the individual printed circuit boards and cards, which are connected through the circuitized flex, and communicate with other layers of flex through Z-axis circuitization (vias and through holes) in the laminate.

Abstract translation: 公开了一种并行处理器封装结构和用于制造该结构的方法。 单独的逻辑和存储器元件在印刷电路卡上。 这些印刷电路板和卡依次安装在或连接到从电路化的柔性基板的层叠体向外延伸的电路化柔性基板上。 通过在层压板中实现的开关结构来提供互通。 印刷电路卡安装在或连接到多个电路化的柔性基板上，在电路化柔性电路的每一端具有一个印刷电路卡。 电路化的柔性基板通过中央层压体部分连接分开的印刷电路板和卡。 该层压部分为处理器间，存储器间，处理器间/存储器元件以及处理器到存储器总线互连和通信提供XY平面和Z轴互连。 作为逻辑芯片或存储器芯片的数据线，地址线和控制线的平面电路在通过电路化的柔性连接的各个印刷电路板和卡上，并且通过Z轴与其它柔性层通信， 轴向电路（通孔和通孔）。

公开(公告)号：US5265322A

公开(公告)日：1993-11-30

申请号：US28896

申请日：1993-03-08

Applicant: Timothy S. Fisher ,  Michael I. Petrites ,  Al Ocken

Inventor： Timothy S. Fisher ,  Michael I. Petrites ,  Al Ocken

IPC: H05K1/00 ,  H05K1/05 ,  H05K1/18 ,  H05K3/00 ,  H05K5/00

CPC classification number: H05K1/028 ,  H05K1/189 ,  H05K5/003 ,  H05K1/05 ,  H05K2201/09063 ,  H05K2201/09109 ,  H05K2201/10189 ,  H05K2201/2009 ,  H05K3/0061 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/49158

Abstract: A one-piece electronic module assembly is formed from a substantially rectangular baseplate on which an insulating film is mounted to carry circuit components. An enclosed assembly is completed by initially providing a pair of major bend axes across the baseplate, and forming inwardly extending notches at selected locations along lengthwise edges of the baseplate. The baseplate is bent at the notches to form a front wall, a pair of sidewalls and tabs that overlap the sidewalls. The baseplate is then bent over on itself along the major bend axes and sealed, if necessary, to form a completed assembly.

公开(公告)号：US5245509A

公开(公告)日：1993-09-14

申请号：US929532

申请日：1992-08-14

Applicant: Georg Seitz

Inventor： Georg Seitz

IPC: H01R12/71 ,  H05K1/02 ,  H05K1/11 ,  H05K1/18 ,  H05K3/00 ,  H05K3/32 ,  H05K3/34 ,  H05K5/02 ,  H05K7/20

CPC classification number: H05K1/189 ,  H01R12/716 ,  H05K1/0271 ,  H05K3/3421 ,  H05K1/111 ,  H05K1/118 ,  H05K2201/09109 ,  H05K2201/09745 ,  H05K2201/0999 ,  H05K2201/10189 ,  H05K2201/2009 ,  H05K3/0061 ,  Y02P70/613 ,  Y10T29/49144 ,  Y10T29/49149

Abstract: The invention relates to a printed circuit board disposed on a film serving as the carrier material. A connector strip having a large number of connection pins is disposed on the printed circuit board using surface-mounting technology. Connector strips of this type are widespread in digital technology. In the case of circuits in the fields of power electronics or motor vehicle electronics, connector strips cannot be surface-mounted because of the larger cross-sections of the connections. In a printed circuit board of the type mentioned at the outset, recesses are provided in the film stiffener underneath the solder points, such that when the connection pins of the connector strip are soldered, level differences in the connection pins are compensated by the deformation of the carrier film. With this measure, tensions are compensated for the most part by the deformation of the carrier film, so that connector strips for power electronics and motor vehicle electronics applications can also be surface-mounted.

Abstract translation: 本发明涉及一种布置在作为载体材料的薄膜上的印刷电路板。 具有大量连接引脚的连接器条使用表面安装技术设置在印刷电路板上。 这种类型的连接器条在数字技术中普遍存在。 在电力电子或机动车辆电子领域的电路的情况下，由于连接的较大横截面，连接器条不能被表面安装。 在一开始所述类型的印刷电路板中，在焊接点下方的薄膜加强件中设置有凹槽，使得当连接器条的连接销被焊接时，连接销的电平差由 载体膜。 通过这种措施，大部分通过载体膜的变形来补偿张力，使得用于电力电子和机动车辆电子应用的连接器条也可以被表面安装。

公开(公告)号：US4687695A

公开(公告)日：1987-08-18

申请号：US780806

申请日：1985-09-27

Applicant: Bill L. Hamby

Inventor： Bill L. Hamby

IPC: H05K3/00 ,  B32B23/02 ,  H05K1/00

CPC classification number: H05K3/4691 ,  H05K2201/0187 ,  H05K2201/0355 ,  H05K2201/09109 ,  Y10S428/901 ,  Y10T428/24777

Abstract: Flexible printed circuits and methods of fabricating and forming plated thru-holes therein are disclosed. The flexible printed circuits have one or more substantially rigid regions where plated thru-holes are to be formed, the regions being made rigid by the substitution of epoxy glass or other conventional rigid printed circuit board materials in place of the flexible material used for the flexible portions of the circuit. In this manner the thru-holes are formed through conventional printed circuit board layers, allowing plating of the thru-holes using conventional well developed techniques. This process avoids the necessity of plating thru-holes in flexible printed circuit materials currently requiring special equipment and techniques, and further avoids stress concentration at the junction between the rigid plated thru-holes and the adjacent flexible printed circuit. Various methods for forming such circuits and circuits so formed are disclosed.

Abstract translation: 公开了柔性印刷电路及其制造和形成电镀通孔的方法。 柔性印刷电路具有一个或多个基本上刚性的区域，其中将形成电镀通孔，该区域通过用环氧玻璃或其它常规刚性印刷电路板材料代替柔性材料而被制成刚性，用于柔性 部分电路。 以这种方式，通孔通过传统的印刷电路板层形成，允许使用常规的良好开发技术电镀穿孔。 该方法避免了在目前需要特殊设备和技术的柔性印刷电路材料中电镀穿孔的必要性，并且进一步避免了刚性电镀通孔和相邻的柔性印刷电路之间的接合处的应力集中。 公开了用于形成这样形成的这种电路和电路的各种方法。

公开(公告)号：US4092057A

公开(公告)日：1978-05-30

申请号：US764980

申请日：1977-02-02

Applicant: Tommy L. Walton

Inventor： Tommy L. Walton

IPC: H05K3/00 ,  H05K1/04

CPC classification number: H05K3/4691 ,  H01R12/62 ,  H05K2201/09109 ,  H05K2201/2009 ,  H05K2203/308 ,  H05K3/0058 ,  Y10T29/49155

Abstract: A flexible circuit assembly and a method of making it in which there are no separate electrical interconnections between the flexible interconnecting cable and the rigid connector. A flexible insulating film is bonded to a surface of the connector member and extends from the connector to provide a flexible interconnecting cable for external electrical connections. A plurality of conductors on the insulating film provides a continuous electrically conductive path thus providing an interfaceless electrical connection between the rigid connector and the flexible interconnecting cable. In the method, a metallic clad insulating film is placed on a surface of a rigid support member which includes a portion which will serve as the connector. The support member also includes a filler block portion in the space designated for the flexible interconnecting cable. The film is selectively bonded to the connector portion of the support member. Conductors are then formed on the insulating film. The filler block is then removed to leave a rigid connector and a flexible interconnecting cable which has a plurality of continuous conductors thereon thereby eliminating a separate electrical connection therebetween.

Abstract translation: 柔性电路组件及其制造方法，其中柔性互连电缆和刚性连接器之间不存在单独的电互连。 柔性绝缘膜结合到连接器构件的表面并从连接器延伸以提供用于外部电连接的柔性互连电缆。 绝缘膜上的多个导体提供连续的导电路径，从而在刚性连接器和柔性互连电缆之间提供无接触的电连接。 在该方法中，将金属包覆绝缘膜放置在刚性支撑构件的表面上，该刚性支撑构件包括将用作连接器的部分。 支撑构件还包括在为柔性互连电缆指定的空间中的填充块部分。 膜被选择性地结合到支撑构件的连接器部分。 然后在绝缘膜上形成导体。 然后移除填料块以留下刚性连接器和柔性互连电缆，其上具有多个连续的导体，从而消除它们之间的单独的电连接。

公开(公告)号：US3546775A

公开(公告)日：1970-12-15

申请号：US3546775D

申请日：1968-03-04

Applicant: SANDERS ASSOCIATES INC

Inventor： LALMOND HAROLD ,  GOODY LEWIS B

IPC: H05K1/11 ,  H05K3/00 ,  H05K3/18 ,  H05K3/46 ,  H02G15/00

CPC classification number: H05K3/4644 ,  H05K1/118 ,  H05K3/181 ,  H05K3/4611 ,  H05K3/4691 ,  H05K2201/09109 ,  H05K2201/0919 ,  H05K2201/09509 ,  H05K2203/063 ,  H05K2203/107 ,  Y10T29/49126 ,  Y10T29/49155