Abstract:
A semiconductor package may include a first substrate including a first connection portion disposed on a surface of the first substrate and a second substrate including a second connection portion disposed on a surface of the second substrate. The second substrate may be disposed over the first substrate and the second connection portion facing the first connection portion. A first connection loop portion may be provided to include an end connected to the first connection portion. A second connection loop portion may be provided to include one end connected to the second connection portion and the other end combined with the first connection loop portion.
Abstract:
A semiconductor package may include a first substrate including a first connection portion disposed on a surface of the first substrate and a second substrate including a second connection portion disposed on a surface of the second substrate. The second substrate may be disposed over the first substrate and the second connection portion facing the first connection portion. A first connection loop portion may be provided to include an end connected to the first connection portion. A second connection loop portion may be provided to include one end connected to the second connection portion and the other end combined with the first connection loop portion.
Abstract:
In order to prevent deformation or damage of a base of a lead terminal by alleviating stress which concentrates on the base of the lead terminal protruding from an electronic component main body, the lead terminal includes a connection pad connected to a connection terminal provided on a first substrate, and a lead portion extending from the connection pad, and the lead terminal also includes a first surface connected to the connection terminal, a second surface that is a rear surface thereof, and a third surface that is a side surface, and in which the lead portion includes a first bent section and a third bent section that are bent in a direction intersecting the first surface or the second surface, a second bent section that is bent in a direction intersecting the third surface between the first bent section and the third bent section.
Abstract:
A method of making an imprinted micro-wire structure includes providing a substrate, a first stamp, and a different multi-level second stamp. A curable bottom layer is provided over the substrate. One or more bottom-layer micro-channels) are imprinted in the curable bottom layer with the first stamp and a bottom-layer micro-wire formed in each bottom-layer micro-channel. A curable multi-layer is formed adjacent to and in contact with the cured bottom layer. First and second multi-layer micro-channels and a top-layer micro-channel are imprinted in the curable multi-layer with the multi-level second stamp. Either two bottom-layer micro-wires are electrically connected through the first and second multi-layer micro-wires and a top-layer micro-wire or two top-layer micro-wires are electrically connected through the first and second multi-layer micro-wires and a bottom-layer micro-wire.
Abstract:
A method of making an imprinted micro-wire structure includes providing a substrate and first, second, and third different stamps. A curable first layer is provided in relation to a substrate and imprinted with first, second, and third micro-channels using the first stamp. First, second, and third micro-wires are formed in the first, second, and third micro-channels. A curable second layer is provided adjacent to the first layer and imprinted with first and second connecting micro-channels. First and second connecting micro-wires are formed in the first and second connecting micro-channels. A curable third layer is provided and imprinted with a bridge micro-channel and a bridge micro-wire formed in the bridge micro-channel. The first and second micro-wires, the first and second connecting micro-wires, and the bridge micro-wire are electrically connected and electrically isolated from the third micro-wire.
Abstract:
A circuit board includes a first dielectric material, a second dielectric material, a third dielectric material, a first external circuit layer, a second external circuit layer, multiple conductive structures, and a conductive via structure. Dielectric constants of the first, the second and the third dielectric materials are different. The first and the second external circuit layers are respectively disposed on the first and the third dielectric materials. The conductive via structure at least penetrates the first and the second dielectric materials and is electrically connected to the first and the second external circuit layers to define a signal path. The conductive structures are electrically connected to each other and surround the first, the second and the third dielectric materials. The conductive structures are electrically connected to the first and the second external circuit layers to define a ground path surrounding the signal path.
Abstract:
Electroplating methods enable the plating of photoresist defined features which have substantially uniform morphology. The electroplating methods include copper electroplating baths with reaction products of α-amino acids and bisepoxides to electroplate the photoresist defined features. Such features include pillars, bond pads and line space features.
Abstract:
A transparent conductive film comprises a transparent substrate and a metal wiring portion formed thereon. A thin metal wire contained in an electrode portion in the metal wiring portion has a surface shape satisfying the condition of Ra2/Sm>0.01 μm and has a metal volume content of 35% or more. Ra represents an arithmetic average roughness in micrometers and is equal to or smaller than the thickness of a metal wiring located in a position where the surface roughness is measured. Sm represents an average distance between convex portions and is 0.01 μm or more.
Abstract:
A transparent conductive film comprises a transparent substrate and a metal wiring portion formed thereon. A thin metal wire contained in an electrode portion in the metal wiring portion has a surface shape satisfying the condition of Ra2/Sm>0.01 μm and has a metal volume content of 35% or more. Ra represents an arithmetic average roughness in micrometers and is equal to or smaller than the thickness of a metal wiring located in a position where the surface roughness is measured. Sm represents an average distance between convex portions and is 0.01 μm or more.
Abstract:
An electronic package is provided, which includes a substrate and an antenna board structure disposed on the substrate. The antenna board structure has a first portion, a second portion and a partition portion between the first portion and the second portion. As such, current can be split into two paths so as to spread electromagnetic radiation, and thus produce electromagnetic radiation with a high bandwidth.