公开(公告)号：US20110147057A1

公开(公告)日：2011-06-23

申请号：US12915582

申请日：2010-10-29

Applicant: Masaru Takada ,  Fusaji Nagaya ,  Takao Okada ,  Tomohiko Murata

Inventor： Masaru Takada ,  Fusaji Nagaya ,  Takao Okada ,  Tomohiko Murata

IPC: H05K1/09 ,  H05K1/02 ,  H05K3/00

CPC classification number: H05K1/111 ,  H01L21/4846 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0657 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2224/81385 ,  H01L2224/85411 ,  H01L2224/85444 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19041 ,  H05K3/244 ,  H05K3/28 ,  H05K3/3452 ,  H05K2201/09481 ,  H05K2201/09881 ,  H05K2201/10674 ,  H05K2203/049 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method for manufacturing a printed wiring board includes forming a pad for mounting an electronic component on a resin layer, forming a solder-resist layer on the resin layer and the pad, exposing an upper surface of the pad and a portion of a side wall of the pad from the solder-resist layer, and forming a metal layer on the upper surface of the pad and the portion of the side wall of the pad.

Abstract translation: 一种印刷电路板的制造方法，其特征在于，在树脂层上形成用于安装电子部件的焊盘，在树脂层和焊盘上形成阻焊层，露出焊盘的上表面和侧壁的一部分 的焊盘，并且在焊盘的上表面和焊盘的侧壁的部分上形成金属层。

公开(公告)号：US20110075392A1

公开(公告)日：2011-03-31

申请号：US12568941

申请日：2009-09-29

Applicant: Daryl Weispfennig ,  Bradley Schumacher ,  Kwong Kei Chin

Inventor： Daryl Weispfennig ,  Bradley Schumacher ,  Kwong Kei Chin

IPC: H05K1/14 ,  H05K3/34 ,  H05K1/00

CPC classification number: H05K1/0203 ,  H01L23/49537 ,  H01L23/49541 ,  H01L23/49568 ,  H01L23/49582 ,  H01L2924/0002 ,  H05K1/0263 ,  H05K1/0298 ,  H05K1/0313 ,  H05K1/09 ,  H05K1/115 ,  H05K1/181 ,  H05K3/202 ,  H05K3/42 ,  H05K3/4602 ,  H05K2201/0352 ,  H05K2201/09881 ,  H05K2201/09972 ,  H05K2201/10166 ,  H05K2201/10689 ,  H05K2203/175 ,  Y02P70/611 ,  Y10T29/49126 ,  H01L2924/00

Abstract: An integrated circuit assembly includes a first electrically conductive sheet, a second electrically conductive sheet electrically isolated from the first electrically conductive sheet, a non-conductive material disposed between the first and second electrically conductive sheets, an electrical trace disposed on the non-conductive material and electrically isolated from the first and second electrically conductive sheets, and an integrated circuit having at least one lead directly connected to the first electrically conductive sheet, at least one lead directly connected to the second electrically conductive sheet, and at least one lead electrically connected to the electrical trace. Other integrated circuit assemblies and method for making integrated circuit assemblies are also disclosed.

Abstract translation: 集成电路组件包括第一导电片，与第一导电片电隔离的第二导电片，设置在第一和第二导电片之间的非导电材料，设置在非导电材料上的电迹线 并且与第一和第二导电片电隔离，以及集成电路，其具有直接连接到第一导电片的至少一个引线，直接连接到第二导电片的至少一个引线，以及至少一个引线电连接 到电痕迹。 还公开了用于制造集成电路组件的其它集成电路组件和方法。

公开(公告)号：US07854062B2

公开(公告)日：2010-12-21

申请号：US12352372

申请日：2009-01-12

Applicant: Ryosuke Usui ,  Hideki Mizuhara ,  Yusuke Igarashi ,  Nobuhisa Takakusaki ,  Takeshi Nakamura

Inventor： Ryosuke Usui ,  Hideki Mizuhara ,  Yusuke Igarashi ,  Nobuhisa Takakusaki ,  Takeshi Nakamura

IPC: H01K3/10

CPC classification number: H01L21/486 ,  H01L23/3121 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5383 ,  H01L24/73 ,  H01L24/97 ,  H01L25/16 ,  H01L25/165 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/13055 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/351 ,  H05K1/0206 ,  H05K1/056 ,  H05K3/0035 ,  H05K3/284 ,  H05K3/421 ,  H05K3/423 ,  H05K3/4647 ,  H05K3/4652 ,  H05K3/4655 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09881 ,  H05K2203/0369 ,  H05K2203/0554 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/92247 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A method for manufacturing a circuit device, which is suitable for connecting a plurality of laminated wiring layers to each other through an insulating layer, is provided. In a method for manufacturing a hybrid integrated circuit device of the present invention, a first wring layer is formed by laminating a first conductive film on a first insulating layer, and patterning the first conductive film. In the first wiring layer, a first connection part which is protruded in a thickness direction is formed. Moreover, the first wiring layer including the first connection part is covered with a second insulating layer. The second insulating layer is formed of a first resin film and a second resin film. The second resin film contains fewer inorganic fillers than the first resin film. Thus, there is an advantage that a through-hole can be easily formed.

Abstract translation: 本发明提供一种适于通过绝缘层将多层叠布线层彼此连接的电路装置的制造方法。 在本发明的混合集成电路器件的制造方法中，通过在第一绝缘层上层叠第一导电膜，对第一导电膜进行图案化，形成第一绞合层。 在第一布线层中，形成沿厚度方向突出的第一连接部。 此外，包括第一连接部的第一布线层被第二绝缘层覆盖。 第二绝缘层由第一树脂膜和第二树脂膜形成。 第二树脂膜比第一树脂膜含有更少的无机填料。 因此，具有可以容易地形成通孔的优点。

公开(公告)号：US20100252304A1

公开(公告)日：2010-10-07

申请号：US12752692

申请日：2010-04-01

Applicant: Shigetsugu Muramatsu ,  Yasuhiko Kusama

Inventor： Shigetsugu Muramatsu ,  Yasuhiko Kusama

IPC: H05K1/11 ,  H05K1/09 ,  H05K3/00

CPC classification number: H05K3/3452 ,  H01L21/563 ,  H01L23/3121 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15151 ,  H05K1/111 ,  H05K3/0044 ,  H05K3/243 ,  H05K3/305 ,  H05K2201/0191 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2201/09736 ,  H05K2201/09881 ,  H05K2201/10674 ,  H05K2201/10977 ,  H05K2203/025 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A method of manufacturing a wiring board for use in mounting of an electronic component includes: forming an outermost wiring layer on a surface side where the electronic component is mounted; forming an insulating layer so as to cover the wiring layer; and forming a concave portion in the insulating layer. The concave portion is formed by removing, using a mask formed in a required shape by patterning, an exposed portion of the insulating layer in a step-like shape until a surface of a pad defined at a portion of the wiring layer is exposed. The concave portion is preferably formed by removing the portion of the insulating layer by sand blast.

Abstract translation: 制造电子部件安装用布线基板的方法包括：在安装有电子部件的表面侧形成最外层布线层; 形成绝缘层以覆盖所述布线层; 以及在所述绝缘层中形成凹部。 通过使用通过图案化形成所需形状的掩模，以阶梯状形状除去绝缘层的露出部分，直到露出布线层的一部分的焊盘的表面来形成凹部。 凹部优选通过用喷砂除去绝缘层的一部分而形成。

公开(公告)号：US20100209619A1

公开(公告)日：2010-08-19

申请号：US12662092

申请日：2010-03-30

Applicant: Hye Jin Cho ,  Jae Woo Joung ,  Sung Il Oh

Inventor： Hye Jin Cho ,  Jae Woo Joung ,  Sung Il Oh

IPC: B05D3/06 ,  B05D5/12

CPC classification number: H05K3/4664 ,  H05K3/125 ,  H05K3/4647 ,  H05K2201/0154 ,  H05K2201/09881 ,  H05K2203/013

Abstract: A method for manufacturing a printed wiring board having one or more layers of a conductive pattern and an insulating pattern, including forming an insulating pattern on an insulating substrate; semi-hardening at least one of the insulating substrate and the insulating pattern; forming a conductive pattern on the insulating substrate and/or the insulating pattern, thereby providing a stack structure; performing a thermal treatment on the stack structure to fully harden the semi-hardened insulating substrate and/or insulating pattern; and firing the conductive pattern. In the method, the conductive pattern and the insulating pattern are simultaneously formed on the same layer using an inkjet process.

Abstract translation: 一种制造具有一层或多层导电图案和绝缘图案的印刷布线板的方法，包括在绝缘基板上形成绝缘图案; 绝缘基板和绝缘图案中的至少一个半硬化; 在绝缘基板和/或绝缘图案上形成导电图案，从而提供堆叠结构; 对所述堆叠结构进行热处理，以使所述半硬化绝缘基板和/或绝缘图案完全硬化; 并激发导电图案。 在该方法中，使用喷墨工艺在同一层上同时形成导电图案和绝缘图案。

公开(公告)号：US07775177B2

公开(公告)日：2010-08-17

申请号：US11455637

申请日：2006-06-20

Applicant: Takashi Mori ,  Yuji Tsuruoka ,  Masao Furukawa ,  Seiichi Kamiya ,  Nobuhito Yamaguchi

Inventor： Takashi Mori ,  Yuji Tsuruoka ,  Masao Furukawa ,  Seiichi Kamiya ,  Nobuhito Yamaguchi

IPC: B05C5/02

CPC classification number: H05K3/125 ,  H05K3/107 ,  H05K3/465 ,  H05K3/4664 ,  H05K2201/09881 ,  H05K2203/013

Abstract: A circuit pattern forming device includes a liquid ejection device that ejects an insulating pattern forming solution and a conductive pattern forming solution onto a substrate to form insulating dots of the insulating solution and conductive dots of the conductive solution on the substrate. A control device controls an ejection operation that the liquid ejection device performs for each of the solutions. A moving device moves the liquid ejection device and the substrate relative to each other to form a circuit pattern composed of a plurality of the conductive dots and the insulating dots. The liquid ejection device includes a first nozzle array in which a plurality of nozzles for ejecting the insulating solution are arranged along a crossing direction crossing a main scan direction, and a second nozzle array in which a plurality of nozzles for ejecting the conductive solution are arranged along the crossing direction. The first nozzle array is disposed in front of the second nozzle array with respect to the main scan direction and the second nozzle array is arranged between a plurality of the first nozzle arrays. When the insulating dots and the conductive dots are formed close to each other on the substrate, the insulating dots, which are positioned in a direction in which the liquid ejection device moves relative to the substrate, are formed on the substrate prior to the conductive dots in a same main scan performed by the liquid ejection device.

Abstract translation: 电路图案形成装置包括：液体喷射装置，其将绝缘图案形成溶液和导电图案形成溶液喷射到基板上，以在基板上形成绝缘溶液的绝缘点和导电溶液的导电点。 控制装置控制液体喷射装置针对每个解决方案执行的喷射操作。 移动装置相对于彼此移动液体喷射装置和基板，以形成由多个导电点和绝缘点组成的电路图案。 液体喷射装置包括：第一喷嘴阵列，其中多个用于喷射绝缘溶液的喷嘴沿着与主扫描方向交叉的交叉方向排列;以及第二喷嘴阵列，其中布置多个用于喷射导电溶液的喷嘴 沿着交叉方向。 第一喷嘴阵列相对于主扫描方向设置在第二喷嘴阵列的前面，并且第二喷嘴阵列布置在多个第一喷嘴阵列之间。 当绝缘点和导电点在基板上彼此靠近地形成时，在导电点之前在基板上形成位于液体喷射装置相对于基板移动的方向上的绝缘点 在由液体喷射装置进行的相同的主扫描中。

公开(公告)号：US20100071950A1

公开(公告)日：2010-03-25

申请号：US12562956

申请日：2009-09-18

Applicant: Kohichi OHSUMI

Inventor： Kohichi OHSUMI

IPC: H05K1/11 ,  H05K3/00

CPC classification number: H05K3/3452 ,  H01L23/49811 ,  H01L23/49838 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H05K3/0044 ,  H05K3/243 ,  H05K2201/094 ,  H05K2201/09736 ,  H05K2201/09881 ,  H05K2201/099 ,  H05K2201/10734 ,  H05K2203/025 ,  H05K2203/0574

Abstract: A wiring board is comprised of a plurality of circular semiconductor element connection pads deposited in a lattice form onto a mounting portion of an insulation substrate, their upper surfaces being connected to electrodes of a semiconductor element, and a solder resist layer deposited onto the insulation substrate, which covers the side surfaces of these pads and exposes the upper surfaces of these pads. The solder resist layer has a concave part whose bottom surface corresponds to at least all the upper surfaces of these pads. A method of manufacturing a wiring board includes the step of forming a plurality of circular semiconductor element connection pads in a lattice form on a mounting portion of an insulation substrate; the step of depositing onto the insulation substrate a resin layer for a solder resist layer for burying these pads; and forming a solder resist layer by partially removing the resin layer, the solder resist layer covering the side surfaces of these pads and having a concave part whose bottom surface corresponds to at least all the upper surfaces of the pads.

Abstract translation: 布线板由以晶格形式沉积到绝缘基板的安装部分上的多个圆形半导体元件连接焊盘构成，其上表面连接到半导体元件的电极，以及沉积在绝缘基板上的阻焊层 ，其覆盖这些焊盘的侧表面并且暴露这些焊盘的上表面。 阻焊层具有凹部，其底表面至少对应于这些焊盘的所有上表面。 制造布线板的方法包括以下步骤：在绝缘基板的安装部分上形成格子状的多个圆形半导体元件连接焊盘; 在绝缘基板上沉积用于掩埋这些焊盘的阻焊层的树脂层的步骤; 以及通过部分地除去树脂层而形成阻焊层，所述阻焊层覆盖这些焊盘的侧表面，并且具有其底表面至少对应于焊盘的所有上表面的凹部。

公开(公告)号：US07662661B2

公开(公告)日：2010-02-16

申请号：US11304558

申请日：2005-12-16

Applicant: Bily Wang ,  Jonnie Chuang ,  Hui-Yen Huang

Inventor： Bily Wang ,  Jonnie Chuang ,  Hui-Yen Huang

IPC: H01L21/66 ,  G01R31/26 ,  H01L21/00 ,  H01L21/50 ,  H01L21/48 ,  H01L21/44

CPC classification number: H05K3/0052 ,  H05K1/056 ,  H05K3/445 ,  H05K2201/09881 ,  H05K2203/0228 ,  H05K2203/0278 ,  H05K2203/1536

Abstract: A method of manufacturing a substrate structure includes the steps of: (1) providing a metal substrate having a metal portion; (2) chemically etching a plurality of trenches in the metal substrate; (3) applying a polymer composite material into the trenches to form a substrate having a polymer composite portion abutted to the metal portion; (4) polishing a surface of the substrate to make a height of the polymer composite portion equal to that of the metal portion; (5) forming a covering material on the surface of the substrate; and (6) cutting the substrate via the polymer composite portion for decreasing cutting bur produced on the metal portion. Furthermore, the method is provided for combining the metal substrate and the polymer composite material, thereby to increase cutting precision and strength of the substrate structure.

Abstract translation: 一种制造衬底结构的方法包括以下步骤：（1）提供具有金属部分的金属衬底; （2）化学蚀刻金属基板中的多个沟槽; （3）将聚合物复合材料施加到沟槽中以形成具有与金属部分邻接的聚合物复合部分的基底; （4）研磨基板的表面，使聚合物复合部的高度与金属部的高度相等; （5）在基板的表面上形成覆盖材料; 和（6）通过聚合物复合部分切割基底以减少在金属部分上产生的切割毛刺。 此外，提供了用于组合金属基板和聚合物复合材料的方法，从而提高基板结构的切割精度和强度。

公开(公告)号：US20100018630A1

公开(公告)日：2010-01-28

申请号：US12461388

申请日：2009-08-11

Applicant: Hiroyuki Uematsu ,  Toshinobu Miyakoshi ,  Hisashi Kobuke

Inventor： Hiroyuki Uematsu ,  Toshinobu Miyakoshi ,  Hisashi Kobuke

IPC: B28B3/00

CPC classification number: H05K3/281 ,  H01L2924/0002 ,  H05K1/0206 ,  H05K1/0269 ,  H05K1/0306 ,  H05K3/4007 ,  H05K3/4611 ,  H05K3/4629 ,  H05K2201/0367 ,  H05K2201/096 ,  H05K2201/09781 ,  H05K2201/09881 ,  H05K2203/1189 ,  H05K2203/308 ,  H01L2924/00

Abstract: In a method for manufacturing a composite wiring board, a through hole is formed in a sheet having a shrinkage-suppressing effect, and the through hole is filled with conductive paste to obtain a sheet for formation of a conductor. The sheet for formation of the conductor and a green sheet for a substrate in their laminated state are fired to obtain a ceramic substrate having a surface provided with a sintered metal conductor. A fired product of the sheet having the shrinkage-suppressing effect is removed from the surface of the ceramic substrate. Finally, a resin layer is formed on the surface of the ceramic substrate.

Abstract translation: 在制造复合布线板的方法中，在具有收缩抑制效果的片材中形成通孔，并且通孔填充有导电膏以获得用于形成导体的片材。 烧结用于形成导体的片材和用于基板的生片的层叠状态，得到具有设置有烧结金属导体的表面的陶瓷基板。 从陶瓷基板的表面除去具有收缩抑制效果的片材的烧成品。 最后，在陶瓷基板的表面上形成树脂层。

公开(公告)号：US07565738B2

公开(公告)日：2009-07-28

申请号：US11138932

申请日：2005-05-25

Applicant: Ryosuke Usui ,  Hideki Mizuhara ,  Yusuke Igarashi ,  Nobuhisa Takakusaki ,  Hayato Abe

Inventor： Ryosuke Usui ,  Hideki Mizuhara ,  Yusuke Igarashi ,  Nobuhisa Takakusaki ,  Hayato Abe

IPC: H01K3/10

CPC classification number: H01L21/486 ,  H01L23/3121 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5383 ,  H01L24/73 ,  H01L24/97 ,  H01L25/16 ,  H01L25/165 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/13055 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/351 ,  H05K1/0206 ,  H05K1/056 ,  H05K3/0035 ,  H05K3/284 ,  H05K3/421 ,  H05K3/423 ,  H05K3/4647 ,  H05K3/4652 ,  H05K3/4655 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09881 ,  H05K2203/0369 ,  H05K2203/0554 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/92247 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A method for manufacturing a circuit device, which is suitable for connecting a plurality of laminated wiring layers to each other through an insulating layer, is provided. In a method for manufacturing a hybrid integrated circuit device of the present invention, a first wring layer is formed by laminating a first conductive film on a first insulating layer, and patterning the first conductive film. In the first wiring layer, a first connection part which is protruded in a thickness direction is formed. Moreover, the first wiring layer including the first connection part is covered with a second insulating layer. The second insulating layer is formed of a first resin film and a second resin film. The second resin film contains fewer inorganic fillers than the first resin film. Thus, there is an advantage that a through-hole can be easily formed.

Abstract translation: 本发明提供一种适于通过绝缘层将多层叠布线层彼此连接的电路装置的制造方法。 在本发明的混合集成电路器件的制造方法中，通过在第一绝缘层上层叠第一导电膜，对第一导电膜进行构图来形成第一绞合层。 在第一布线层中，形成沿厚度方向突出的第一连接部。 此外，包括第一连接部的第一布线层被第二绝缘层覆盖。 第二绝缘层由第一树脂膜和第二树脂膜形成。 第二树脂膜比第一树脂膜含有更少的无机填料。 因此，具有可以容易地形成通孔的优点。