WIRING SUBSTRATE
    25.
    发明公开
    WIRING SUBSTRATE 审中-公开

    公开(公告)号:US20230145004A1

    公开(公告)日:2023-05-11

    申请号:US18050636

    申请日:2022-10-28

    Inventor: Toshiki FURUTANI

    CPC classification number: H05K1/113 H05K1/024 H05K2201/10166 H05K2201/09563

    Abstract: A wiring substrate includes a first insulating layer, a conductor layer including first and second pads, a second insulating layer having first openings exposing the first pads and a second opening exposing the second pads, metal posts formed on the first pads and filling the first openings, and a wiring structure positioned in the second opening and having first and second connection pads such that the second connection pads are connected to the second pads. The upper surfaces of the first connection pads and the upper surfaces of the metal posts form a component mounting surface having first, second and third regions, the first connection pads are formed in the first, second and third regions and include a group of first connection pads formed in the first and second regions and electrically connected and a group of first connection pads formed in the first and third regions and electrically connected.

    PRINTED CIRCUIT BOARD COMPRISING A PLURALITY OF POWER TRANSISTOR SWITCHING CELLS IN PARALLEL

    公开(公告)号:US20230142725A1

    公开(公告)日:2023-05-11

    申请号:US18054946

    申请日:2022-11-14

    Applicant: IDENERGIE INC

    Abstract: A printed circuit board comprises N power switching cells operating in parallel and respectively comprising a transistor leg, at least one decoupling capacitor and a gate driver circuit. Each transistor leg comprises respective first and second transistors in series, a drain of the first transistor being connected to a positive DC line, a source of the second transistor being connected to a negative DC line, a source of the first transistor being connected to a drain of the second through a connection middle-point connected to an output terminal. Each gate driver circuit controls respective switching ON and OFF of the corresponding first and second transistors. The N transistor legs of the corresponding N power switching cells are positioned to substantially form a convex polygon having N edges of substantially the same length, each one of the N transistor legs being positioned along one of the edges of the convex polygon.

    SYSTEMS, ARTICLES, AND METHODS FOR ELECTROMYOGRAPHY SENSORS

    公开(公告)号:US20190192037A1

    公开(公告)日:2019-06-27

    申请号:US16292609

    申请日:2019-03-05

    Applicant: North Inc.

    Abstract: Systems, articles, and methods for surface electromyography (“EMG”) sensors that combine elements from traditional capacitive and resistive EMG sensors are described. For example, capacitive EMG sensors that are adapted to resistively couple to a user's skin are described. Resistive coupling between a sensor electrode and the user's skin is galvanically isolated from the sensor circuitry by a discrete component capacitor included downstream from the sensor electrode. The combination of a resistively coupled electrode and a discrete component capacitor provides the respective benefits of traditional resistive and capacitive (respectively) EMG sensor designs while mitigating respective drawbacks of each approach. A wearable EMG device that provides a component of a human-electronics interface and incorporates such capacitive EMG sensors is also described.

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