公开(公告)号：US20070003839A1

公开(公告)日：2007-01-04

申请号：US10567889

申请日：2004-08-05

Applicant: Marc Rabarot ,  Mathieu Kipp ,  Christophe Kopp

Inventor： Marc Rabarot ,  Mathieu Kipp ,  Christophe Kopp

IPC: G03F1/00

CPC classification number: B81C1/00103 ,  B81C2201/0159 ,  G03F7/70216

Abstract: The invention concerns a photolithography fabrication method enabling production of patterns in a photosensitive resin layer (601) placed on a substrate (600). The patterns (607) comprise flanks (608) inclined relative to a normal ({right arrow over (n)}) relative to the principal plane of the substrate and which have an angle of inclination (θ) far greater to that of the patterns obtained according to the prior art. The invention also concerns a device allowing said method to be executed.

Abstract translation: 本发明涉及能够在放置在基板（600）上的感光性树脂层（601）中制造图形的光刻制造方法。 图案（607）包括相对于法线倾斜的侧面（608）（相对于基底的主平面（{n）的向右箭头），并且具有比根据 本发明还涉及允许执行所述方法的装置。

公开(公告)号：US20060084012A1

公开(公告)日：2006-04-20

申请号：US10965279

申请日：2004-10-14

Applicant: Ralph Nuzzo ,  William Childs ,  Michael Motala ,  Keon Lee

Inventor： Ralph Nuzzo ,  William Childs ,  Michael Motala ,  Keon Lee

IPC: G03F7/00

CPC classification number: G03F7/0002 ,  B81C1/0038 ,  B81C2201/0159 ,  B81C2201/0191 ,  B81C2203/038 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/34 ,  G03F7/346

Abstract: A method of making a microstructure includes selectively activating a portion of a surface of a silicon-containing elastomer, contacting the activated portion with a substance, and bonding the activated portion and the substance, such that the activated portion of the surface and the substance in contact with the activated portion are irreversibly attached. The selective activation may be accomplished by positioning a mask on the surface of the silicon-containing elastomer, and irradiating the exposed portion with UV radiation.

Abstract translation: 制造微结构的方法包括选择性地激活含硅弹性体的表面的一部分，使活化部分与物质接触，并且将活化部分和物质接合，使得表面的活化部分和物质的活性部分 与活化部分的接触不可逆地附着。 选择性激活可以通过将掩模定位在含硅弹性体的表面上，并用UV辐射照射暴露部分来实现。

公开(公告)号：US06790698B2

公开(公告)日：2004-09-14

申请号：US09954861

申请日：2001-09-18

Applicant: Michael F. Miller ,  Minh Van Le ,  Christopher C. Cook ,  Dale C. Flanders ,  Steven F. Nagle

Inventor： Michael F. Miller ,  Minh Van Le ,  Christopher C. Cook ,  Dale C. Flanders ,  Steven F. Nagle

IPC: H01L2100

CPC classification number: B81B3/0083 ,  B81B2201/042 ,  B81B2201/047 ,  B81C1/0038 ,  B81C2201/0159 ,  B81C2201/053 ,  B81C2201/056 ,  G02B26/001

Abstract: A process for patterning dielectric layers of the type typically found in optical coatings in the context of MEMS manufacturing is disclosed. A dielectric coating is deposited over a device layer, which has or will be released, and patterned using a mask layer. In one example, the coating is etched using the mask layer as a protection layer. In another example, a lift-off process is shown. The primary advantage of photolithographic patterning of the dielectric layers in optical MEMS devices is that higher levels of consistency can be achieved in fabrication, such as size, location, and residual material stress. Competing techniques such as shadow masking yield lower quality features and are difficult to align. Further, the minimum feature size that can be obtained with shadow masks is limited to ˜100 &mgr;m, depending on the coating system geometry, and they require hard contact with the surface of the wafer, which can lead to damage and/or particulate contamination.

Abstract translation: 公开了一种用于在MEMS制造的上下文中通常在光学涂层中发现的类型的介电层图案的工艺。 电介质涂层沉积在器件层上，器件层已经或将被释放，并使用掩模层进行图案化。 在一个实例中，使用掩模层作为保护层来蚀刻涂层。 在另一示例中，示出了剥离过程。 光学MEMS器件中电介质层的光刻图案的主要优点是可以在诸如尺寸，位置和残余材料应力的制造中实现更高水平的稠度。 诸如阴影掩蔽的竞争技术产生较低的质量特征并且难以对准。 此外，根据涂层系统的几何形状，使用荫罩可获得的最小特征尺寸限制在〜100μm，并且它们需要与晶片的表面硬接触，这可能导致损坏和/或微粒污染。

公开(公告)号：US20040028327A1

公开(公告)日：2004-02-12

申请号：US10620348

申请日：2003-07-17

Applicant: BinOptics Corporation

Inventor： Alex Behfar ,  Alfred T. Schremer ,  Cristian B. Stagarescu

IPC: G02B006/26 ,  G02B006/42 ,  G02B006/10

CPC classification number: G02B6/12002 ,  B81B2201/047 ,  B81C99/008 ,  B81C2201/0159 ,  G02B6/13 ,  G02B6/4204 ,  G02B6/4249 ,  G03F7/0037 ,  Y10S438/948 ,  Y10S438/949 ,  Y10S438/95

Abstract: Three-dimensional structures of arbitrary shape are fabricated on the surface of a substrate through a series of processing steps wherein a monolithic structure is fabricated in successive layers. A first layer of photoresist material is spun onto a substrate surface and is exposed in a desired pattern corresponding to the shape of a final structure, at a corresponding cross-sectional level in the structure. The layer is not developed after exposure; instead, a second layer of photoresist material is deposited and is also exposed in a desired pattern. Subsequent layers are spun onto the top surface of prior layers and exposed, and upon completion of the succession of layers each defining corresponding levels of the desired structure, the layers are all developed at the same time leaving the three-dimensional structure.

Abstract translation: 通过一系列处理步骤在基板的表面上制造任意形状的三维结构，其中单片结构以连续的层制造。 将第一层光致抗蚀剂材料旋转到基底表面上，并以对应于最终结构的形状的所需图案以结构中相应的横截面水平曝光。 暴露后层不发达; 相反，沉积第二层光致抗蚀剂材料并且也以期望的图案曝光。 随后的层被旋转到现有层的顶部表面上并暴露，并且在完成相继层级的各层限定所需结构的相应水平时，所有层都同时显现出离开三维结构。

公开(公告)号：US06454987B1

公开(公告)日：2002-09-24

申请号：US09602273

申请日：2000-06-23

Applicant: Takanori Katoh ,  Yanping Zhang

Inventor： Takanori Katoh ,  Yanping Zhang

IPC: B29C5916

CPC classification number: B81C1/00126 ,  B32B3/02 ,  B32B27/06 ,  B81C2201/0159 ,  G03F7/00 ,  G03F7/075 ,  G03F7/09 ,  G03F7/2039 ,  Y10S430/167 ,  Y10S430/168

Abstract: A laminated substrate is prepared, the laminated substrate having two layers including a first film and a second film in tight contact with the first film, the second film being made of a material capable of being etched with synchrotron radiation light. A mask member with a pattern is disposed in tight contact with the surface of the second film of the laminated structure or at a distance from the surface of the second film, the pattern of the mask member being made of a material not transmitting the synchrotron radiation light. The synchrotron radiation light is applied on a partial surface area of the second film via the mask member to etch the second film where the synchrotron radiation light is applied and to expose a partial surface area of the first film on the bottom of an etched area.

公开(公告)号：US20020048839A1

公开(公告)日：2002-04-25

申请号：US09954861

申请日：2001-09-18

Applicant: AXSUN Technologies, Inc.

Inventor： Michael F. Miller ,  Minh Van Le ,  Christopher C. Cook ,  Dale C. Flanders ,  Steven F. Nagle

IPC: H01L021/00

CPC classification number: B81B3/0083 ,  B81B2201/042 ,  B81B2201/047 ,  B81C1/0038 ,  B81C2201/0159 ,  B81C2201/053 ,  B81C2201/056 ,  G02B26/001

Abstract: A process for patterning dielectric layers of the type typically found in optical coatings in the context of MEMS manufacturing is disclosed. A dielectric coating is deposited over a device layer, which has or will be released, and patterned using a mask layer. In one example, the coating is etched using the mask layer as a protection layer. In another example, a lift-off process is shown. The primary advantage of photolithographic patterning of the dielectric layers in optical MEMS devices is that higher levels of consistency can be achieved in fabrication, such as size, location, and residual material stress. Competing techniques such as shadow masking yield lower quality features and are difficult to align. Further, the minimum feature size that can be obtained with shadow masks is limited to null100 nullm, depending on the coating system geometry, and they require hard contact with the surface of the wafer, which can lead to damage and/or particulate contamination.

Abstract translation: 公开了一种用于在MEMS制造的上下文中通常在光学涂层中发现的类型的介电层图案的工艺。 电介质涂层沉积在器件层上，器件层已经或将被释放，并使用掩模层进行图案化。 在一个实例中，使用掩模层作为保护层来蚀刻涂层。 在另一示例中，示出了剥离过程。 光学MEMS器件中电介质层的光刻图案的主要优点是可以在诸如尺寸，位置和残余材料应力的制造中实现更高水平的稠度。 诸如阴影掩蔽的竞争技术产生较低的质量特征并且难以对准。 此外，根据涂层系统的几何形状，使用荫罩可获得的最小特征尺寸限制在〜100μm，并且它们需要与晶片的表面硬接触，这可能导致损坏和/或微粒污染。

公开(公告)号：US5496668A

公开(公告)日：1996-03-05

申请号：US340617

申请日：1994-11-16

Applicant: Henry Guckel ,  Todd R. Christenson ,  Kenneth Skrobis

Inventor： Henry Guckel ,  Todd R. Christenson ,  Kenneth Skrobis

IPC: G03F7/027 ,  B81B1/00 ,  B81C1/00 ,  G03F7/00 ,  G03F7/20 ,  G03F7/26 ,  G03F7/30 ,  G03F7/38 ,  G03F7/40 ,  H01L21/027 ,  H05K3/18

CPC classification number: G03F7/38 ,  B81C1/0038 ,  G03F7/00 ,  G03F7/0035 ,  B81C2201/0128 ,  B81C2201/0159 ,  B81C2201/019 ,  B81C2201/032 ,  Y10S430/168 ,  Y10T428/31504

Abstract: In the formation of microstructures, a preformed sheet of photoresist, such as polymethylmethacrylate (PMMA), which is strain free, may be milled down before or after adherence to a substrate to a desired thickness. The photoresist is patterned by exposure through a mask to radiation, such as X-rays, and developed using a developer to remove the photoresist material which has been rendered susceptible to the developer. Micrometal structures may be formed by electroplating metal into the areas from which the photoresist has been removed. The photoresist itself may form useful microstructures, and can be removed from the substrate by utilizing a release layer between the substrate and the preformed sheet which can be removed by a remover which does not affect the photoresist. Multiple layers of patterned photoresist can be built up to allow complex three dimensional microstructures to be formed.

公开(公告)号：US5378583A

公开(公告)日：1995-01-03

申请号：US66988

申请日：1993-05-24

Applicant: Henry Guckel ,  Todd R. Christenson ,  Kenneth Skrobis

Inventor： Henry Guckel ,  Todd R. Christenson ,  Kenneth Skrobis

IPC: G03F7/027 ,  B81B1/00 ,  B81C1/00 ,  G03F7/00 ,  G03F7/20 ,  G03F7/26 ,  G03F7/30 ,  G03F7/38 ,  G03F7/40 ,  H01L21/027 ,  H05K3/18 ,  G03C5/00

CPC classification number: G03F7/38 ,  B81C1/0038 ,  G03F7/00 ,  G03F7/0035 ,  B81C2201/0128 ,  B81C2201/0159 ,  B81C2201/019 ,  B81C2201/032 ,  Y10S430/168 ,  Y10T428/31504

Abstract: In the formation of microstructures, a preformed sheet of photoresist, such as polymethylmethacrylate (PMMA), which is strain free, may be milled down before or after adherence to a substrate to a desired thickness. The photoresist is patterned by exposure through a mask to radiation, such as X-rays, and developed using a developer to remove the photoresist material which has been rendered susceptible to the developer. Micrometal structures may be formed by electroplating metal into the areas from which the photoresist has been removed. The photoresist itself may form useful microstructures, and can be removed from the substrate by utilizing a release layer between the substrate and the preformed sheet which can be removed by a remover which does not affect the photoresist. Multiple layers of patterned photoresist can be built up to allow complex three dimensional microstructures to be formed.

Abstract translation: 在微结构的形成中，可以在将粘附到基底上之前或之后将预成型的光致抗蚀剂片材（例如无甲基丙烯酸甲酯（PMMA））磨碎到期望的厚度。 光致抗蚀剂通过掩模通过掩模曝光到例如X射线的辐射而被图案化，并且使用显影剂显影以除去已经对显影剂易感的光致抗蚀剂材料。 微米结构可以通过将金属电镀到已经除去光致抗蚀剂的区域中而形成。 光致抗蚀剂本身可以形成有用的微结构，并且可以通过利用基材和预成型片材之间的剥离层从基材上除去，该剥离层可以通过不影响光致抗蚀剂的去除剂去除。 可以构建多层图案化的光致抗蚀剂，以形成复杂的三维微结构。

公开(公告)号：US20240174512A1

公开(公告)日：2024-05-30

申请号：US17994471

申请日：2022-11-28

Applicant: TAIWAN MASK CORPORATION

Inventor： SHANG-KUANG WU ,  YU-TSUNG FU ,  MING-WEI HUANG

IPC: B81C1/00

CPC classification number: B81C1/00055 ,  B81C2201/0133 ,  B81C2201/0142 ,  B81C2201/0159

Abstract: A MEMS probe and manufacturing method thereof are provided. The method is mainly to form connected first-level, second-level, and third-level pin grooves on both sides of the silicon substrate through an etching process, followed by two electroplating processes to deposit nickel-cobalt-phosphorus alloy in the first-level pin groove to form the tip of the microprobe, and to deposit nickel-cobalt alloy in the second-level pin groove and the third-level pin to form the pin head and pin arm, thereby forming a three-level microprobe. A circuit substrate made of ceramic material is disposed with at least one window, the surface of the circuit substrate adjacent to the window is provided with a plurality of circuit pads, and the circuit substrate is abutted to the pin arm of the microprobe. The silicon substrate is then removed, to form a plurality of cantilever microprobes made of nickel-cobalt-phosphorus alloy and nickel-cobalt alloy on the circuit substrate.

公开(公告)号：US11903139B2

公开(公告)日：2024-02-13

申请号：US17181756

申请日：2021-02-22

Applicant: CARNEGIE MELLON UNIVERSITY

Inventor： Carmel Majidi ,  Burak Ozdoganlar ,  Arya Tabatabai ,  Bulent Arda Gozen

IPC: H05K3/10 ,  H05K1/02 ,  G03F7/00 ,  H05K3/28 ,  H05K1/16

CPC classification number: H05K3/107 ,  G03F7/0002 ,  H05K1/0283 ,  B81C2201/0156 ,  B81C2201/0159 ,  H05K1/162 ,  H05K3/281 ,  H05K2201/0162 ,  H05K2201/10015 ,  H05K2203/0108 ,  H05K2203/0156

Abstract: The disclosure describes a soft-matter electronic device having micron-scale features, and methods to fabricate the electronic device. In some embodiments, the device comprises an elastomer mold having microchannels, which are filled with an eutectic alloy to create an electrically conductive element. The microchannels are sealed with a polymer to prevent the alloy from escaping the microchannels. In some embodiments, the alloy is drawn into the microchannels using a micro-transfer printing technique. Additionally, the molds can be created using soft-lithography or other fabrication techniques. The method described herein allows creation of micron-scale circuit features with a line width and spacing that is an order-of-magnitude smaller than those previously demonstrated.