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    APPARATUS, RADAR SYSTEM, AND METHOD FOR DETECTING A TARGET MOTION
    41.
    发明申请
    APPARATUS, RADAR SYSTEM, AND METHOD FOR DETECTING A TARGET MOTION 有权

    公开(公告)号：US20250067839A1

    公开(公告)日：2025-02-27

    申请号：US18796091

    申请日：2024-08-06

    Applicant: Infineon Technologies AG

    Inventor： Daniel Englisch ,  Christoph Jürgen Will

    IPC: G01S7/35 ,  G01S13/62

    Abstract: In accordance with an embodiment, a method includes: obtaining a magnitude of a frequency spectrum of a receive signal of the radar sensor, wherein the frequency spectrum comprises a first portion and a second portion within a frequency bandwidth divided into bins, and wherein the first and second portions are symmetrically positioned with respect to a center frequency; for at least one bin in the first portion, determining a bin threshold based on the magnitude of the frequency spectrum within one or more bins in the second portion; for at least one bin in the second portion, determining a bin threshold based on the magnitude of the frequency spectrum within one or more bins in the first portion; and detecting a target motion in response to the magnitude of the frequency spectrum exceeding the bin threshold in at least one bin within the frequency bandwidth.

    Mesa contact for MOS controlled power semiconductor device and method of producing a power semiconductor device
    42.
    发明授权
    Mesa contact for MOS controlled power semiconductor device and method of producing a power semiconductor device 有权

    公开(公告)号：US12237381B2

    公开(公告)日：2025-02-25

    申请号：US17680456

    申请日：2022-02-25

    Applicant: Infineon Technologies AG

    Inventor： Alim Karmous

    IPC: H01L29/417 ,  H01L27/06 ,  H01L29/10 ,  H01L29/66 ,  H01L29/739

    Abstract: A power semiconductor device includes: a semiconductor body having a first surface and a mesa portion that includes a surface part of the first surface and a body region; at least two trenches extending from the first surface into the semiconductor body along a vertical direction, each trench including a trench electrode and trench insulator insulating the trench electrode from the semiconductor body, the mesa portion being laterally confined by the trenches in a first vertical cross-section along a first lateral direction; and a contact plug in contact with the body region. The contact plug and trench electrode of a first trench laterally overlap at least partially in the first vertical cross-section. A protection structure having a portion arranged within the first trench is arranged between the contact plug and trench electrode of the first trench. The protection structure may be an electrically insulation structure or a protective device structure.

    POWER SEMICONDUCTOR MODULE ARRANGEMENT AND METHOD FOR PRODUCING THE SAME
    44.
    发明申请
    POWER SEMICONDUCTOR MODULE ARRANGEMENT AND METHOD FOR PRODUCING THE SAME 有权

    公开(公告)号：US20250062170A1

    公开(公告)日：2025-02-20

    申请号：US18797721

    申请日：2024-08-08

    Applicant: Infineon Technologies AG

    Inventor： Markus Wiesemann ,  Anita Herzer

    IPC: H01L23/29 ,  H01L21/56 ,  H01L23/31

    Abstract: A power semiconductor module arrangement includes: a substrate arranged in or forming a ground surface of a housing having sidewalls; at least one semiconductor body arranged on the substrate; a first layer partly filling the housing and completely covering the substrate and the at least one semiconductor body arranged thereon; and a second layer arranged adjacent to the first layer. The first layer is a liquid or gel-like layer. The second layer is a solid or gel-like layer. The first layer is arranged between the substrate and the second layer. The second layer is arranged distant from a top of the housing.

    FRAME REPLICATION AND ELIMINATION ON MICROCONTROLLER
    48.
    发明申请
    FRAME REPLICATION AND ELIMINATION ON MICROCONTROLLER 有权

    公开(公告)号：US20250053527A1

    公开(公告)日：2025-02-13

    申请号：US18366968

    申请日：2023-08-08

    Applicant: Infineon Technologies AG

    Inventor： Tobias Islinger ,  Harald Zweck

    IPC: G06F13/28

    Abstract: Some aspects of the present disclosure relate to a network processor. The network processor includes a system bus, a central processing unit (CPU) coupled to the system bus, a random access memory (RAM) coupled to the CPU via the system bus; a plurality of network ports coupled to the CPU and the RAM; and a network bridge coupled between the CPU and the plurality of network ports. The network bridge includes a first transmit Direct Memory Access (DMA) circuit and a first transmit memory buffer coupled between the first transmit DMA circuit and a first network port, and a receive memory buffer and frame parser hardware arranged between the receive memory buffer and the system bus.

    Apparatus and method of forming a semiconductor layer
    49.
    发明授权
    Apparatus and method of forming a semiconductor layer 有权

    公开(公告)号：US12224175B2

    公开(公告)日：2025-02-11

    申请号：US17509256

    申请日：2021-10-25

    Applicant: Infineon Technologies AG

    Inventor： Olaf Fiedler ,  Daniel Kai Simon

    IPC: H01L21/02 ,  C23C16/24 ,  C23C16/448 ,  C23C16/52 ,  H01L21/687

    Abstract: A method of forming a silicon layer includes introducing a source gas containing a precursor material and a carrier gas into a reactor, controlling a gas flow of the source gas through a first main flow controller unit in response to a change of a concentration of the precursor material in the source gas, introducing an auxiliary gas into the reactor, and controlling a gas flow of the auxiliary gas through a second main flow controller unit such that a total gas flow of the source gas and the auxiliary gas into the reactor is held constant when the gas flow of the source gas changes.

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