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41.发明申请公开(公告)号：US20170346500A1
公开(公告)日：2017-11-30
申请号：US15674700
申请日：2017-08-11
Applicant: MaxLinear, Inc.
Inventor： Xuefeng Chen , Kok Lim Chan , Eric Fogleman , Sheng Ye
CPC classification number: H03M1/38 , H03M1/06 , H03M1/0682 , H03M1/125 , H03M1/466
Abstract: A system for processing signals may be configured to detect occurrence of particular errors, comprising meta-stability events, during digital conversion to analog signals, and to handle any detected meta-stability event, such as by adjusting at least a portion of a corresponding digital output based on detection of the meta-stability event. The adjusting of the digital output may comprise setting at least the portion of the digital output, such as to one of a plurality of predefined digital values or patterns. The system may comprise a code generator for generating and/or outputting the predefined digital values or patterns. The system may comprise a selector for adaptively selecting, for portions of the digital output, between output of normal processing path and between predefined values or patterns.
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公开(公告)号：US20170331566A1
公开(公告)日：2017-11-16
申请号：US15668883
申请日：2017-08-04
Applicant: Maxlinear, Inc.
Inventor： Curtis Ling , Sheng Ye
CPC classification number: H04B7/086 , H01Q3/24 , H01Q3/247 , H01Q3/267 , H04B7/0617 , H04B10/25752 , H04B10/40 , H04B10/43 , H04B17/0085 , H04B17/12 , H04B2201/709709
Abstract: Each of a plurality of modules comprises a respective one of a plurality of antenna elements, and each of a subset of the plurality of modules comprising a respective one of a plurality of transceivers, wherein the plurality of modules are interconnected via one or more communication links. The circuitry may be operable to receive a calibration signal via the plurality of antenna elements, determine, for each one of the antenna elements, a time and/or phase of arrival of the calibration signal, calculate, based on the time and/or phase of arrival of the calibration signal at each of the plurality of antenna elements, electrical distances between the plurality of antenna elements on the one or more communication links, and calculate beamforming coefficients for use with the plurality of antenna elements based on the electrical distances.
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公开(公告)号：US09768852B2
公开(公告)日：2017-09-19
申请号：US14931103
申请日：2015-11-03
Applicant: Maxlinear, Inc.
Inventor： Curtis Ling , Sheng Ye
CPC classification number: H04B7/086 , H01Q3/24 , H01Q3/247 , H01Q3/267 , H04B7/0617 , H04B10/25752 , H04B10/40 , H04B10/43 , H04B17/0085 , H04B17/12 , H04B2201/709709
Abstract: Each of a plurality of modules comprises a respective one of a plurality of antenna elements, and each of a subset of the plurality of modules comprising a respective one of a plurality of transceivers, wherein the plurality of modules are interconnected via one or more communication links. The circuitry may be operable to receive a calibration signal via the plurality of antenna elements, determine, for each one of the antenna elements, a time and/or phase of arrival of the calibration signal, calculate, based on the time and/or phase of arrival of the calibration signal at each of the plurality of antenna elements, electrical distances between the plurality of antenna elements on the one or more communication links, and calculate beamforming coefficients for use with the plurality of antenna elements based on the electrical distances.
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公开(公告)号：US20170150202A1
公开(公告)日：2017-05-25
申请号：US15426382
申请日：2017-02-07
Applicant: Maxlinear, Inc.
Inventor： Anand Anandakumar , Sheng Ye , Curtis Ling
IPC: H04N21/426 , H04N21/61 , H04N21/438 , H04N21/443
CPC classification number: H04N21/4263 , H04N5/44 , H04N5/50 , H04N21/4383 , H04N21/4436 , H04N21/4622 , H04N21/6143
Abstract: Methods and systems for multi-path video and network channels may comprise a communication device comprising a wideband tuner (WB) and a narrowband tuner (NB). A video channel and a network channel may be received in the WB when the device is operating in a first stage. A video channel and a network channel may be received in the WB and the network channel may also be received in the NB when the device is operating in a second stage. The network channel may be received in the NB when the device is operating in a third stage. The reception of the network channel from both the WB and NB may enable a continuous reception of the network channel in a transition between the first and third stages. The WB may be operable to receive a plurality of channels and the NB may be operable to receive a single channel.
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公开(公告)号：US20160261298A1
公开(公告)日：2016-09-08
申请号：US15155102
申请日：2016-05-16
Applicant: MaxLinear, Inc.
Inventor： Kishore Seendripu , Raymond Montemayor , Sheng Ye , Glenn Chang , Curtis Ling
IPC: H04B1/26
CPC classification number: H04B1/26 , H03D3/007 , H03D3/008 , H03D3/009 , H03D7/14 , H03D7/1441 , H03D7/1458 , H03D7/1475 , H03D7/165 , H03D7/166 , H03D2200/0086 , H03H11/22 , H04B1/10 , H04B1/109 , H04B1/12 , H04B1/30 , H04B15/00 , H04J1/18 , H04L27/34
Abstract: Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.
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Patent Agency Ranking
公开(公告)号：US20150023237A1
公开(公告)日：2015-01-22
申请号：US14450343
申请日：2014-08-04
Applicant: MaxLinear, Inc.
Inventor： James Qiu , Sridhar Ramesh , Sheng Ye , Curtis Ling
CPC classification number: H04W52/0245 , H03G3/20 , H04B1/109 , H04B17/00 , H04L1/20 , H04L27/06 , H04W88/02 , Y02D70/00 , Y02D70/40
Abstract: A communication receiver which applies signal processing for quantitatively estimating receive signal factors such as communication channel quality, signal characteristics, and overall system received bit error rate (BER) or packet error rate (PER) and which applies a general algorithm for mapping these estimated factors to control receiver performance and minimize power consumption.
Abstract translation: 一种通信接收机，其应用信号处理，用于定量估计诸如通信信道质量，信号特征和总体系统接收误比特率（BER）或分组差错率（PER）的接收信号因子，并且其应用用于映射这些估计因子的通用算法 以控制接收机性能并降低功耗。
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47.发明申请公开(公告)号：US20140106696A1
公开(公告)日：2014-04-17
申请号：US13943701
申请日：2013-07-16
Applicant: MAXLINEAR, INC.
Inventor： Sheng Ye , Paul Chominsky
IPC: H04B1/16
CPC classification number: H04B1/16 , H03L7/0898 , H03L7/1976
Abstract: A receiver includes a mixer, a filter, a received signal strength indicator, and a control loop. The mixer is adapted to convert the frequency of a received signal. The filter is adapted to filter out undesired signals that may be present in the output signal of the mixer. The received signal strength indicator is adapted to detect blocker (also known as jammer) signals that may be present in the output signal of the low-pass filter and generate a feedback signal in response. The control loop is adapted to vary its bandwidth in response to the feedback signal of the received signal strength indicator. The control loop supplies an oscillating signal to the mixer.
Abstract translation: 接收机包括混频器，滤波器，接收信号强度指示器和控制回路。 混频器适于转换接收信号的频率。 滤波器适于滤除可能存在于混频器的输出信号中的不期望的信号。 所接收的信号强度指示符适于检测可能存在于低通滤波器的输出信号中的阻塞（也称为干扰信号）信号，并产生响应的反馈信号。 控制回路适于响应于接收信号强度指示器的反馈信号来改变其带宽。 控制回路向振荡器提供振荡信号。
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公开(公告)号：US10349112B2
公开(公告)日：2019-07-09
申请号：US16110593
申请日：2018-08-23
Applicant: Maxlinear, Inc.
Inventor： Anand Anandakumar , Sheng Ye , Curtis Ling
IPC: G06F3/00 , H04N21/426 , H04N5/44 , H04N5/50 , H04N21/438 , H04N21/443 , H04N21/462 , H04N21/61
Abstract: Methods and systems for multi-path video and network channels may comprise a communication device comprising a wideband tuner (WB) and a narrowband tuner (NB). A video channel and a network channel may be received in the WB when the device is operating in a first stage. A video channel and a network channel may be received in the WB and the network channel may also be received in the NB when the device is operating in a second stage. The network channel may be received in the NB when the device is operating in a third stage. The reception of the network channel from both the WB and NB may enable a continuous reception of the network channel in a transition between the first and third stages. The WB may be operable to receive a plurality of channels and the NB may be operable to receive a single channel.
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公开(公告)号：US20190158135A1
公开(公告)日：2019-05-23
申请号：US16255881
申请日：2019-01-24
Applicant: Maxlinear, Inc.
Inventor： Curtis Ling , Sheng Ye
Abstract: A transceiver comprises local oscillator circuitry, phase noise determination circuitry, mixing circuitry, and digital signal processing circuitry. The local oscillator circuitry is operable to generate a local oscillator signal. The phase noise determination circuitry is operable to introduce a frequency-dependent phase shift to the local oscillator signal to generate a phase-shifted version of the local oscillator signal. The mixing circuitry is operable to mix the local oscillator signal and the phase-shifted version of the local oscillator to generate a baseband signal having an amplitude proportional to a phase difference between the local oscillator signal and the phase-shifted version of the local oscillator signal. The digital signal processing circuity is operable to process the baseband signal to determine a phase error of the local oscillator signal, and perform signal compensation based on the determined phase error.
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公开(公告)号：US10243576B2
公开(公告)日：2019-03-26
申请号：US15974756
申请日：2018-05-09
Applicant: Maxlinear, Inc.
Inventor： Eric Fogleman , Sheng Ye , Xuefeng Chen , Kok Lim Chan
Abstract: An asynchronous successive approximation register analog-to-digital converter (SAR ADC), which utilizes one or more overlapping redundant bits in each digital-to-analog converter (DAC) code word, is operable to generate an indication signal that indicates completion of each comparison step and indicates that an output decision for each comparison step is valid. A timer may be initiated based on the generated indication signal. A timeout signal may be generated that preempts the indication signal and forces a preemptive decision, where the preemptive decision sets one or more remaining bits up to, but not including, the one or more overlapping redundant bits in a corresponding digital-to-analog converter code word for a current comparison step to a particular value. For example, the one or more remaining bits may be set to a value that is derived from a value of a bit that was determined in an immediately preceding decision.
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