公开(公告)号：US08223504B2

公开(公告)日：2012-07-17

申请号：US12630232

申请日：2009-12-03

Applicant: Kazunori Kotani

Inventor： Kazunori Kotani

IPC: H05K9/00

CPC classification number: H05K7/142 ,  H05K1/0215 ,  H05K1/0298 ,  H05K3/325 ,  H05K3/3452 ,  H05K3/3457 ,  H05K2201/09309 ,  H05K2201/09481 ,  H05K2201/099

Abstract: A structure for supporting a printed wiring board housed in a housing of an electronic device. The supporting structure includes a first projection formed on the housing and projecting toward the printed wiring board. The electronic device includes a conductor plate, which is grounded and accommodated in the housing. A second projection is formed on the conductor plate and projects toward the printed wiring board. The printed wiring board includes a substrate and a ground layer, which is arranged on the substrate. The first projection of the housing and the second projection of the conductor plate hold and support the printed wiring board in between and thereby electrically connect the ground layer to the conductor plate.

Abstract translation: 一种用于支撑容纳在电子设备的壳体中的印刷线路板的结构。 支撑结构包括形成在壳体上并朝向印刷线路板突出的第一突起。 电子设备包括导体板，其被接地并容纳在壳体中。 在导体板上形成第二突起，朝向印刷线路板突出。 印刷布线板包括布置在基板上的基板和接地层。 壳体的第一突起和导体板的第二突起将印刷线路板保持并支撑在其间，从而将接地层与导体板电连接。

公开(公告)号：US20120145445A1

公开(公告)日：2012-06-14

申请号：US13403042

申请日：2012-02-23

Applicant: Masashi ARAI ,  Mayuko NISHIHARA

Inventor： Masashi ARAI ,  Mayuko NISHIHARA

IPC: H05K1/18 ,  H05K3/40 ,  H05K1/11 ,  H05K3/46

CPC classification number: H01L23/5389 ,  H01L23/49827 ,  H01L23/50 ,  H01L25/0652 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2924/09701 ,  H01L2924/3511 ,  H05K1/186 ,  H05K3/4069 ,  H05K3/4652 ,  H05K3/4673 ,  H05K2201/0195 ,  H05K2201/09481 ,  H05K2201/09827 ,  H05K2201/09845 ,  H05K2201/10636 ,  H05K2203/0191 ,  Y02P70/611 ,  Y10T29/4916

Abstract: A resin multilayer substrate includes a component-containing layer and a thin resin layer stacked on a surface of the component-containing layer. The resin multilayer substrate further includes a surface electrode located on a surface opposite to the surface of the thin resin layer stacked on the component-containing layer, a first via conductor provided in the component-containing layer, which includes an end reaching one surface of the component-containing layer, and a second via conductor provided in the thin resin layer, which includes a first end electrically connected to the surface electrode and a second end electrically connected to the via conductor. A portion of the thin resin layer in contact with the second via conductor defines a projection projecting into the first via conductor.

Abstract translation: 树脂多层基板包括层叠在含有成分层的表面上的成分含有层和薄树脂层。 树脂多层基板还包括位于与层叠在含有成分层的薄树脂层的表面相反的表面上的表面电极，设置在含有成分的层中的第一通孔导体， 所述部件含有层和设置在所述薄树脂层中的第二通路导体，所述第二通路导体包括电连接到所述表面电极的第一端和与所述通孔导体电连接的第二端。 与第二通孔导体接触的薄树脂层的一部分限定突出到第一通孔导体中的突起。

公开(公告)号：US08199518B1

公开(公告)日：2012-06-12

申请号：US12708033

申请日：2010-02-18

Applicant: Jong Ok Chun ,  Nozad Karim ,  Richard Chen ,  Giuseppe Selli ,  Michael Kelly

Inventor： Jong Ok Chun ,  Nozad Karim ,  Richard Chen ,  Giuseppe Selli ,  Michael Kelly

IPC: H05K7/10

CPC classification number: H01L24/49 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/552 ,  H01L23/66 ,  H01L24/48 ,  H01L24/73 ,  H01L2223/6655 ,  H01L2223/6677 ,  H01L2224/04042 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0215 ,  H05K1/0218 ,  H05K1/115 ,  H05K1/165 ,  H05K7/10 ,  H05K2201/09436 ,  H05K2201/09481 ,  H05K2201/10287 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An electronic component package includes a substrate and an electronic component mounted to the substrate, the electronic component including a bond pad. A first antenna terminal is electrically connected to the bond pad, the first antenna terminal being electrically connected to a second antenna terminal of the substrate. A package body encloses the electronic component, the package body having a principal surface. An antenna is formed on the principal surface by applying an electrically conductive coating. An embedded interconnect extends through the package body between the substrate and the principal surface and electrically connects the second antenna terminal to the antenna. Applying an electrically conductive coating to form the antenna is relatively simple thus minimizing the overall package manufacturing cost. Further, the antenna is relatively thin thus minimizing the overall package size.

Abstract translation: 电子部件封装包括基板和安装到基板的电子部件，电子部件包括接合焊盘。 第一天线端子电连接到接合焊盘，第一天线端子电连接到衬底的第二天线端子。 封装体包围电子部件，封装主体具有主表面。 通过施加导电涂层在主表面上形成天线。 嵌入式互连件在基板和主表面之间延伸穿过封装主体并将第二天线端子电连接到天线。 施加导电涂层以形成天线相对简单，从而使整体封装制造成本最小化。 此外，天线相对较薄，从而使整体封装尺寸最小化。

公开(公告)号：US08166653B2

公开(公告)日：2012-05-01

申请号：US12801870

申请日：2010-06-29

Applicant: Hwa Sun Park ,  Tae Eui Kim

Inventor： Hwa Sun Park ,  Tae Eui Kim

IPC: H01K3/10

CPC classification number: H05K1/167 ,  H05K1/095 ,  H05K3/4069 ,  H05K3/4644 ,  H05K2201/09481 ,  Y10T29/435 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: A method of manufacturing a printed circuit board (PCB) having embedded resistors, including providing a PCB on which internal layer circuit patterns, including electrode pads, are formed; layering insulating layers on the PCB; forming first via holes on the electrode pads and simultaneously forming second via holes at predetermined locations on the internal layer circuit patterns; forming contact pads for connecting the electrode pads with resistors by filling the first via holes with oxidation-resistant conductive material and flattening the oxidation-resistant conductive material; forming the resistors so that ends of each resistor are connected to two respective contact pads, which are spaced apart from each other; forming circuit patterns on the PCB, in which the second via holes are formed; and layering insulting layers on the PCB having the formed circuit patterns, and forming external layer circuit patterns.

Abstract translation: 一种具有嵌入式电阻器的印刷电路板（PCB）的制造方法，其特征在于，提供形成有包含电极焊盘的内层电路图案的PCB; 在PCB上分层绝缘层; 在电极焊盘上形成第一通孔并同时在内层电路图形上的预定位置形成第二通孔; 形成用于通过用耐氧化导电材料填充第一通孔并使抗氧化导电材料变平的方式将电极焊盘与电阻器连接的接触焊盘; 形成电阻器，使得每个电阻器的端部连接到彼此间隔开的两个相应的接触焊盘; 在PCB上形成电路图案，其中形成第二通孔; 以及在PCB上具有形成的电路图案的层叠绝缘层，以及形成外部层电路图案。

公开(公告)号：US08136242B2

公开(公告)日：2012-03-20

申请号：US12047622

申请日：2008-03-13

Applicant: Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

Inventor： Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

IPC: H01R43/16

CPC classification number: H01R12/714 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01R12/52 ,  H05K3/326 ,  H05K3/4007 ,  H05K7/1061 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09745 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49002 ,  Y10T29/49121 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49213 ,  Y10T29/49218 ,  Y10T29/49222 ,  H01L2924/00

Abstract: A method of producing a land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. A plurality of electrically-conductive elements are arranged about the surface of the at least one hemi-toroidal interposer and extend radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane.

Abstract translation: 一种制造包括电绝缘载体平面的平面栅格阵列（LGA）插入器结构以及安装在所述载体平面的第一表面上的至少一个插入件的方法。 插入件在横截面中具有半环形结构，并由介电弹性体材料构成。 多个导电元件围绕至少一个半环形插入器的表面布置并且从其最上端向内和向下自由地延伸至与位于电绝缘载体的相对侧上的至少一个部件的电接触 飞机

公开(公告)号：US08122596B2

公开(公告)日：2012-02-28

申请号：US12787182

申请日：2010-05-25

Applicant: Peter Krulevitch ,  Dennis L. Polla ,  Mariam N. Maghribi ,  Julie Hamilton ,  Mark S. Humayun ,  James D. Weiland

Inventor： Peter Krulevitch ,  Dennis L. Polla ,  Mariam N. Maghribi ,  Julie Hamilton ,  Mark S. Humayun ,  James D. Weiland

IPC: H05K3/30

CPC classification number: A61N1/0543 ,  H05K1/118 ,  H05K3/205 ,  H05K3/4007 ,  H05K2201/0162 ,  H05K2201/09481 ,  H05K2203/0733 ,  Y10S623/90 ,  Y10S623/901 ,  Y10S623/905 ,  Y10S623/926 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49139 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49169 ,  Y10T29/49224

Abstract: An image is captured or otherwise converted into a signal in an artificial vision system. The signal is transmitted to the retina utilizing an implant. The implant consists of a polymer substrate made of a compliant material such as poly(dimethylsiloxane) or PDMS. The polymer substrate is conformable to the shape of the retina. Electrodes and conductive leads are embedded in the polymer substrate. The conductive leads and the electrodes transmit the signal representing the image to the cells in the retina. The signal representing the image stimulates cells in the retina.

Abstract translation: 图像被捕获或以其他方式转换成人造视觉系统中的信号。 使用植入物将信号传输到视网膜。 植入物由由诸如聚（二甲基硅氧烷）或PDMS的柔顺材料制成的聚合物基材组成。 聚合物基材与视网膜的形状一致。 电极和导电引线嵌入在聚合物基底中。 导电引线和电极将表示图像的信号传输到视网膜中的细胞。 表示图像的信号刺激视网膜中的细胞。

公开(公告)号：US08111519B2

公开(公告)日：2012-02-07

申请号：US13015725

申请日：2011-01-28

Applicant: Chih-kuang Yang

Inventor： Chih-kuang Yang

IPC: H05K7/00

CPC classification number: H05K1/147 ,  H01L23/13 ,  H01L23/5385 ,  H01L25/162 ,  H01L2224/48091 ,  H01L2924/01322 ,  H01L2924/19107 ,  H05K1/142 ,  H05K3/4611 ,  H05K2201/058 ,  H05K2201/091 ,  H05K2201/09109 ,  H05K2201/0919 ,  H05K2201/09481 ,  Y10T29/417 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T428/24322 ,  Y10T428/24917 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.

Abstract translation: 多层基板的混合结构包括第一多层基板和第二多层基板。 第一多层基板交替地堆叠第一金属层，第一介电层并具有VIA。 第一金属层的边界区域与相应的第一介电层的边界区域连接。 边界区域与相邻的第一金属层和相邻的第一介电层分离。 第二多层基板交替堆叠第二金属层和第二电介质层。 第二金属层的边界区域与相应的第二电介质层的边界区域连接。 边界区域与相邻的第二金属层和相邻的第二介电层分离。 VIA位于第一电介质层的边界区，并且每个VIA具有导电体，以将一个第一金属层与一个第二金属层连接。

公开(公告)号：US20110312196A1

公开(公告)日：2011-12-22

申请号：US12818770

申请日：2010-06-18

Applicant: STEVEN J. MILLARD ,  DUSTIN G. ROWE ,  BRUCE A. CHAMPION ,  JUSTIN D. PICKEL

Inventor： STEVEN J. MILLARD ,  DUSTIN G. ROWE ,  BRUCE A. CHAMPION ,  JUSTIN D. PICKEL

IPC: H01R12/14

CPC classification number: H05K3/366 ,  H05K1/0231 ,  H05K1/025 ,  H05K1/0281 ,  H05K1/147 ,  H05K3/4691 ,  H05K2201/044 ,  H05K2201/09481

Abstract: A flexible circuit is provided. The flexible circuit includes a circuit board mating end and a flexible body extending from the circuit board mating end. A conductive pathway extends through the flexible body to electrically couple circuit boards. A connector pad is positioned on the circuit board mating end. The conductive pathway electrically engages the connector pad. The connector pad is configured to electrically couple the flexible circuit to one of the circuit boards. A layer of uncured material extends between the connector pad and the conductive pathway. The layer of uncured material increases an impedance of the connector pad.

Abstract translation: 提供了一个灵活的电路。 柔性电路包括电路板配合端和从电路板配合端延伸的柔性体。 导电通路延伸穿过柔性体以电耦合电路板。 连接器垫位于电路板配合端。 导电通路电连接连接器垫。 连接器焊盘被配置为将柔性电路电耦合到电路板之一。 一层未固化的材料在连接器焊盘和导电通路之间延伸。 未固化的材料层增加了连接器焊盘的阻抗。

公开(公告)号：US20110310547A1

公开(公告)日：2011-12-22

申请号：US13195638

申请日：2011-08-01

Applicant: Cheng Siew TAY ,  Wendy Chet Ming NGOH ,  Choi Keng CHAN

Inventor： Cheng Siew TAY ,  Wendy Chet Ming NGOH ,  Choi Keng CHAN

IPC: G06F1/16 ,  H05K13/04 ,  H05K7/02

CPC classification number: H05K1/111 ,  H05K2201/09227 ,  H05K2201/09281 ,  H05K2201/09481 ,  H05K2201/10734 ,  Y02P70/611 ,  Y10T29/49144 ,  Y10T29/5313

Abstract: A printed circuit board includes a group of pads suitable to be soldered to a respective group of solder-balls of a device. Each pad of the group has a crack initiation point on its perimeter at a location where cracks in a solder-ball are anticipated to start after that solder-ball is soldered to that pad. For a pad of that group having a microvia located therein, a center of that microvia is located farther than a center of that pad from its crack initiation point. For a pad of that group having a trace merging along a portion of its perimeter, that portion does not include a vicinity of that crack initiation point.

Abstract translation: 印刷电路板包括适合于焊接到装置的相应组焊球的一组焊盘。 该组的每个焊盘在其焊接球被焊接到该焊盘之后预期在焊球上的裂纹开始的位置处具有在其周边上的裂纹起始点。 对于具有位于其中的微孔的该组的垫，该微孔的中心位于比该垫的中心从其裂纹起始点更远的位置。 对于具有沿着其周边的一部分的轨迹合并的该组的焊盘，该部分不包括该裂纹起始点的附近。

公开(公告)号：US08080741B2

公开(公告)日：2011-12-20

申请号：US12149522

申请日：2008-05-02

Applicant: Myung Sam Kang ,  Chin Kwan Kim

Inventor： Myung Sam Kang ,  Chin Kwan Kim

IPC: H05K1/11

CPC classification number: H05K3/4007 ,  H05K3/246 ,  H05K3/3457 ,  H05K3/4069 ,  H05K2201/0347 ,  H05K2201/0367 ,  H05K2201/0376 ,  H05K2201/09481 ,  H05K2201/09745

Abstract: A printed circuit board, which increases the contact area between an IC and a printed circuit board, thus increasing the degree of adhesion, is disclosed. The printed circuit board includes: an insulation layer which includes a first circuit pattern, including at least one via land, embedded in the upper surface of the insulation layer to be flush with the upper surface, and a second circuit pattern formed in the lower surface of the insulation layer to be flush with the lower surface; a solder resist layer formed on the insulation layer; a via hole and a bump integrally formed on the second circuit pattern through the via hole and the via land such that it protrudes from the insulation layer to be higher than the solder resist layer.

Abstract translation: 公开了一种印刷电路板，其增加了IC和印刷电路板之间的接触面积，从而增加了粘合度。 印刷电路板包括：绝缘层，其包括嵌入在绝缘层的上表面中以与上表面齐平的至少一个通孔焊盘的第一电路图案，以及形成在下表面中的第二电路图案 的绝缘层与下表面齐平; 形成在绝缘层上的阻焊层; 通孔和通过通孔和通孔焊盘一体地形成在第二电路图案上的突起，使得其从绝缘层突出成高于阻焊层。