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    Optically transparent electrode
    41.
    发明授权
    Optically transparent electrode 有权
    光学透明电极

    公开(公告)号：US09204536B2

    公开(公告)日：2015-12-01

    申请号：US14382843

    申请日：2013-03-26

    Applicant: Mitsubishi Paper Mills Limited

    Inventor： Takenobu Yoshiki

    IPC: H05K1/00 ,  H05K1/02 ,  G06F3/045 ,  G06F3/044 ,  H05K1/03 ,  H05K1/09

    CPC classification number: H05K1/0274 ,  G06F3/044 ,  G06F3/045 ,  H05K1/0296 ,  H05K1/0306 ,  H05K1/09 ,  H05K1/11 ,  H05K2201/0108 ,  H05K2201/09681 ,  H05K2201/09727

    Abstract: The present invention provides an optically transparent electrode being resistant to corrosion regardless of the shape of the pattern and enabling uniform electroless plating thereon regardless of the shape of the pattern. The optically transparent electrode has, on a support, an optically transparent electrode unit and a peripheral wire unit formed of at least one peripheral wire, of which one end is electrically connected with the optically transparent electrode unit and the other end is connected with the outside, and the optically transparent electrode unit and the peripheral wire unit are formed of the same metal. The line width of at least one metal wire forming the peripheral wire unit is not uniform, and when the at least one metal wire is divided into a thinnest metal wire segment A and the other metal wire segment B electrically connected with the metal wire segment A, the line width of the metal wire segment A is 1.2 to 20 times the line width of the metal wires forming the optically transparent electrode unit, the line width of the metal wire segment B is 1.5 to 3 times the line width of the metal wire segment A, and the number of peripheral wires where the total length of the metal wire segment A of a single peripheral wire is 0.01 to 40 times the total length of the metal wire segment B of the same wire accounts for 40% or more of the total number of wires in the peripheral wire unit.

    Abstract translation: 本发明提供一种光学透明的电极，无论图案的形状如何，均能耐腐蚀，并且能够均匀地进行化学镀，而与图案的形状无关。 光学透明电极在支撑体上具有光透明的电极单元和由至少一个外围导线形成的外围线单元，外围线的一端与光学透明电极单元电连接，另一端与外部连接 并且光透明电极单元和外围线单元由相同的金属形成。 形成周边线单元的至少一根金属线的线宽不均匀，当至少一根金属线分为最薄金属线段A和与金属线段A电连接的另一金属线段B时 金属线段A的线宽为形成光透明电极单元的金属线的线宽的1.2〜20倍，金属线段B的线宽为金属线的线宽的1.5〜3倍 段A，单个外围线的金属线段A的总长度为同一导线的金属线段B的总长度的0.01〜40倍的外围线的数量为40％以上 外围线单元中的总线数。

    PRINTED WIRING BOARD
    43.
    发明申请
    PRINTED WIRING BOARD 有权
    印刷线路板

    公开(公告)号：US20150342030A1

    公开(公告)日：2015-11-26

    申请号：US14717456

    申请日：2015-05-20

    Applicant: FUJIKURA LTD

    Inventor： Hirohito WATANABE ,  Taiji OGAWA

    IPC: H05K1/02

    CPC classification number: H05K1/0216 ,  H01P3/085 ,  H05K1/0225 ,  H05K1/0237 ,  H05K1/025 ,  H05K1/0393 ,  H05K2201/0715 ,  H05K2201/09027 ,  H05K2201/09681 ,  H05K2201/09727

    Abstract: To suppress occurrence of a difference in transmission time due to a difference in length between signal lines, there is provided a printed wiring board having: an insulating substrate (10); a first signal line (L31A) that constitutes differential signal lines formed on the insulating substrate (10) and includes a curved portion; a second signal line (L31B) provided along the first signal line (L31A) and side by side inside the curved portion; and a ground layer (30) formed for the first signal line (L31A) and the second signal line (L31B) via an insulating material (10). The ground layer (30) includes a first ground layer (G31A) corresponding to a first region (D1) and a second ground layer (G31B) corresponding to a second region (D2). The first region (D1) is defined based on the first signal line (L31A) and has a first predetermined width (W31A). The second region (D2) is defined based on the second signal line (L31B) and has a second predetermined width (W31B). The first ground layer (G31A) has a remaining ratio lower than a remaining ratio of the second ground layer (G31B).

    Abstract translation: 为了抑制由于信号线之间的长度差导致的传输时间差的发生，提供了一种印刷线路板，其具有：绝缘基板（10）; 第一信号线（L31A），其构成形成在绝缘基板（10）上并包括弯曲部分的差分信号线; 沿着第一信号线（L31A）设置并并列在弯曲部分内的第二信号线（L31B）; 以及经由绝缘材料（10）为第一信号线（L31A）和第二信号线（L31B）形成的接地层（30）。 接地层（30）包括对应于第一区域（D1）的第一接地层（G31A）和对应于第二区域（D2）的第二接地层（G31B）。 第一区域（D1）基于第一信号线（L31A）定义并具有第一预定宽度（W31A）。 第二区域（D2）基于第二信号线（L31B）被定义并且具有第二预定宽度（W31B）。 第一接地层（G31A）的剩余比率比第二接地层（G31B）的剩余率低。

    Circuit board with signal routing layer having uniform impedance
    45.
    发明授权
    Circuit board with signal routing layer having uniform impedance 有权
    具有信号路由层的电路板具有均匀的阻抗

    公开(公告)号：US09161437B2

    公开(公告)日：2015-10-13

    申请号：US13864262

    申请日：2013-04-17

    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.

    Inventor： Kai-Wen Wu

    IPC: H05K1/03 ,  H05K1/02

    CPC classification number: H05K1/0253 ,  H05K1/0216 ,  H05K1/025 ,  H05K2201/093 ,  H05K2201/09409 ,  H05K2201/09727

    Abstract: A circuit board comprises a signal routing layer, a first dielectric layer, a second dielectric layer, a third dielectric layer, a first ground layer, a second ground layer, and a third ground layer. The signal routing layer includes chip traces, connector traces, and signal traces connected to components. The first dielectric layer, the first ground layer, the second dielectric layer, the second ground layer, the third dielectric layer, and the third ground layer, in that order, are located at gradually increasing distances from the signal routing layer. The first ground layer corresponds to the chip traces, the second ground layer corresponds to the signal traces, and the third ground layer corresponds to the connector traces.

    Abstract translation: 电路板包括信号布线层，第一介电层，第二介电层，第三介电层，第一接地层，第二接地层和第三接地层。 信号路由层包括连接到组件的芯片迹线，连接器迹线和信号迹线。 第一电介质层，第一接地层，第二电介质层，第二接地层，第三电介质层和第三接地层依次位于与信号路由层逐渐增加的距离处。 第一接地层对应于芯片迹线，第二接地层对应于信号迹线，第三接地层对应于连接器迹线。

    TOUCH WINDOW
    48.
    发明申请
    TOUCH WINDOW 有权
    触摸窗口

    公开(公告)号：US20150223324A1

    公开(公告)日：2015-08-06

    申请号：US14483749

    申请日：2014-09-11

    Applicant: LG INNOTEK CO., LTD.

    Inventor： Byeong Seob KIM ,  Ji Sung AHN

    IPC: H05K1/02 ,  G06F1/16 ,  G06F3/044

    CPC classification number: H05K1/0259 ,  G06F1/1643 ,  G06F3/044 ,  G06F2203/04107 ,  H05K3/361 ,  H05K2201/09227 ,  H05K2201/09272 ,  H05K2201/09281 ,  H05K2201/09727

    Abstract: A touch window includes a substrate, a sensing electrode on the substrate, a wire electrically connected with the sensing electrode, a ground wire adjacent to the wire, and a printed circuit board connected with the wire and the ground wire. An overlap length between the ground wire and the printed circuit board is longer than an overlap length between the wire and the printed circuit board. Alternatively or simultaneously, a line width of the ground wire is wider than an interval or gap between the wire parallel to the printed circuit.

    Abstract translation: 触摸窗包括基板，基板上的感测电极，与感测电极电连接的导线，与导线相邻的接地线以及与导线和接地线连接的印刷电路板。 接地线和印刷电路板之间的重叠长度大于导线和印刷电路板之间的重叠长度。 或者或同时地，接地线的线宽比平行于印刷电路的线之间的间隔或间隙宽。

    TRANSMISSION LINE FILTER WITH TUNABLE CAPACITOR
    49.
    发明申请
    TRANSMISSION LINE FILTER WITH TUNABLE CAPACITOR 有权
    带有可调电容器的传输线滤波器

    公开(公告)号：US20150162886A1

    公开(公告)日：2015-06-11

    申请号：US14264756

    申请日：2014-04-29

    Applicant: Newlans, Inc.

    Inventor： Bouchaib Cherif

    IPC: H03H7/01

    CPC classification number: H05K1/0292 ,  H01G5/14 ,  H01G5/16 ,  H01G5/18 ,  H01P1/20336 ,  H05K1/024 ,  H05K1/025 ,  H05K1/16 ,  H05K1/162 ,  H05K2201/09727 ,  H05K2201/09781 ,  H05K2203/171

    Abstract: A tunable filter design. The filter is implemented using transmission line sections as inductive and capacitive components. At least one capacitive component is a tunable capacitor. In some implementations, the tunable capacitor may be an interdigitated array of finger elements arranged so that the spacing between fingers may be adjusted. The design has a number of advantages including high capacitance for a given circuit area, small area for a given desired capacitance, mechanical stability, high self resonance frequency, and high quality factor.

    Abstract translation: 可调滤波器设计。 滤波器使用传输线路段作为电感和电容分量来实现。 至少一个电容元件是可调电容器。 在一些实施方案中，可调谐电容器可以是布置成使得可以调整手指之间的间隔的指状元件的交叉指列阵列。 该设计具有许多优点，包括给定电路面积的高电容，给定期望电容的小面积，机械稳定性，高自谐振频率和高品质因数。

    Paddle card with improved performance
    50.
    发明授权
    Paddle card with improved performance 有权
    桨卡性能提升

    公开(公告)号：US09049787B2

    公开(公告)日：2015-06-02

    申请号：US13745352

    申请日：2013-01-18

    Applicant: Molex Incorporated

    Inventor： Mark Alan Bugg

    IPC: H05K1/09 ,  H05K1/02 ,  H01R9/03 ,  H01R13/6474

    CPC classification number: H05K1/0216 ,  H01R9/032 ,  H01R12/57 ,  H01R12/62 ,  H01R12/775 ,  H01R13/6474 ,  H05K1/0296 ,  H05K1/111 ,  H05K1/112 ,  H05K1/117 ,  H05K3/3405 ,  H05K2201/09218 ,  H05K2201/09381 ,  H05K2201/09418 ,  H05K2201/09727 ,  H05K2201/10356

    Abstract: A paddle card construction disclosed for use in connecting electronic devices together. The paddle card takes the form of a circuit board that has a plurality of conductive contact pads arranged thereon in pairs. The contact pads of each pair are spaced apart from each other to provide a pair of points to which cable wire free ends may be terminated, such as by soldering. The spacing of the pads apart from each other in effect reduces to amount of capacitance in the cable wire termination area on the circuit board, thereby reducing the impedance and insertion loss in that area at high frequencies. The contact pads of each pair may be further interconnected together by a thin, conductive trace that extends lengthwise between the contact pads.

    Abstract translation: 公开的用于将电子设备连接在一起的桨卡结构。 桨卡采取电路板的形式，其具有成对地布置在其上的多个导电接触垫。 每对的接触垫彼此间隔开以提供一对点，电缆线自由端可以通过焊接方式终止于该点。 彼此分开的焊盘的间隔实际上减少到电路板上的电缆线端接区域中的电容量，从而降低了在该区域的高频下的阻抗和插入损耗。 每对的接触垫可以通过在接触垫之间纵向延伸的薄导电迹线进一步互连在一起。

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