公开(公告)号：US20040238205A1

公开(公告)日：2004-12-02

申请号：US10449251

申请日：2003-05-30

Applicant: Dell Products L.P.

Inventor： Kevin L. Miller ,  Thad C. McMillan

IPC: H05K001/09 ,  H05K003/40

CPC classification number: H05K1/0293 ,  H05K3/28 ,  H05K2201/0305 ,  Y10T29/49149

Abstract: A printed circuit board having pairs of shunt pads, from which the solder mask is removed and which are capable of being bridged to form zero ohm resistors. The shunt pads are spaced sufficiently far apart to avoid short circuiting, but sufficiently close to permit a solder bridge to occur between them. The shunt pads can be designed to permit mounting of a resistor component if desired, rather than being bridged.

Abstract translation: 一种印刷电路板，其具有成对的分流焊盘，焊接掩模从该印刷电路板被去除并且能够被桥接以形成零欧姆电阻器。 分流焊盘间隔足够远以避免短路，但足够接近以允许在它们之间发生焊桥。 分流焊盘可以设计成允许安装电阻器部件，如果需要，而不是桥接。

公开(公告)号：US20040212972A1

公开(公告)日：2004-10-28

申请号：US10422515

申请日：2003-04-24

Inventor： Leon M. Khilchenko ,  Mark W. Gailus

IPC: H05K001/11 ,  H01R012/04 ,  H01R012/16

CPC classification number: H05K3/4038 ,  H05K1/0298 ,  H05K3/321 ,  H05K3/3447 ,  H05K3/4046 ,  H05K3/4069 ,  H05K2201/0305 ,  H05K2201/0919 ,  H05K2201/10234 ,  H05K2201/1059 ,  H05K2201/10992 ,  H05K2203/041 ,  H05K2203/1446 ,  Y10T29/4913 ,  Y10T29/49139 ,  Y10T29/49147 ,  Y10T29/49165

Abstract: What is provided is a multi-layer PCB having a plurality of stacked dielectric layers, a conductor disposed on at least one of the plurality of dielectric layers, and a non-conductive via extending through at least a portion of the plurality of dielectric layers to intersect the conductor. A conductive body in an activated state is introduced into the non-conductive via, and upon contacting the conductor, the activated state conductive body adheres to the conductor. The activated state conductive body is then effected to a deactivated state, wherein the conductive body is affixed to the conductor to provide an electrical connection thereto.

Abstract translation: 提供的是具有多个堆叠的电介质层的多层PCB，设置在多个电介质层中的至少一个介质层上的导体，以及延伸穿过多个电介质层的至少一部分的非导电通孔， 与导体相交。 处于激活状态的导电体被引入到非导电通孔中，并且在与导体接触时，活化状态导电体粘附到导体。 然后使激活状态的导电体进入去激活状态，其中导电体固​​定到导体以提供与其的电连接。

公开(公告)号：US06753612B2

公开(公告)日：2004-06-22

申请号：US09827014

申请日：2001-04-05

Applicant: Sylvia Adae-Amoakoh ,  John S. Kresge ,  Voya R. Markovich ,  Thurston B. Youngs, Jr.

Inventor： Sylvia Adae-Amoakoh ,  John S. Kresge ,  Voya R. Markovich ,  Thurston B. Youngs, Jr.

IPC: H01L2940

CPC classification number: H05K3/4069 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H05K1/113 ,  H05K3/061 ,  H05K3/062 ,  H05K3/247 ,  H05K3/3484 ,  H05K3/4038 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/0305 ,  H05K2201/035 ,  H01L2224/0401

Abstract: A flip-chip joinable substrate having non-plated-on contact pads. The substrate has an external metal foil layer upon a dielectric layer upon a patterned internal metal layer having an internal contact area. An area of the external metal foil layer above the internal contact area is selected. A microvia cavity extending to the internal contact area is perforated centrally within the selected area and is filled with a mass of conductive paste forming an external contact pad. The external contact pad is used as an etch mask for removing the adjacent external metal foil.

Abstract translation: 具有非电镀接触焊盘的倒装芯片可连接衬底。 衬底在具有内部接触面积的图案化内部金属层上的介电层上具有外部金属箔层。 选择内部接触区域上方的外部金属箔层的区域。 延伸到内部接触区域的微孔腔在所选择的区域内中心穿孔，并且填充有形成外部接触焊盘的导电浆料块。 外部接触焊盘用作蚀刻掩模以去除相邻的外部金属箔。

公开(公告)号：US20040088856A1

公开(公告)日：2004-05-13

申请号：US10292452

申请日：2002-11-13

Inventor： Ted Ju

IPC: H05K003/00

CPC classification number: H05K3/3478 ,  H05K2201/0305 ,  H05K2201/10424 ,  H05K2201/10734 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49222

Abstract: An electric connector and IC tin ball shaping and fixing manufacturing method is used in welding portions of terminals of one of an electric connector, IC and other electronic elements. A tin film is covered on a bottom of the ball grid array seat; wherein the tin film is formed by connecting a plurality of round small tin pieces with respect to the terminals, and a periphery of the small tin pieces being enclosed by slender connecting portions the ball grid array seat is melt so that the small tin pieces of the tin film weld as tin liquid, then the slender connecting portions will break and the small tin pieces are connected as a tin ball; thereby, the liquid tin ball will enclose the welding portion of the terminal. Finally the tin balls is cooled and condensed and then combined to the welding portions of the terminals.

Abstract translation: 电连接器和IC锡球成形和定影制造方法用于电连接器，IC和其他电子元件之一的端子的焊接部分。 锡膜覆盖在球栅阵列座的底部; 其中，所述锡膜通过将多个圆形小锡片相对于所述端子连接而形成，并且所述小锡片的周边由细长的连接部分包围，所述球栅阵列座被熔化，使得所述小锡片 锡膜焊锡为锡液，则细长连接部分断裂，小锡片作为锡球连接; 从而液态锡球将封闭端子的焊接部分。 最后，锡球被冷却并冷凝，然后组合到端子的焊接部分。

公开(公告)号：US20040066633A1

公开(公告)日：2004-04-08

申请号：US10662368

申请日：2003-09-16

Inventor： Yoshitarou Yazaki ,  Tomohiro Yokochi ,  Koji Kondo ,  Toshikazu Harada ,  Yoshihiko Shiraishi

IPC: H05K001/00 ,  H05K001/18 ,  H05K007/02 ,  H05K007/06 ,  H05K007/08

CPC classification number: H05K3/4632 ,  H05K1/095 ,  H05K3/4069 ,  H05K3/4617 ,  H05K2201/0129 ,  H05K2201/0272 ,  H05K2201/0305 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09827 ,  H05K2201/09863 ,  H05K2203/0425 ,  H05K2203/1131 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49165 ,  Y10T428/24917

Abstract: Conductive paste containing tin particles and silver particles is packed in a substantially cylindrical via hole formed in a thermoplastic resin film that interposes between conductor patterns and is hot-pressed from both sides. When the metal particles contained in the conductive paste are sintered to form a unified conductive compound, the volume of the conductive paste shrinks. Synchronously, the resin film around the via-hole protrudes into the via-hole. Therefore, the shape of the side wall on the cross-section of the conductive compound provides an arch shape, and a side wall adjacent to a junction part of the conductive compound, which contacts the conductor pattern, is formed with an inclination. Therefore, it is possible to prevent the stress concentration due to deformation of the board.

Abstract translation: 含有锡颗粒和银颗粒的导电糊料被包装在形成在热塑性树脂膜中的大致圆柱形的通孔中，该热塑性树脂膜介于导体图案之间并且从两侧被热压。 当包含在导电浆料中的金属颗粒被烧结以形成统一的导电化合物时，导电浆料的体积收缩。 同时，通孔周围的树脂膜突出到通孔中。 因此，导电性化合物的横截面上的侧壁的形状形成拱形，并且与导体图案接触的导电性化合物的接合部分相邻的侧壁形成倾斜。 因此，可以防止由于板的变形引起的应力集中。

公开(公告)号：US06717068B2

公开(公告)日：2004-04-06

申请号：US10264230

申请日：2002-10-02

Applicant: Michiharu Motonishi ,  Michiaki Moroe

Inventor： Michiharu Motonishi ,  Michiaki Moroe

IPC: H01R1204

CPC classification number: G11B5/3903 ,  G11B5/3103 ,  G11B5/40 ,  G11B5/4833 ,  G11B5/486 ,  H05K1/0259 ,  H05K1/0293 ,  H05K3/3457 ,  H05K2201/0305 ,  H05K2203/0195 ,  H05K2203/0278 ,  H05K2203/173

Abstract: The invention provides a magnetic head capable of positively preventing electrostatic breakdown of an MR magnetic head device, and a method of manufacturing the magnetic head. A circuit board comprises at least a pair of leads for constructing a circuit, lands connected respectively to the leads, and solder bumps formed respectively on the lands. The solder bumps are arranged in an adjacent relationship and, when the solder bumps are crushed, peripheral portions of the solder bumps are pressed or spread so as to overlap with each other. The magnetic head includes the circuit board.

Abstract translation: 本发明提供一种能够积极地防止MR磁头装置的静电击穿的磁头及其制造方法。 电路板包括至少一对用于构成电路的引线，分别连接到引线的焊盘和分别形成在焊盘上的焊料凸块。 焊料凸块以相邻的关系布置，并且当焊料凸块被压扁时，焊料凸块的周边部分被按压或扩展以便彼此重叠。 磁头包括电路板。

公开(公告)号：US06713687B2

公开(公告)日：2004-03-30

申请号：US10022222

申请日：2001-12-20

Applicant: Yoshitarou Yazaki ,  Tomohiro Yokochi ,  Koji Kondo ,  Toshikazu Harada ,  Yoshihiko Shiraishi

Inventor： Yoshitarou Yazaki ,  Tomohiro Yokochi ,  Koji Kondo ,  Toshikazu Harada ,  Yoshihiko Shiraishi

IPC: H05K111

CPC classification number: H05K3/4632 ,  H05K1/095 ,  H05K3/4069 ,  H05K3/4617 ,  H05K2201/0129 ,  H05K2201/0272 ,  H05K2201/0305 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09827 ,  H05K2201/09863 ,  H05K2203/0425 ,  H05K2203/1131 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49165 ,  Y10T428/24917

Abstract: Conductive paste containing tin particles and silver particles is packed in a substantially cylindrical via hole formed in a thermoplastic resin film that interposes between conductor patterns and is hot-pressed from both sides. When the metal particles contained in the conductive paste are sintered to form a unified conductive compound, the volume of the conductive paste shrinks. Synchronously, the resin film around the via-hole protrudes into the via-hole. Therefore, the shape of the side wall on the cross-section of the conductive compound provides an arch shape, and a side wall adjacent to a junction part of the conductive compound, which contacts the conductor pattern, is formed with an inclination. Therefore, it is possible to prevent the stress concentration due to deformation of the board.

Abstract translation: 含有锡颗粒和银颗粒的导电糊料被包装在形成在热塑性树脂膜中的大致圆柱形的通孔中，该热塑性树脂膜介于导体图案之间并且从两侧被热压。 当包含在导电浆料中的金属颗粒被烧结以形成统一的导电化合物时，导电浆料的体积收缩。 同时，通孔周围的树脂膜突出到通孔中。 因此，导电性化合物的横截面上的侧壁的形状形成拱形，并且与导体图案接触的导电性化合物的接合部分相邻的侧壁形成倾斜。 因此，可以防止由于板的变形引起的应力集中。

公开(公告)号：US20040040741A1

公开(公告)日：2004-03-04

申请号：US10235630

申请日：2002-09-04

Inventor： Jeff R. Wienrich ,  Joni G. Hansen ,  Debendra Mallik

IPC: H05K007/06

CPC classification number: H01L23/5382 ,  H01L2924/0002 ,  H05K1/0266 ,  H05K1/029 ,  H05K1/0293 ,  H05K2201/0305 ,  H01L2924/00

Abstract: Apparatus and methods are provided to enable circuit configuration of a substrate by the setting of settable bits associated with those circuits. An electrically conductive material is deposited onto selected settable bits which closes the desired circuit between the settable bits. In one embodiment in accordance with the invention, a carrier substrate is provided that comprises settable bits which are used to control a microelectronic package's electrical characteristics. In one embodiment, the settable bits are in the form of sets of spaced-apart bit pads which form an open circuit between a logic circuit and electrical ground (Vss). The open circuit is closed with the application of electrically conductive material that bridges the set of spaced-apart bit pads. The settable bits, therefore, do not require the addition of high profile components such as 0-ohm resisters to form the electrical bridging function between the bit pads of a settable bit. The settable bits provide a highly configurable control interface that allows the setting of one or more electrical characteristics. The settable bits are easily and quickly configurable and do not require complex customized machinery for implementation. Further, they do not significantly add to the cost of development or manufacture of the carrier substrate.

Abstract translation: 提供了设备和方法，以通过设置与这些电路相关联的可设定位来实现衬底的电路配置。 将导电材料沉积到所选择的可固定位上，该可闭合位封闭可设定位之间的期望电路。 在根据本发明的一个实施例中，提供了一种载体衬底，其包括用于控制微电子封装的电特性的可设定位。 在一个实施例中，可设置的位是在逻辑电路和电气接地（Vss）之间形成开路的一组间隔开的位焊盘的形式。 通过施加导电材料来闭合开路，桥接该组间隔开的位垫。 因此，可设置的位不需要添加诸如0欧姆电阻器的高廓形元件，以在可设置位的位焊盘之间形成电桥接功能。 可设置位提供高度可配置的控制接口，允许设置一个或多个电气特性。 可设置的位可轻松快速地进行配置，并且不需要复杂的定制机械来实现。 此外，它们不显着地增加载体基底的开发或制造成本。

公开(公告)号：US06700748B1

公开(公告)日：2004-03-02

申请号：US09561821

申请日：2000-04-28

Applicant: Kevin Cowles ,  A. David Erpelding

Inventor： Kevin Cowles ,  A. David Erpelding

IPC: G11B540

CPC classification number: G11B5/486 ,  G11B5/02 ,  G11B5/11 ,  G11B5/112 ,  G11B5/3143 ,  G11B5/40 ,  G11B2005/0016 ,  H05K1/0215 ,  H05K3/4069 ,  H05K3/4084 ,  H05K3/44 ,  H05K2201/0305 ,  H05K2201/09554 ,  Y10T29/4903 ,  Y10T29/49032 ,  Y10T29/49046 ,  Y10T29/49048 ,  Y10T29/49117 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49165 ,  Y10T29/49179 ,  Y10T29/49224

Abstract: In an Integrated Lead Suspension system, it is desired that the stainless steel suspension is grounded to a controlled ground potential. This requires creating a grounding path between the stainless steel suspension and a copper trace layer through a layer of dielectric material that separates the stainless steel suspension and the copper layer. The copper trace layer and subsequently the stainless steel suspension can then be grounded to a controlled ground potential. This invention proposes several methods of creating a ground path between the stainless steel suspension and the copper trace layer.

Abstract translation: 在集成式悬挂系统中，希望不锈钢悬架接地到受控的接地电位。 这需要通过分离不锈钢悬浮液和铜层的介电材料层在不锈钢悬浮液和铜迹线层之间形成接地路径。 然后将铜迹线层和随后的不锈钢悬浮液接地到受控的接地电位。本发明提出了在不锈钢悬浮液和铜迹线层之间产生接地路径的几种方法。

公开(公告)号：US20030234117A1

公开(公告)日：2003-12-25

申请号：US10179066

申请日：2002-06-25

Inventor： Lawrence R. Poglitsch ,  Ronald Li ,  Alan S. Kang ,  Todd Ringa ,  Steven G. Sharkey ,  Rick Cihak

IPC: H05K001/11

CPC classification number: H05K3/363 ,  H01R13/58 ,  H01R43/0256 ,  H05K1/0215 ,  H05K1/0271 ,  H05K3/0061 ,  H05K3/4038 ,  H05K3/44 ,  H05K2201/0305 ,  H05K2201/09063 ,  H05K2201/09554

Abstract: A ground connector assembly (20) having a substrate (22) and a ground member (24). The substrate (22) is used to retain an electrical circuit and has a ground region (34), a ground hole (30), and at least one strain relief slot (32). The ground member (24) is attached within the ground hole (30). The ground region (34) surrounds the ground hole (30) and is at least partially interposed between the ground hole (30) and the strain relief slot (32). The ground connector assembly (20) may further include a conductive ring (42), such as a copper ring, surrounding the ground hole (30) and attached to the ground region (34). There is also a method of making the ground connector assembly (20).

Abstract translation: 一种具有衬底（22）和接地构件（24）的接地连接器组件（20）。 衬底（22）用于保持电路并具有接地区域（34），接地孔（30）和至少一个应变消除槽（32）。 接地构件（24）附接在接地孔（30）内。 接地区域34围绕着接地孔30并且至少部分地插入在接地孔30和应变消除槽32之间。 接地连接器组件（20）还可以包括围绕接地孔（30）并连接到接地区域（34）的导电环（42），例如铜环。 还有一种制造接地连接器组件（20）的方法。