Abstract:
A wiring board 10 includes a lower wiring conductor 1, an upper insulating layer 2 laminated on the lower wiring conductor 1 and having a via hole 5 where a bottom surface is the lower wiring conductor 1, and a via conductor 3 connected to the lower wiring conductor 1 and filling the via hole 5; and the upper insulating layer 2 includes a first resin layer 2a and a second resin layer 2b sequentially laminated on the lower wiring conductor 1, the via hole 5 has an annular groove 5a over a whole circumference of the inner wall in a boundary between both resin layers 2a and 2b, and the via conductor 3 fills the groove 5.
Abstract:
A module assembly is provided. The module assembly includes a back bezel, a heating member, and a thermal expansion member. The heating member is fixed on a first surface of the back bezel. The thermal expansion member is fixed on the heating member. The thermal expansion member has a first thermal expansion coefficient. The heating member is used to provide heat for the thermal expansion member. The thermal expansion member undergoes a first deformation based on the heat, so that the back bezel undergoes a second deformation. A display panel has a desired curved surface displaying effect on actual demands.
Abstract:
Disclosed herein is a circuit board in which a metal plate is provided on a surface coupled to a device, and a connection pad is exposed through an opening part of the metal plate to be electrically connected to the device. The circuit board may have the device mounted thereon and a connection terminal of the device and a connection pad of the circuit board may be connected to each other by a wire, or the like.
Abstract:
Some novel features pertain to a substrate that includes a first core layer, a second core layer laterally located to the first core layer in the substrate, a first inorganic core layer (e.g., glass, silicon, ceramic) laterally positioned between the first core layer and the second core layer, the first inorganic core layer configured to be vertically aligned with a die configured to be coupled to the substrate, and a dielectric layer covering the first core layer, the second core layer and the first inorganic core layer. In some implementations, the first inorganic core layer has a first coefficient of thermal expansion (CTE), the die has a second coefficient of thermal expansion, and the first core layer has a third coefficient of thermal expansion (CTE). The first CTE of the first inorganic core layer closely matches the second CTE of the die in order to reduce the likelihood of warpage.
Abstract:
A wiring board includes a first wiring layer formed on one surface of a core layer, a first insulating layer formed on the one surface of the core layer so as to cover the first wiring layer, a via wiring embedded in the first insulating layer, a second wiring layer formed on a first surface of the first insulating layer, and a second insulating layer thinner than the first insulating layer formed on the first surface of the first insulating layer so as to cover the second wiring layer. The first wiring layer comprises a pad and a plane layer provided around the pad. One end surface of the via wiring is exposed from the first surface of the first insulating layer and directly bonded to the second wiring layer. The other end surface of the via wiring is directly bonded to the pad in the first insulating layer.
Abstract:
A multi-layer line structure including a substrate, a lower layer Cu line located on the substrate, an upper layer Cu line located on an insulating layer including an inorganic film located on the lower layer Cu line and an organic resin film located on the inorganic film, and a via connection part located in a via connection hole running in an up-down direction through the insulating layer in an area where the lower layer Cu line and the upper layer Cu line overlap each other is provided. The via connection part includes a barrier conductive layer located on a part of the lower layer Cu line exposed to a bottom part of the via connection hole and on an inner wall of the via connection hole.
Abstract:
A method for designing a printed circuit board to meet a specification is described. A first voltage switchable dielectric material is placed in apposition with a first copper foil. A second voltage switchable dielectric material is placed in apposition with a second copper foil. An arcuate portion of the first copper foil is placed in apposition with a first side of an aluminum member, an adhesive substance being situated between the first copper foil and the first side of the aluminum member. An arcuate portion of the second copper foil in is placed apposition with a second side of the aluminum member, an adhesive substance being situated between the second copper foil and the second side of the aluminum member.
Abstract:
A substrate comprises: a first insulating layer; a second insulating layer having an elastic modulus that is different from an elastic modulus of the first insulating layer; and a core layer that is sandwiched by the first insulating layer and the second insulating layer, and is more rigid than the first insulating layer and the second insulating layer.
Abstract:
A printed wiring board includes a core substrate, an electronic component accommodated in the substrate, a first buildup layer laminated on first surface of the substrate and including the outermost interlayer resin insulation layer and the outermost conductive layer formed on the outermost interlayer resin insulation layer of the first buildup layer, and a second buildup layer laminated on second surface of the substrate and including the outermost interlayer resin insulation layer and the outermost conductive layer formed on the outermost interlayer resin insulation layer of the second buildup layer. The outermost interlayer resin insulation layer of the first buildup layer has thermal expansion coefficient which is set lower than thermal expansion coefficient of the outermost interlayer resin insulation layer of the second buildup layer.
Abstract:
A thermal management circuit material comprises a thermally conductive metallic core substrate, metal oxide dielectric layers on both sides of the metallic core substrate, electrically conductive metal layers on the metal oxide metal oxide dielectric layers, and at least one through-hole via filled with an electrically conductive metal-containing core element connecting at least a portion of each of the electrically conductive metal layers, wherein the containing walls of the through-hole via are covered by a metal oxide dielectric layer connecting at least a portion of the metal oxide dielectric layers on opposite sides of the metallic core substrate. Also disclosed are methods of making such circuit materials, comprising forming metal oxide dielectric layers by oxidative conversion of a surface portion of the metallic core substrate. Articles having a heat-generating electronic device such as an HBLED mounted in the circuit material are also disclosed.