公开(公告)号：US20070240807A1

公开(公告)日：2007-10-18

申请号：US11401905

申请日：2006-04-12

Applicant: Kan Shih-Wei ,  Yu Chieh-Kuang

Inventor： Kan Shih-Wei ,  Yu Chieh-Kuang

IPC: C03B29/00 ,  B32B38/04

CPC classification number: B32B18/00 ,  B32B2315/02 ,  C04B2235/3217 ,  C04B2235/9646 ,  H05K1/0306 ,  H05K3/0029 ,  H05K3/0052 ,  H05K3/4629 ,  H05K2201/0909

Abstract: The present invention relates to a method for manufacturing multi-layer ceramic substrate, a plurality of aluminum oxide ceramic substrate units are piled together, between each two ceramic substrate units is an oxide medium layer which can grow crystal grain during sintering. Such that the upper and lower ceramic substrate units will compactly bind together with the oxide medium layer because the grown crystal grains enter into the gaps or holes formed between the crystal grains of the surfaces of ceramic substrate units during sintering process.

Abstract translation: 本发明涉及多层陶瓷基板的制造方法，多个氧化铝陶瓷基板单元堆叠在一起，在两个陶瓷基板单元之间是在烧结时能够生长晶粒的氧化物介质层。 使得上下陶瓷基板单元将与氧化物介质层紧密地结合在一起，因为在烧结过程中，生长的晶粒进入陶瓷基板单元的表面的晶粒之间形成的间隙或孔。

公开(公告)号：US20070195508A1

公开(公告)日：2007-08-23

申请号：US11700224

申请日：2007-01-31

Applicant: Kuo Hua Chen ,  She Hong Cheng

Inventor： Kuo Hua Chen ,  She Hong Cheng

IPC: H05K7/00

CPC classification number: H05K3/242 ,  H01L21/4846 ,  H01L23/13 ,  H01L2924/0002 ,  H05K3/0052 ,  H05K2201/09063 ,  H05K2201/0909 ,  H01L2924/00

Abstract: A punch type substrate strip includes a plurality of substrate units, a plurality of slots and at least one plating-trace collecting hole. The slots are formed around the substrate units. The plating-trace collecting hole is located outside the substrate units. The substrate strip is provided with a plurality of connecting pads, a plurality of first plating traces and at least one second plating trace. The connecting pads are disposed in each substrate unit, and the first plating traces and the second plating trace are electrically connected to the connecting pads. The first plating traces have a plurality of first broken ends located in the slots. The second plating trace is extended across a region located between the slots, and has a second broken end located in the plating-trace collecting hole. Accordingly, more extensive space for plating traces can be provided.

Abstract translation: 冲头型基板条包括多个基板单元，多个槽和至少一个电镀痕迹收集孔。 槽形成在基板单元周围。 电镀痕迹收集孔位于基板单元外部。 衬底带设置有多个连接焊盘，多个第一电镀迹线和至少一个第二电镀迹线。 连接焊盘设置在每个基板单元中，并且第一电镀迹线和第二电镀迹线电连接到连接焊盘。 第一电镀迹线具有位于槽中的多个第一断开端。 第二电镀迹线延伸穿过位于槽之间的区域，并且具有位于电镀痕迹收集孔中的第二断开端。 因此，可以提供更广泛的电镀痕迹空间。

公开(公告)号：US07253027B2

公开(公告)日：2007-08-07

申请号：US10905238

申请日：2004-12-22

Applicant: Masaru Kanakubo

Inventor： Masaru Kanakubo

IPC: H01L21/50 ,  H01L21/48 ,  H01L29/06 ,  H01L23/544 ,  H01L21/768 ,  H01L21/78

CPC classification number: H05K3/0052 ,  H01L21/481 ,  H01L21/565 ,  H01L23/4334 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/97 ,  H01L25/165 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H05K1/056 ,  H05K3/284 ,  H05K2201/09036 ,  H05K2201/0909 ,  H05K2201/1034 ,  H05K2203/0278 ,  H05K2203/302 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: A method of manufacturing a hybrid integrated circuit device includes the steps of forming a plurality of units each including a conductive pattern on a surface of a board made of metal, forming grooves along boundaries of the respective units of the board, electrically connecting circuit elements to the conductive patterns in the respective units, separating the respective circuit boards by dividing the board along the grooves, and flattening side surfaces of the circuit boards by pressing the side surfaces.

Abstract translation: 一种制造混合集成电路器件的方法包括以下步骤：在由金属制成的板的表面上形成各自包括导电图案的多个单元，沿着板的各个单元的边界形成凹槽，将电路元件电连接到 各个单元中的导电图案，通过沿着凹槽划分基板来分离各个电路板，以及通过按压侧表面使电路板的平坦化的侧表面分离。

公开(公告)号：US07250352B2

公开(公告)日：2007-07-31

申请号：US10421921

申请日：2003-04-24

Applicant: Masahiko Mizutani ,  Sadamichi Takakusaki ,  Motoichi Nezu ,  Kazutoshi Motegi ,  Mitsuru Noguchi

Inventor： Masahiko Mizutani ,  Sadamichi Takakusaki ,  Motoichi Nezu ,  Kazutoshi Motegi ,  Mitsuru Noguchi

IPC: H01L21/46

CPC classification number: H05K3/0052 ,  H01L2924/01023 ,  H01L2924/14 ,  H01L2924/19105 ,  H05K1/056 ,  H05K3/284 ,  H05K2201/09036 ,  H05K2201/0909 ,  H05K2201/09745 ,  H05K2203/0228 ,  H05K2203/1572 ,  H05K2203/302

Abstract: In preferred embodiments, a method of manufacturing a hybrid integrated circuit device is provided, in which a plurality of circuit substrates 10 are manufactured from a single metal substrate 10A′ by dicing. In some embodiments, the method includes: preparing a metal substrate 10A′ having an insulating layer 11 formed on the top surface thereof; forming a plurality of conductive patterns 12 on the top surface of insulating layer 11; forming grooves 20 in lattice form on the rear surface of metal substrate 10B′; mounting hybrid integrated circuits onto conductive patterns 12; and separating individual circuit substrates 10 with, for example, a rotatable cutter.

Abstract translation: 在优选实施例中，提供了一种制造混合集成电路器件的方法，其中通过切割由单个金属衬底10A'制造多个电路衬底10。 在一些实施例中，该方法包括：制备具有形成在其顶表面上的绝缘层11的金属基底10A' 在绝缘层11的顶表面上形成多个导电图案12; 在金属基板10B'的后表面上形成格子状的槽20; 将混合集成电路安装到导电图案12上; 并且用例如可旋转切割器分离各个电路基板10。

公开(公告)号：US07238891B2

公开(公告)日：2007-07-03

申请号：US10528648

申请日：2003-09-19

Applicant: Roland Muenzberg

Inventor： Roland Muenzberg

IPC: H05K1/03

CPC classification number: H05K3/4691 ,  H05K3/28 ,  H05K3/386 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/0909 ,  H05K2201/09127 ,  H05K2203/063

Abstract: A rigid-flexible circuit board with two rigid areas and one flexible area, with a rigid individual layer which is copper-clad on one side, with an adhesive medium and with a copper foil, the adhesive medium having recesses in the flexible area. The rigid-flexible circuit board can be produced especially easily and economically in that at least in the rigid area there is no flexible individual layer, especially no polyimide film, between the adhesive medium and the copper foil.

Abstract translation: 具有两个刚性区域和一个柔性区域的刚性柔性电路板，具有在一侧铜包覆的刚性单层，具有粘合剂介质和铜箔，所述粘合剂介质在柔性区域中具有凹部。 刚性柔性电路板可以特别容易且经济地制造，因为至少在刚性区域中，在粘合剂介质和铜箔之间没有柔性单独层，特别是没有聚酰亚胺膜。

公开(公告)号：US07235423B1

公开(公告)日：2007-06-26

申请号：US10982216

申请日：2004-11-05

Applicant: Kuang-Yu Wang ,  Jim Ni ,  Paul Hsueh ,  Ren-Kang Chiou

Inventor： Kuang-Yu Wang ,  Jim Ni ,  Paul Hsueh ,  Ren-Kang Chiou

IPC: H01L21/98

CPC classification number: H01L21/561 ,  H01L23/49855 ,  H01L25/0655 ,  H01L25/50 ,  H01L2924/0002 ,  H05K1/117 ,  H05K3/0052 ,  H05K3/0097 ,  H05K3/284 ,  H05K2201/09063 ,  H05K2201/0909 ,  H05K2203/0169 ,  H05K2203/1316 ,  H01L2924/00

Abstract: Plastic casings are simultaneously molded onto several PCBAs attached to a carrier in a closely-spaced arrangement. All edges of each PCBA have integral connecting segments that extend through grooves formed in the associated mold assembly, and are pinched when the molds assembly is closed to precisely and reliably position the PCBA inside of an associated cavity during the molding process. In one embodiment, the PCB substrate is positioned in a bent arrangement to accommodate the use of inexpensive memory devices. Write-protect switches are provided.

Abstract translation: 塑料外壳同时模制在以紧密间隔布置的方式连接到载体上的多个PCBA上。 每个PCBA的所有边缘具有延伸通过形成在相关联的模具组件中的凹槽的整体连接段，并且当模具组件闭合时，在模制过程期间将PCBA精确地并且可靠地定位在相关联的空腔内时被夹紧。 在一个实施例中，PCB基板被定位成弯曲的布置以适应便宜的存储器件的使用。 提供写保护开关。

公开(公告)号：US20070111561A1

公开(公告)日：2007-05-17

申请号：US11565715

申请日：2006-12-01

Applicant: Alan Wang ,  Kevin Olson ,  Thomas DiStefano

Inventor： Alan Wang ,  Kevin Olson ,  Thomas DiStefano

IPC: H01R12/00

CPC classification number: H05K1/0231 ,  H01L2224/16225 ,  H05K1/056 ,  H05K3/002 ,  H05K3/0052 ,  H05K3/44 ,  H05K3/4641 ,  H05K3/4644 ,  H05K2201/0166 ,  H05K2201/0397 ,  H05K2201/0909 ,  H05K2201/0919 ,  H05K2201/09309 ,  H05K2201/09554 ,  H05K2201/10446 ,  H05K2203/135 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: Provided is a method of forming a circuit board including (a) providing a first conductive sheet; (b) selectively removing one or more portions of the first conductive sheet to form a first panel having a first circuit board that is coupled to a disposable part of the first panel by at least one tab that extends from an edge of the first circuit board to an edge of the disposable part of the first panel; (c) applying an insulating coating to the first circuit board so that at least each edge of the first circuit board is covered thereby; and (d) separating the first circuit board from the disposable part in a manner whereupon at least part of the tab remains attached to the first circuit board and includes an exposed edge of the conductive sheet of the first circuit board. Circuit boards formed by the method are also provided.

Abstract translation: 提供一种形成电路板的方法，包括：（a）提供第一导电片; （b）选择性地去除所述第一导电片的一个或多个部分以形成具有第一电路板的第一面板，所述第一电路板通过从所述第一电路板的边缘延伸的至少一个接片连接到所述第一面板的一次性部分 到所述第一面板的一次性部分的边缘; （c）向第一电路板施加绝缘涂层，使得第一电路板的至少每个边缘被覆盖; 和（d）以一种方式将第一电路板与一次性部分分离，由此至少部分突片保持附接到第一电路板并且包括第一电路板的导电片的暴露边缘。 还提供了通过该方法形成的电路板。

公开(公告)号：US20070105283A1

公开(公告)日：2007-05-10

申请号：US11647162

申请日：2006-12-29

Applicant: Yoshihiko Kobayashi ,  Susumu Sato ,  Koki Tanimoto ,  Tomio Yamada ,  Hirokazu Nakajima ,  Tomoaki Kudaishi ,  Yoshinori Shiokawa ,  Toshiharu Niitsu ,  Tsutomu Ida

Inventor： Yoshihiko Kobayashi ,  Susumu Sato ,  Koki Tanimoto ,  Tomio Yamada ,  Hirokazu Nakajima ,  Tomoaki Kudaishi ,  Yoshinori Shiokawa ,  Toshiharu Niitsu ,  Tsutomu Ida

IPC: H01L21/00

CPC classification number: H05K3/0052 ,  H01L21/481 ,  H01L2224/48227 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0306 ,  H05K3/284 ,  H05K2201/09036 ,  H05K2201/0909 ,  H05K2203/302 ,  H01L2924/00012

Abstract: In a dividing method according to the present invention, a wiring board formed of ceramic is forced up (upper swing) by a lower clamp claw of a clamper, and some of a protruded wiring board portion protruding from a conveying chute is pressed against a support body to perform a first division under bending stress. Thereafter, the upward-located clamper is rotatably swung (lower swing) downward to allow an upper clamp claw to press down the protruded wiring board portion, thereby performing a reverse division at the first division section again as a second division. Since the second division allows a tensile force to act on a remaining and thin non-divided resin portion, the non-divided resin portion is torn off. Thus, the perfect division is enabled. Fractionalizing is done by a one-row division and an individual division so that each semiconductor device is formed.

Abstract translation: 在根据本发明的分割方法中，由陶瓷制成的布线基板由夹持器的下夹爪推动（上摆），并且从输送槽突出的一些突出的布线板部分被压靠在支撑件 身体在弯曲应力下进行第一次分裂。 此后，向上定位的夹持器向下可旋转地摆动（下摆动），以允许上夹爪向下按压突出的布线板部分，从而在第一分割部分再次进行相反分割，作为第二分割。 由于第二分割允许张力作用在剩余的薄的未分割树脂部分上，所以未分割树脂部分被撕开。 因此，完美的划分得以实现。 通过单行分割和单独分割来进行分数化，从而形成每个半导体器件。

公开(公告)号：US20070045873A1

公开(公告)日：2007-03-01

申请号：US11502560

申请日：2006-08-11

Applicant: Yasuo Takemoto

Inventor： Yasuo Takemoto

IPC: H01L23/52

CPC classification number: H01L21/50 ,  G11C29/48 ,  G11C2029/0401 ,  G11C2029/5602 ,  H01L23/49805 ,  H01L23/49855 ,  H01L24/97 ,  H01L2224/48227 ,  H05K3/0052 ,  H05K3/242 ,  H05K3/284 ,  H05K2201/09063 ,  H05K2201/0909 ,  H05K2201/09145 ,  H05K2201/09154 ,  H05K2203/175

Abstract: A semiconductor memory card comprises a wiring substrate having input-output terminals for inputting and outputting a signal formed on its topside; a semiconductor memory chip connected to pads formed on a topside or an underside of the wiring substrate; wirings for plating for supplying electric power necessary for electrolytic plating, formed on the wiring substrate and cut at a side edge portion thereof; and a sealing resin for sealing the semiconductor memory chip on the wiring substrate and sealing the side edge portion of the wiring substrate and an end of at least one of the wirings for plating.

Abstract translation: 半导体存储卡包括具有用于输入和输出在其顶侧上形成的信号的输入输出端子的布线基板; 连接到形成在所述布线基板的上侧或下侧上的焊盘的半导体存储器芯片; 用于电镀所需的用于电解电镀所需的电力的布线，形成在布线基板上并在其侧边缘部分切割; 以及用于密封布线基板上的半导体存储器芯片并密封布线基板的侧边缘部分和用于电镀的至少一个布线的端部的密封树脂。

公开(公告)号：US20060213685A1

公开(公告)日：2006-09-28

申请号：US11442016

申请日：2006-05-26

Applicant: Alan Wang ,  Kevin Olson

Inventor： Alan Wang ,  Kevin Olson

IPC: H05K1/11

CPC classification number: H05K3/445 ,  H01L2224/16225 ,  H05K1/056 ,  H05K3/002 ,  H05K3/0052 ,  H05K3/403 ,  H05K3/426 ,  H05K3/44 ,  H05K3/4614 ,  H05K3/4641 ,  H05K3/4644 ,  H05K2201/0129 ,  H05K2201/0166 ,  H05K2201/0397 ,  H05K2201/0909 ,  H05K2201/09154 ,  H05K2201/09181 ,  H05K2201/0919 ,  H05K2201/09554 ,  H05K2201/09645 ,  H05K2201/09827 ,  H05K2203/1105 ,  H05K2203/135 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A circuit board includes an electrically conductive sheet having an insulative coating surrounding the conductive sheet, with a surface of the insulative coating around an edge of the conductive sheet having an arcuate or rounded shape. At least one electrical conductor is conformally deposited on at least the rounded insulative coating around the edge of the conductive sheet and defined via photolithographic and metallization techniques. Each electrical conductor on the insulative coating thereon around the edge of the conductive sheet conforms to the arcuate or rounded shape of the insulative coating and, therefore, has an arcuate or rounded shape.

Abstract translation: 电路板包括具有围绕导电片的绝缘涂层的导电片，绝缘涂层的表面围绕导电片的边缘具有弓形或圆形形状。 至少一个电导体被共形沉积在导电片的边缘周围的至少圆形绝缘涂层上，并通过光刻和金属化技术限定。 导电片边缘周围的绝缘涂层上的每个电导体符合绝缘涂层的弧形或圆形形状，因此具有弓形或圆形形状。