公开(公告)号：US08101870B2

公开(公告)日：2012-01-24

申请号：US12393642

申请日：2009-02-26

Applicant: Norihiro Ishii

Inventor： Norihiro Ishii

IPC: H05K1/16

CPC classification number: H05K3/305 ,  H01L2224/32225 ,  H01L2924/15311 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/09572 ,  H05K2201/09772 ,  H05K2201/10734 ,  H05K2201/10977 ,  H05K2203/043 ,  Y02P70/613 ,  Y10T29/4913

Abstract: A method for manufacturing a printed circuit board. The method includes: preparing a printed wiring board, the printed wiring board comprising through holes and a plurality of electrode pads; coating surfaces of the plurality of electrode pads and surfaces of the through holes on an one side of the printed wiring board with a bonding material; mounting a semiconductor package on the printed wiring board such that a plurality of bumps on a surface of the semiconductor package corresponds to the plurality of electrode pads; bonding the bumps to the electrode pads by heating the printed wiring board on which the semiconductor package is mounted; and filling a space between the semiconductor package and the printed wiring board with a filler material.

Abstract translation: 一种印刷电路板的制造方法。 该方法包括：制备印刷线路板，印刷线路板包括通孔和多个电极焊盘; 在印刷电路板的一侧用接合材料涂覆多个电极焊盘的表面和通孔的表面; 将半导体封装安装在所述印刷电路板上，使得所述半导体封装的表面上的多个凸块对应于所述多个电极焊盘; 通过加热其上安装有半导体封装的印刷线路板将凸块接合到电极焊盘; 以及用填充材料填充半导体封装和印刷线路板之间的空间。

公开(公告)号：US07980863B1

公开(公告)日：2011-07-19

申请号：US12372499

申请日：2009-02-17

Applicant: Henry V. Holec ,  Wm. Todd Crandell

Inventor： Henry V. Holec ,  Wm. Todd Crandell

IPC: H01R12/00

CPC classification number: H05K3/363 ,  H05K1/0209 ,  H05K1/118 ,  H05K3/0052 ,  H05K3/0061 ,  H05K2201/09481 ,  H05K2201/09572 ,  H05K2201/10106

Abstract: In some embodiments, a circuit board interconnect may include one or more of the following features: (a) a first circuit board having a plated through hole within a metal pad on the circuit board, the through hole providing a passage for solder to connect the first circuit board to a second circuit board, (b) a second circuit board having a metal pad able to couple to the first circuit board in an overlapping fashion when solder is passed through the plated through hole, and (c) a non-conductive solder repelling material on a surface of one circuit board.

Abstract translation: 在一些实施例中，电路板互连可以包括以下特征中的一个或多个：（a）在电路板上的金属焊盘内具有电镀通孔的第一电路板，所述通孔提供用于焊料连接 第一电路板到第二电路板，（b）第二电路板，具有当焊料通过电镀通孔时能够以重叠的方式耦合到第一电路板的金属焊盘，以及（c）不导电 在一个电路板的表面上的排斥材料。

公开(公告)号：US07605075B2

公开(公告)日：2009-10-20

申请号：US11164791

申请日：2005-12-06

Applicant: Shuichl Okabe ,  Yasumitsu Orii ,  Mitsuya M. Ishida

Inventor： Shuichl Okabe ,  Yasumitsu Orii ,  Mitsuya M. Ishida

IPC: H01L21/4763

CPC classification number: H05K1/112 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05025 ,  H01L2224/05111 ,  H01L2224/05139 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/13025 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H05K1/162 ,  H05K1/167 ,  H05K3/062 ,  H05K3/3436 ,  H05K3/3484 ,  H05K3/427 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09572 ,  H05K2201/0969 ,  H05K2201/10674 ,  H05K2203/0361 ,  H05K2203/0384 ,  H05K2203/043 ,  Y10T29/49165 ,  H01L2924/00014

Abstract: A multilayer circuit board is provided that includes at least two insulating layers each sandwiched by circuit layers, thus having at least one internal circuit layer sandwiched by the at least two insulating layers. Via holes are formed in one or more of the insulating layers at the same pitch as bump electrodes of an integrated circuit chip, which permit insertion of the bump electrodes of an integrated circuit chip into the via holes of the multilayer circuit board. Metal films formed within the via holes are electrically connected to at least one of the circuit layers. An internal capacitor may be formed in a predetermined area of an insulating layer and predetermined areas of circuit layers which sandwich the predetermined area of the insulating layer and are opposed to each other. An internal resistor may be formed in an inner circuit layer.

Abstract translation: 提供了多层电路板，其包括至少两个绝缘层，每个绝缘层均被电路层夹在中间，因此至少有一个内部电路层被至少两个绝缘层夹在中间。 在一个或多个绝缘层中以与集成电路芯片的突起电极相同的间距形成通孔，这允许集成电路芯片的凸块电极插入到多层电路板的通孔中。 形成在通孔内的金属膜电连接至至少一个电路层。 可以在绝缘层的预定区域和夹着绝缘层的预定区域并彼此相对的电路层的预定区域上形成内部电容器。 内部电阻可以形成在内部电路层中。

公开(公告)号：US20090211788A1

公开(公告)日：2009-08-27

申请号：US12390022

申请日：2009-02-20

Applicant: Shinya YANBE ,  Kazuo MARUYAMA ,  Takashi IKEDA ,  Tetsu MIYAMOTO

Inventor： Shinya YANBE ,  Kazuo MARUYAMA ,  Takashi IKEDA ,  Tetsu MIYAMOTO

IPC: H05K1/02

CPC classification number: H05K1/0206 ,  H05K1/112 ,  H05K3/341 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/09536 ,  H05K2201/09572 ,  H05K2201/09627 ,  H05K2201/10969 ,  Y02P70/613

Abstract: A heat dissipating structure of a print circuit board to improve heat-dissipation efficiency for mounted electronic components while retaining required soldering strength is disclosed.The heat dissipation structure of a print circuit board comprising a stack of multiple layers including a mounting surface layer on which electronic components including heat generating components are soldered. On both sides of the print circuit board, inner vias bore surface layers but inner layers are not bored. Core vias bore the inner layers in the print circuit board but the surface layers are not bored. The inner vias and the core vias are positioned at the predetermined distance over the layer surface. Heat from heat generating components is conducted through the inner vias on surface layers and the core vias inside the circuit board to the outside, high efficiency of the heat-dissipation is achieved.

Abstract translation: 公开了一种印刷电路板的散热结构，用于提高安装的电子部件的散热效率，同时保持所需的焊接强度。 包括多层堆叠的印刷电路板的散热结构，包括安装表面层，在其上焊接包括发热部件的电子部件。 在印刷电路板的两侧，内部通孔内表面层，但内层不会无孔。 核心通孔穿过印刷电路板中的内层，但是表面层不是无孔的。 内通孔和芯通孔以层表面上的预定距离定位。 来自发热部件的热量通过表层的内通孔和电路板内的核心通孔进入外部，实现了高效率的散热。

公开(公告)号：US07560371B2

公开(公告)日：2009-07-14

申请号：US11511619

申请日：2006-08-29

Applicant: Ross S. Dando ,  Steven Oliver ,  Swarnal Borthakur ,  Kevin Hutto

Inventor： Ross S. Dando ,  Steven Oliver ,  Swarnal Borthakur ,  Kevin Hutto

IPC: H01L21/20

CPC classification number: H01L21/76898 ,  H05K3/3468 ,  H05K2201/09572 ,  H05K2203/0763 ,  H05K2203/082

Abstract: Methods of forming a conductive via in a substrate include contacting the substrate with a wave of conductive liquid material, such as molten solder, and drawing the liquid material into the aperture with a vacuum. The wave may be formed by flowing the liquid material out from an outlet in a direction generally against the gravitational field. The liquid material may be solidified to form an electrically conductive structure. A plurality of apertures may be selectively filled with the liquid material one at a time, and liquids having different compositions may be used to provide conductive vias having different compositions in the same substrate. Systems for forming conductive vias include a substrate fixture, a vacuum device having a vacuum fixture, and a solder-dispensing device configured to provide a wave of molten solder material. Relative lateral and vertical movement is provided between the wave of molten solder and a substrate supported by the substrate fixture.

Abstract translation: 在衬底中形成导电通孔的方法包括使衬底与诸如熔融焊料的导电液体材料的波接触，并且用真空将液体材料拉入孔中。 该波浪可以通过使液体材料沿着通常抵靠重力场的方向从出口流出而形成。 液体材料可以被固化以形成导电结构。 可以一次一个地选择性地填充多个孔，并且可以使用具有不同组成的液体来在同一基底中提供具有不同组成的导电通孔。 用于形成导电通孔的系统包括基板固定装置，具有真空夹具的真空装置以及被配置为提供熔融焊料材料波的焊料分配装置。 在熔融焊料的波浪和由基板夹具支撑的基板之间提供相对的横向和垂直运动。

公开(公告)号：US20080206516A1

公开(公告)日：2008-08-28

申请号：US12032847

申请日：2008-02-18

Applicant: Yoshihiko Matsushima

Inventor： Yoshihiko Matsushima

IPC: B32B3/10 ,  C23C26/00

CPC classification number: H05K1/112 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H05K1/0206 ,  H05K1/0212 ,  H05K3/3484 ,  H05K3/3494 ,  H05K3/4046 ,  H05K2201/0347 ,  H05K2201/0394 ,  H05K2201/09563 ,  H05K2201/09572 ,  H05K2201/0959 ,  H05K2201/10416 ,  H05K2203/0455 ,  H05K2203/1581 ,  Y10T428/24273 ,  H01L2924/00014

Abstract: A surface mount circuit board includes: an insulating substrate having through holes each extending from front to rear surfaces of the insulating substrate; high thermal conductive members each filing a different one of the though holes; lands each disposed to cover an end surface of a different one of the high thermal conductive members and also cover part of the front surface around the peripheral edge of the corresponding through hole; and heat receiving members each disposed to cover an end surface of a different one of the high thermal conductive members and also cover part of the rear surface around the peripheral edge of the corresponding through hole. Each land may be made of solder cream filled into and flashed out of the through hole. Alternatively to the high thermal conductive members, wire rods may be fitted into the respective through holes.

Abstract translation: 表面安装电路板包括：具有各自从绝缘基板的前后表面延伸的通孔的绝缘基板; 高导热构件，每个填充不同的通孔; 每个设置成覆盖不同的一个高导热构件的端表面并且还覆盖围绕相应通孔的周缘的前表面的一部分; 以及热接收构件，每个热接收构件设置成覆盖不同的一个高导热构件的端表面，并且还覆盖围绕相应通孔的周缘的后表面的一部分。 每个地面可以由填充并从通孔中闪烁的焊膏制成。 作为高导热构件的替代方案，线材可以装配到相应的通孔中。

公开(公告)号：US20080146048A1

公开(公告)日：2008-06-19

申请号：US11950825

申请日：2007-12-05

Applicant: Hubert Nestler

Inventor： Hubert Nestler

IPC: H01R12/14 ,  B23P11/00

CPC classification number: H05K3/363 ,  H05K1/0206 ,  H05K3/3494 ,  H05K2201/09572 ,  H05K2201/10666 ,  H05K2203/0278 ,  Y10T29/49128

Abstract: A printed circuit board connection has a first printed circuit board that includes a nonconductive plate-shaped first substrate with at least one first conductor track on the upper side, a second printed circuit board including a nonconductive plate-shaped second substrate with at least one second conductor track on the underside, with the first conductor track and the second conductor track being electrically conductively connected by solder. On the upper side of the second substrate, a third conductor track is provided, which is diametrically opposite the second conductor track, and the second conductor track and the third conductor track are connected electrically conductively to one another via at least one opening in the second substrate, in order to make a heat-conducting connection of the heated soldering die with the solder.

Abstract translation: 印刷电路板连接具有第一印刷电路板，该第一印刷电路板包括在上侧具有至少一个第一导体轨道的非导电板状第一基板，第二印刷电路板，包括具有至少一个第二电极的非导电板状第二基板 下侧的导体轨道，第一导体轨道和第二导体轨道通过焊料导电连接。 在第二基板的上侧，设置与第二导体轨道径向相反的第三导体轨道，并且第二导体轨道和第三导体轨道通过第二导体轨道中的至少一个开口彼此电连接 基板，以便使加热的焊接模具与焊料的导热连接。

公开(公告)号：US07381905B2

公开(公告)日：2008-06-03

申请号：US11138314

申请日：2005-05-27

Applicant: Shinichi Yoshioka

Inventor： Shinichi Yoshioka

IPC: H01R12/04 ,  H05K1/11

CPC classification number: H05K1/0206 ,  H05K3/341 ,  H05K3/3452 ,  H05K2201/09572 ,  H05K2201/099 ,  H05K2201/09909 ,  H05K2201/10166 ,  H05K2201/10969 ,  H05K2201/2036 ,  H05K2203/0455 ,  Y02P70/613

Abstract: A structure is disclosed for fixing an electronic device having a heat-releasing plate to a substrate. The structure includes a substrate, a land portion which is formed on a front face of the substrate and on which said heat-releasing plate of the electronic device is to be soldered, a through-hole formed in and penetrating said substrate and said land portion. The through-hole is adapted to release heat generated in the electronic device. The structure further includes a partitioning portion provided to be positioned between the heat-releasing plate and the land portion. The partitioning portion is adapted for preventing a solder, which should partially run out from a specific edge portion of the heat-releasing plate on soldering the heat-releasing plate to the land portion, from partially flowing into the through-hole.

Abstract translation: 公开了一种用于将具有散热板的电子装置固定到基板的结构。 该结构包括：基板，形成在基板的前表面上并且其上要焊接电子设备的散热板的接合部，形成并穿透所述基板的通孔和所述接地部分 。 通孔适于释放在电子设备中产生的热量。 该结构还包括设置在定位在散热板和陆部之间的分隔部分。 分隔部适于防止在将散热板焊接到台面部分时部分地从散热板的特定边缘部分流出的焊料部分地流入通孔。

公开(公告)号：US07361593B2

公开(公告)日：2008-04-22

申请号：US11027745

申请日：2004-12-30

Applicant: William R. Freeman ,  Hong Jin Jiang

Inventor： William R. Freeman ,  Hong Jin Jiang

IPC: H01L21/44

CPC classification number: H01L24/83 ,  H01L21/486 ,  H01L23/15 ,  H01L24/26 ,  H01L2224/8385 ,  H01L2224/9202 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H05K3/3436 ,  H05K3/3463 ,  H05K3/4614 ,  H05K2201/09536 ,  H05K2201/09572 ,  H05K2201/10666 ,  H05K2201/10992 ,  H05K2201/2036 ,  Y02P70/613 ,  H01L2924/00

Abstract: Exemplary embodiments of the present invention illustrate methods to electrically connect multiple layers of a substrate. A first and second layer each has at least one electrical trace on a surface thereof. The substrate includes an interposer structure attached to the second layer and separating the first and second layers on at least a portion of a perimeter of the first and second layers. The method includes a steps for forming a via in the first layer, placing a first electrically conductive substance in the via, placing a second electrically conductive substance on the second layer adjacent said via, and heating an area around said via and said second electrically conductive substance until said first and second electrically conductive substances at least partially melt to form the electrical connection.

Abstract translation: 本发明的示例性实施例示出了电连接衬底的多个层的方法。 第一层和第二层各自在其表面上具有至少一个电迹线。 衬底包括附接到第二层并且在第一层和第二层的周边的至少一部分上分离第一层和第二层的插入件结构。 该方法包括用于在第一层中形成通孔的步骤，将第一导电物质放置在通孔中，将第二导电物质放置在邻近所述通孔的第二层上，并且加热所述通孔周围的区域和所述第二导电 物质，直到所述第一和第二导电物质至少部分地熔化以形成电连接。

公开(公告)号：US20080036481A1

公开(公告)日：2008-02-14

申请号：US11880960

申请日：2007-07-24

Applicant: Chee Fong ,  Harjit Singh ,  Jelena Larsen ,  Raul Rodriquez-Montanez ,  Rodney Amen

Inventor： Chee Fong ,  Harjit Singh ,  Jelena Larsen ,  Raul Rodriquez-Montanez ,  Rodney Amen

IPC: G01R31/02 ,  H01R9/00

CPC classification number: G01R31/2818 ,  H05K1/0268 ,  H05K3/0094 ,  H05K3/3452 ,  H05K3/3484 ,  H05K2201/09572 ,  H05K2203/043 ,  H05K2203/1394 ,  Y10T29/49151

Abstract: A circuit board with vias that are suitable for use as test pads can be made according to a method whereby a first end of a via is blocked prior to heating solder paste that covers the opposite end of the via. As a result, air is trapped in the via when the solder paste is heated, which prevents melted solder paste from flowing in. Instead, the solder paste forms a dome shaped test pad over the via, which facilitates contact with the test probe. When applied to OSP circuit boards, the result is an OSP board with at least via that has a blocking material at one end and a solder dome over the opposite end.

Abstract translation: 可以根据以下方法制造适合用作测试焊盘的通孔的电路板，其中在加热覆盖通孔的相对端的焊膏之前，通孔的第一端被阻挡。 结果，当焊膏被加热时，空气被捕获在通孔中，这防止熔化的焊膏流入。替代地，焊膏在通孔上形成圆顶形的测试焊盘，这便于与测试探针接触。 当应用于OSP电路板时，其结果是具有至少通孔的OSP板，其一端具有阻挡材料，在另一端具有焊料圆顶。