公开(公告)号：US12098460B2

公开(公告)日：2024-09-24

申请号：US17153862

申请日：2021-01-20

Applicant: ASM IP Holding B.V.

Inventor： Eiichiro Shiba

IPC: C23C16/44 ,  C23C16/455 ,  C23C16/52 ,  H01J37/32

CPC classification number: C23C16/4412 ,  C23C16/45561 ,  C23C16/52 ,  H01J37/32449 ,  H01J37/32816 ,  H01J37/32834 ,  H01J37/3299

Abstract: A reactor system may comprise a first gas source; a second gas source; and a reaction chamber fluidly coupled to the first and second gas sources, wherein a first gas and a second may be supplied to the reaction chamber from the first and second gas sources, respectively, to achieve stability of a reaction chamber pressure. The reactor system may further comprise an exhaust line fluidly coupled to and downstream from the reaction chamber; a vent line fluidly coupled to the first and/or second gas source, and to the exhaust line, wherein the vent line bypasses the reaction chamber; a pressure monitor coupled to the vent line configured to monitor a vent line pressure within the vent line; and/or a vent line conductance control valve coupled to the vent line and configured to adjust in response to feedback from the pressure monitor.

公开(公告)号：US12094936B2

公开(公告)日：2024-09-17

申请号：US18376014

申请日：2023-10-03

Applicant: ASM IP Holding B.V.

Inventor： Fu Tang ,  Peng-Fu Hsu ,  Michael Eugene Givens ,  Qi Xie

IPC: H01L29/40 ,  C23C16/40 ,  H01L21/02 ,  H01L21/28 ,  H01L29/161 ,  H01L29/51 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/408 ,  C23C16/401 ,  C23C16/403 ,  H01L21/02145 ,  H01L21/022 ,  H01L21/02205 ,  H01L21/0228 ,  H01L21/28158 ,  H01L29/161 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66477 ,  H01L29/78

Abstract: Methods for forming a metal silicate film on a substrate in a reaction chamber by a cyclical deposition process are provided. The methods may include: regulating the temperature of a hydrogen peroxide precursor below a temperature of 70° C. prior to introduction into the reaction chamber, and depositing the metal silicate film on the substrate by performing at least one unit deposition cycle of a cyclical deposition process. Semiconductor device structures including a metal silicate film formed by the methods of the disclosure are also provided.

公开(公告)号：US20240304441A1

公开(公告)日：2024-09-12

申请号：US18598145

申请日：2024-03-07

Applicant: ASM IP Holding B.V.

Inventor： Yoshio Susa ,  Norihiko Ishinohachi ,  Yoshiyuki Kikuchi

IPC: H01L21/02

CPC classification number: H01L21/02274 ,  H01L21/02216 ,  H01L21/02348

Abstract: A method of forming dielectric material layer on a surface of a substrate is provided. The method may comprise steps of: a deposition step comprising: providing a substrate within a first reaction chamber; providing a vinyl-substituted cyclosiloxane precursor to the first reaction chamber; providing a reactant to the first reaction chamber; and providing pulsed plasma power to the first reaction chamber; and a curing step comprising: providing a curing gas to the substrate; and irradiating the substrate with a UV light.

公开(公告)号：US20240287679A1

公开(公告)日：2024-08-29

申请号：US18585313

申请日：2024-02-23

Applicant: ASM IP Holding B.V.

Inventor： Yongjin Jeong ,  Naoto Tsuji ,  ByeongPil Park ,  Yonjong Jeon

IPC: C23C16/46 ,  H01L21/67

CPC classification number: C23C16/46 ,  H01L21/67109

Abstract: A wafer processing apparatus may be presented. The apparatus may comprise a wafer support provided with a heater for supporting and heating the wafer, a chamber for enclosing and processing the wafer, a showerhead for letting gas in the chamber, a pumping port for removing gas from the chamber, a black wall with a substantially high emissivity provided to the chamber near the pumping port and configured to partly encircle the wafer support; and a white wall with a substantially low emissivity provided to the chamber on opposite side of the pumping port and configured to partly encircle the wafer support.

公开(公告)号：US12055863B2

公开(公告)日：2024-08-06

申请号：US18139459

申请日：2023-04-26

Applicant: ASM IP Holding B.V.

Inventor： Daniele Piumi ,  David Kurt de Roest

IPC: G03F7/20 ,  G03F7/00 ,  H01L23/00

CPC classification number: G03F7/70783 ,  G03F7/70033 ,  H01L23/562

Abstract: Methods of forming structures including a stress management layer for photolithography and structures including the stress management layer are disclosed. Further disclosed are systems for depositing a stress management layer. Exemplary methods include forming the stress management layer using one or more of plasma-enhanced cyclic (e.g., atomic layer) deposition and plasma-enhanced chemical vapor deposition.

公开(公告)号：US20240258102A1

公开(公告)日：2024-08-01

申请号：US18199018

申请日：2023-05-18

Applicant: ASM IP Holding B.V.

Inventor： Jihye Yang ,  Hongsuk Kim ,  JuHyuk Park ,  SungHa Choi ,  SangHeon Yong ,  KiHun Kim

IPC: H01L21/02

CPC classification number: H01L21/02274 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02219 ,  H01L21/0223 ,  H01L21/02252

Abstract: A substrate processing method includes providing a substrate having a gap structure into a reaction space, and supplying a silicon precursor and nitrogen reactant gas into the reaction space, and depositing a flowable silicon nitride film on the substrate to fill at least a part of the gap of the substrate, while maintaining an inside of the reaction space in a plasma state by applying radio frequency (RF) power in a pulsed mode, wherein as a duty ratio of the RF power decreases, fewer micropores are generated in the silicon nitride film in the gap.

公开(公告)号：US12040229B2

公开(公告)日：2024-07-16

申请号：US17989875

申请日：2022-11-18

Applicant: ASM IP Holding B.V.

Inventor： Dieter Pierreux ,  Steven van Aerde ,  Bert Jongbloed

IPC: H01L21/768 ,  G11C5/02 ,  G11C5/06 ,  H01L23/538 ,  H10B41/27 ,  H10B43/27

CPC classification number: H01L21/76879 ,  G11C5/025 ,  G11C5/06 ,  H01L21/76802 ,  H01L23/5384 ,  H10B41/27 ,  H10B43/27

Abstract: A method for forming a structure with a hole on a substrate is disclosed. The method may comprise: depositing a first structure on the substrate; etching a first part of the hole in the first structure; depositing a plug fill in the first part of the hole; depositing a second structure on top of the first structure; etching a second part of the hole substantially aligned with the first part of the hole in the second structure; and, etching the plug fill of the first part of the hole and thereby opening up the hole by dry etching. In this way 3-D NAND device may be provided.

公开(公告)号：US20240234129A1

公开(公告)日：2024-07-11

申请号：US18402950

申请日：2024-01-03

Applicant: ASM IP Holding B.V.

Inventor： Charles Dezelah ,  Michael Eugene Givens ,  Eric Jen Cheng Liu ,  Eric James Shero ,  Fu Tang ,  Marko Tuominen ,  Eva Elisabeth Tois ,  Andrea Illiberi ,  Tatiana Ivanova ,  Paul Ma ,  Gejian Zhao

IPC: H01L21/02 ,  H01L21/311

CPC classification number: H01L21/02178 ,  H01L21/02208 ,  H01L21/0228 ,  H01L21/02312 ,  H01L21/31111

Abstract: Methods and systems for forming structure comprising a threshold voltage tuning layer are disclosed. Exemplary methods include providing a treatment reactant to a reaction chamber to form a treated surface on the substrate surface and depositing threshold voltage tuning material overlying the treated surface. Additionally or alternatively, exemplary methods can include direct formation of metal silicide layers. Additionally or alternatively, exemplary methods can include use of an etchant.

公开(公告)号：US20240229237A9

公开(公告)日：2024-07-11

申请号：US18491546

申请日：2023-10-20

Applicant: ASM IP Holding B.V.

Inventor： Dieter Pierreux ,  Theodorus G.M. Oosterlaken

IPC: C23C16/455

CPC classification number: C23C16/45527 ,  C23C16/45544

Abstract: A method and system for depositing a material on one or more substrates by atomic layer deposition. The method comprising a step of performing a pulse (1) of a precursor of said material, wherein at least one of the average flow rate (f) and the average partial pressure (r) of said precursor over a first half (2) of the pulse (1) is higher than over a second half (3) of the pulse (1).

公开(公告)号：US12033885B2

公开(公告)日：2024-07-09

申请号：US17140661

申请日：2021-01-04

Applicant: ASM IP Holding B.V.

Inventor： Govindarajasekhar Singu ,  Dinkar Nandwana ,  Todd Robert Dunn ,  Shankar Swaminathan ,  Bhushan Zope ,  Carl Louis White

IPC: H01L21/687 ,  H01L21/683

CPC classification number: H01L21/68742 ,  H01L21/6838

Abstract: A reactor system may comprise a reaction chamber enclosed by a chamber sidewall, and a susceptor disposed in the reaction chamber between a reaction space and a lower chamber space comprised in the reaction chamber. The susceptor may comprise a pin hole disposed through the susceptor such that the pin hole is in fluid communication with the reaction space and the lower chamber space, and such that the reaction space is in fluid communication with the lower chamber space. A lift pin may be disposed in the pin hole. The lift pin may comprise a pin body comprising a pin channel, defined by a pin channel surface, disposed in the pin body such that the reaction space is in fluid communication with the lower chamber space when the lift pin is disposed in the pin hole.