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    CIRCUIT BOARD
    61.
    发明申请
    CIRCUIT BOARD 有权

    公开(公告)号：US20210267047A1

    公开(公告)日：2021-08-26

    申请号：US17032244

    申请日：2020-09-25

    Applicant: CHIPBOND TECHNOLOGY CORPORATION

    Inventor： Chia-En Fan ,  Hui-Yu Huang ,  Chih-Ming Peng ,  Chun-Te Lee

    IPC: H05K1/02 ,  H05K1/11

    Abstract: A circuit board disclosed in the present invention includes a substrate and a circuit layer. The circuit layer is formed on a surface of the substrate and includes at least one test circuit line. The test circuit line includes a main segment and a branch segment connected with each other. The branch segment is provided to be contacted with a test equipment for electrical test so as to protect the main segment from breaking during electrical test.

    SURFACE ACOUSTIC WAVE DEVICE AND METHOD OF MANUFACTURING THE SAME
    62.
    发明申请
    SURFACE ACOUSTIC WAVE DEVICE AND METHOD OF MANUFACTURING THE SAME 有权

    公开(公告)号：US20210013865A1

    公开(公告)日：2021-01-14

    申请号：US16581901

    申请日：2019-09-25

    Applicant: CHIPBOND TECHNOLOGY CORPORATION

    Inventor： Cheng-Hung Shih ,  Cheng-Fan Lin

    IPC: H03H9/02 ,  H03H9/05 ,  H01L41/047 ,  H03H9/145

    Abstract: A surface acoustic wave device includes a piezoelectric substrate, a supportive layer, a cover layer and a pillar bump. The supportive layer is disposed on the piezoelectric substrate and around a transducer, the cover layer covers the supportive layer, and the pillar bump is located in a lower via hole of the supportive layer and an upper via hole of the cover layer. The upper via hole has a lateral opening located on a lateral surface of the cover layer, and the pillar bump in the cover layer protrudes from the lateral surface of the cover layer via the lateral opening.

    CHIP PACKAGE AND CHIP THEREOF
    65.
    发明申请
    CHIP PACKAGE AND CHIP THEREOF 审中-公开

    公开(公告)号：US20200091385A1

    公开(公告)日：2020-03-19

    申请号：US16260528

    申请日：2019-01-29

    Applicant: CHIPBOND TECHNOLOGY CORPORATION

    Inventor： Chin-Tang Hsieh ,  Cheng-Hung Shih

    IPC: H01L33/62 ,  H01L33/38

    Abstract: A microchip is electrically connected to a substrate to become a chip package, preferably for LED. A chip of the package includes a body and at least one electrode which is disposed and exposed on a surface of the body. The electrode includes a confining groove and a confining wall. The confining wall is peripherally located around the confining groove and provided to confine at least one conductive particle of an adhesive in the confining groove. The electrode of the chip is electrically connected to a bonding pad of a substrate via the conductive particle confined in the confining groove.

    Semiconductor package and circuit substrate thereof
    66.
    发明授权
    Semiconductor package and circuit substrate thereof 有权

    公开(公告)号：US10340216B1

    公开(公告)日：2019-07-02

    申请号：US15990747

    申请日：2018-05-28

    Applicant: CHIPBOND TECHNOLOGY CORPORATION

    Inventor： Chin-Tang Hsieh

    IPC: H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L23/14 ,  H01L23/12 ,  H01L25/00 ,  H01L21/48

    Abstract: A semiconductor package includes a chip and a circuit substrate having leads. Each of the leads has an upper wide portion and a lower wide portion in a bonding area so as there are an upper notch and a lower notch in the bonding area. The upper and lower notches face toward the upper and lower wide portions of the adjacent lead, respectively. The upper and lower wide portions are designed to prevent defective bonding caused by shifting between the leads and the chip humps. Additionally, there are adequate etching spaces between the leads because the wide portions and the notches are staggered with each other such that incomplete etching between the leads is preventable during etching process.

    Wafer cassette
    67.
    发明授权
    Wafer cassette 有权

    公开(公告)号：US10242899B2

    公开(公告)日：2019-03-26

    申请号：US15456652

    申请日：2017-03-13

    Applicant: CHIPBOND TECHNOLOGY CORPORATION

    Inventor： Chien-Ming Kuo ,  Hung-Ching Chang

    IPC: H01L21/00 ,  H01L21/677 ,  H01L21/673

    Abstract: A wafer cassette for storing wafers comprises a case and a plurality of carriers for carrying the wafers. Each of the carriers is pivotally and movably mounted to a pivot of the case, and can selectively accommodate in or depart from an accommodation space of the case for benefit of the wafer loading or unloading.

    Flexible substrate
    68.
    发明授权
    Flexible substrate 有权
    柔性基材

    公开(公告)号：US09510441B2

    公开(公告)日：2016-11-29

    申请号：US14642945

    申请日：2015-03-10

    Applicant: CHIPBOND TECHNOLOGY CORPORATION

    Inventor： Chin-Tang Hsieh ,  Fei-Jain Wu ,  Chia-Jung Tu

    IPC: H05K1/00 ,  H05K1/02 ,  H05K1/03

    CPC classification number: H05K1/0209 ,  H05K1/0203 ,  H05K1/028 ,  H05K1/0346 ,  H05K1/0393 ,  H05K1/189 ,  H05K2201/0154 ,  H05K2201/066 ,  H05K2201/068

    Abstract: A flexible substrate includes a circuit board, a flexible heat-dissipating structure and an adhesive. The circuit board has a substrate and a circuit layer formed on a top surface of the substrate, and the flexible heat-dissipating structure has a flexible supporting plate and a flexible heat-dissipating metal layer formed on a surface of the flexible supporting plate. The flexible heat-dissipating metal layer of the flexible heat-dissipating structure is connected with a bottom surface of the substrate by the adhesive. The circuit layer and the flexible heat-dissipating metal layer are made of same material.

    Abstract translation: 柔性基板包括电路板，柔性散热结构和粘合剂。 电路基板具有形成在基板顶面的基板和电路层，柔性散热结构具有柔性支撑板和形成在柔性支撑板的表面上的柔性散热金属层。 柔性散热结构的柔性散热金属层通过粘合剂与基板的底面连接。 电路层和柔性散热金属层由相同的材料制成。

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