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公开(公告)号:US20140374913A1
公开(公告)日:2014-12-25
申请号:US13925900
申请日:2013-06-25
Applicant: Infineon Technologies AG
Inventor: Ralf Otremba , Klaus Schiess , Anton Mauder
CPC classification number: H01L23/3675 , H01L23/3107 , H01L23/4006 , H01L23/4093 , H01L23/49562 , H01L2224/06181 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/13062 , H01L2924/13091 , H01L2924/1431 , H05K1/0203 , H05K1/0265 , H05K1/0287 , H05K3/3447 , H05K2201/066 , H05K2201/09227 , H01L2924/00
Abstract: Various embodiments may provide a circuit arrangement. The circuit arrangement may include a carrier having at least one electrically conductive line; a plurality of discrete encapsulated integrated circuits arranged on the carrier; wherein a first integrated circuit of the plurality of integrated circuits is in electrical contact with a second integrated circuit of the plurality of integrated circuits to form a first current path bypassing the carrier; and wherein the first integrated circuit of the plurality of integrated circuits is in electrical contact with the second integrated circuit of the plurality of integrated circuits to form a second current path via the at least one electrically conductive line.
Abstract translation: 各种实施例可以提供电路装置。 电路装置可以包括具有至少一个导电线的载体; 布置在载体上的多个分立封装集成电路; 其中所述多个集成电路的第一集成电路与所述多个集成电路中的第二集成电路电接触以形成绕过所述载体的第一电流路径; 并且其中所述多个集成电路中的所述第一集成电路与所述多个集成电路中的所述第二集成电路电接触以形成经由所述至少一个导电线路的第二电流路径。
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公开(公告)号:US20140103902A1
公开(公告)日:2014-04-17
申请号:US13650023
申请日:2012-10-11
Applicant: INFINEON TECHNOLOGIES AG
Inventor: Ralf Otremba , Marco Seibt
IPC: H01L23/544 , G01R19/00 , G01K7/01
CPC classification number: H01L23/34 , H01L23/3107 , H01L23/49524 , H01L23/49562 , H01L23/49568 , H01L24/73 , H01L25/072 , H01L25/18 , H01L2224/32225 , H01L2224/32245 , H01L2224/371 , H01L2224/37124 , H01L2224/37139 , H01L2224/37147 , H01L2224/40137 , H01L2224/40247 , H01L2224/48137 , H01L2224/48139 , H01L2224/48247 , H01L2224/73263 , H01L2224/73265 , H01L2924/1305 , H01L2924/13055 , H01L2924/13062 , H01L2924/13091 , H01L2924/00012 , H01L2924/00
Abstract: A semiconductor package includes a power semiconductor chip having a control electrode, a first load electrode and a second load electrode. The package also includes a first terminal conductor electrically coupled to the control electrode, a second terminal conductor electrically coupled to the first load electrode and a third terminal conductor electrically coupled to the second load electrode. Further, the package includes a temperature sensor electrically coupled to at least two of the first, second and third terminal conductor.
Abstract translation: 半导体封装包括具有控制电极,第一负载电极和第二负载电极的功率半导体芯片。 封装还包括电耦合到控制电极的第一端子导体,电耦合到第一负载电极的第二端子导体和电耦合到第二负载电极的第三端子导体。 此外,封装包括电耦合到第一,第二和第三端子导体中的至少两个的温度传感器。
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公开(公告)号:US20140084449A1
公开(公告)日:2014-03-27
申请号:US14036110
申请日:2013-09-25
Applicant: Infineon Technologies AG
Inventor: Ralf Otremba , Josef Hoeglauer , Xaver Schloegel , Juergen Schredl
CPC classification number: H01L23/4006 , H01L21/50 , H01L23/49562 , H01L2924/0002 , H01L2924/00
Abstract: A semiconductor housing includes a fixing mechanism and at least one side having structurings. A method for producing a semiconductor device is provided in which a thermally conductive paste is applied on the at least one side of the semiconductor housing and/or of a heat sink. The semiconductor housing is fixed to the heat sink by means of the fixing mechanism. A pressure is exerted on the thermally conductive paste by means of the fixing mechanism and the thermally conductive paste is diverted by means of diversion channels depending on the pressure exerted.
Abstract translation: 半导体外壳包括固定机构和具有结构的至少一个侧面。 提供一种制造半导体器件的方法,其中在半导体外壳和/或散热器的至少一侧上施加导热膏。 半导体外壳借助固定机构固定在散热片上。 通过固定机构对导热性浆料施加压力,导热膏根据所施加的压力利用引流通道而转向。
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公开(公告)号:US10886186B2
公开(公告)日:2021-01-05
申请号:US16365837
申请日:2019-03-27
Applicant: Infineon Technologies AG
Inventor: Thorsten Scharf , Ralf Otremba , Thomas Bemmerl , Irmgard Escher-Poeppel , Martin Gruber , Michael Juerss , Thorsten Meyer , Xaver Schloegel
IPC: H01L23/053 , H01L23/08 , H01L23/00 , H01L23/40
Abstract: A semiconductor package system comprises a semiconductor package and a cap. The semiconductor package comprises a die pad, a chip mounted or arranged to a first main face of the die pad and an encapsulation body encapsulating the chip and the die pad. The cap covers at least partly an exposed second main face of the die pad. The cap comprises a cap body of an electrically insulating and thermally conductive material and a fastening system fastening the cap to the semiconductor package. The fastening system extends from the cap body towards the encapsulation body or along a side surface of the semiconductor package.
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公开(公告)号:US20200219841A1
公开(公告)日:2020-07-09
申请号:US16820069
申请日:2020-03-16
Applicant: Infineon Technologies AG
Inventor: Edmund Riedl , Wu Hu Li , Alexander Heinrich , Ralf Otremba , Werner Reiss
Abstract: A method of making a semiconductor including soldering a conductor to an aluminum metallization is disclosed. In one example, the method includes substituting an aluminum oxide layer on the aluminum metallization by a substitute metal oxide layer or a substitute metal alloy oxide layer. Then, substitute metal oxides in the substitute metal oxide layer or the substitute metal alloy oxide layer are at least partly reduced. The conductor is soldered to the aluminum metallization using a solder material.
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公开(公告)号:US20170317001A1
公开(公告)日:2017-11-02
申请号:US15646189
申请日:2017-07-11
Applicant: Infineon Technologies AG
Inventor: Ralf Otremba , Klaus Schiess , Oliver Haeberlen , Matteo-Alessandro Kutschak
IPC: H01L23/31 , H01L23/14 , H01L23/495 , H01L25/10 , H01L23/00 , H01L23/538 , H01L21/48 , H01L21/56
Abstract: A device includes a driver circuit, a first semiconductor chip monolithically integrated with the driver circuit in a first semiconductor material, and a second semiconductor chip integrated in a second semiconductor material. The second semiconductor material is a compound semiconductor.
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公开(公告)号:US09735078B2
公开(公告)日:2017-08-15
申请号:US14254139
申请日:2014-04-16
Applicant: Infineon Technologies AG
Inventor: Ralf Otremba , Klaus Schiess , Oliver Haeberlen , Matteo-Alessandro Kutschak
IPC: H01L23/495 , H01L23/48 , H01L23/52 , H01L23/31 , H01L25/10 , H01L23/00 , H01L23/14 , H01L21/48 , H01L23/538 , H01L21/56
CPC classification number: H01L23/3157 , H01L21/4842 , H01L21/568 , H01L23/142 , H01L23/3107 , H01L23/3121 , H01L23/49513 , H01L23/49537 , H01L23/49562 , H01L23/49575 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/24 , H01L24/48 , H01L24/83 , H01L25/105 , H01L2224/06181 , H01L2224/24175 , H01L2224/24246 , H01L2224/291 , H01L2224/2919 , H01L2224/32225 , H01L2224/32245 , H01L2224/40137 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48137 , H01L2224/73263 , H01L2224/73267 , H01L2224/8382 , H01L2224/92244 , H01L2225/1029 , H01L2225/1047 , H01L2924/00 , H01L2924/10253 , H01L2924/1033 , H01L2924/13055 , H01L2924/13064 , H01L2924/13091 , H01L2924/00014 , H01L2924/20751 , H01L2924/20752 , H01L2924/20753 , H01L2924/20754 , H01L2924/20755 , H01L2924/20756 , H01L2924/20757 , H01L2924/20758 , H01L2924/20759 , H01L2924/2076 , H01L2924/014
Abstract: A device includes a first semiconductor chip that is arranged over a first carrier and includes a first electrical contact. The device further includes a second semiconductor chip arranged over a second carrier and including a second electrical contact arranged over a surface of the second semiconductor chip facing the second carrier. The second carrier is electrically coupled to the first electrical contact and the second electrical contact.
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公开(公告)号:US20170208684A1
公开(公告)日:2017-07-20
申请号:US15476235
申请日:2017-03-31
Applicant: Infineon Technologies AG
Inventor: Joachim Mahler , Ralf Otremba
CPC classification number: H05K1/036 , H05K1/0203 , H05K1/032 , H05K1/0373 , H05K1/115 , H05K3/0014 , H05K3/007 , H05K3/0094 , H05K3/02 , H05K3/105 , H05K3/4038 , H05K3/4626 , H05K2201/0104 , H05K2201/0129 , H05K2201/0215 , H05K2201/0224 , H05K2201/0281 , H05K2203/107 , H05K2203/1136 , Y10T29/49126 , Y10T428/24909
Abstract: A printed circuit board includes an electrically conductive layer and a dielectric layer including a polymer. The polymer includes at least one of a carbon layer structure and a carbon-like layer structure.
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公开(公告)号:US09648735B2
公开(公告)日:2017-05-09
申请号:US14729158
申请日:2015-06-03
Applicant: Infineon Technologies AG
Inventor: Joachim Mahler , Ralf Otremba
CPC classification number: H05K1/036 , H05K1/0203 , H05K1/032 , H05K1/0373 , H05K1/115 , H05K3/0014 , H05K3/007 , H05K3/0094 , H05K3/02 , H05K3/105 , H05K3/4038 , H05K3/4626 , H05K2201/0104 , H05K2201/0129 , H05K2201/0215 , H05K2201/0224 , H05K2201/0281 , H05K2203/107 , H05K2203/1136 , Y10T29/49126 , Y10T428/24909
Abstract: A printed circuit board includes an electrically conductive layer and a dielectric layer including a polymer, wherein the polymer includes metallic particles.
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公开(公告)号:US20160365296A1
公开(公告)日:2016-12-15
申请号:US15176952
申请日:2016-06-08
Applicant: Infineon Technologies AG
Inventor: Ralf Otremba , Edward Fuergut , Christian Kasztelan , Hsieh Ting Kuek , Teck Sim Lee , Sanjay Kumar Murugan , Lee Shuang Wang
IPC: H01L23/31 , H01L21/56 , H01L21/48 , H01L23/495 , H01L23/29
CPC classification number: H01L23/3114 , H01L21/4825 , H01L21/565 , H01L23/293 , H01L23/295 , H01L23/3121 , H01L23/36 , H01L23/49503 , H01L23/4952 , H01L23/49541 , H01L23/49555 , H01L23/49562 , H01L23/49568 , H01L24/05 , H01L24/48 , H01L24/49 , H01L2224/04042 , H01L2224/05553 , H01L2224/05554 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/49109 , H01L2224/49111 , H01L2924/00014 , H01L2924/10253 , H01L2924/10271 , H01L2924/10272 , H01L2924/10329 , H01L2924/1033 , H01L2924/13055 , H01L2924/13062 , H01L2924/13064 , H01L2924/13091 , H01L2924/14 , H01L2924/1434 , H01L2924/1461 , H01L2924/181 , H01L2924/1815 , H01L2224/45099 , H01L2224/05599 , H01L2924/00012
Abstract: A device includes an encapsulation material and a first lead and a second lead protruding out of a surface of the encapsulation material. A recess extends into the surface of the encapsulation material. An elevation is arranged on the surface of the encapsulation material. The first lead protrudes out of the elevation.
Abstract translation: 一种装置包括封装材料和从包封材料的表面突出的第一引线和第二引线。 凹部延伸到封装材料的表面。 在封装材料的表面上布置有高度。 第一个引线突出了海拔高度。
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