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公开(公告)号：US09795035B2
公开(公告)日：2017-10-17
申请号：US15356852
申请日：2016-11-21
Inventor： Jonathan Douglas Hatch , Stephen McGarry Hatch
CPC classification number: H05K1/0306 , H05K1/02 , H05K1/028 , H05K1/0393 , H05K1/115 , H05K1/144 , H05K3/0023 , H05K3/0064 , H05K3/007 , H05K3/048 , H05K3/103 , H05K3/125 , H05K3/386 , H05K3/389 , H05K3/4611 , H05K3/4644 , H05K2201/0145 , H05K2201/0154 , H05K2201/05 , H05K2201/09009 , H05K2203/0152
Abstract: A PCB page blank includes a flexible substrate, a curable adhesive, a conductive layer, and a conductive layer support. The flexible substrate receives an opaque negative circuit pattern thereon. Portions of the curable adhesive not obscured by the circuit pattern may bond to portions of the conductive layer when exposed to light. The bonded portions of the conductive layer shear or tear from non-bonded portions of the conductive layer such that the bonded portions remain with the flexible substrate and the non-bonded portions remain with the conductive layer support when the flexible substrate and the conductive layer support are separated. The flexible substrate and the bonded portions of the conductive layer thus form a PCB prototype with the bonded portions of the conductive layer forming circuit traces of the circuit pattern.
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公开(公告)号：US20170280554A1
公开(公告)日：2017-09-28
申请号：US15503752
申请日：2016-08-01
Applicant: NIPPON MEKTRON, LTD.
Inventor： Ryoichi TOYOSHIMA
CPC classification number: H05K1/028 , H05K1/0218 , H05K3/062 , H05K3/28 , H05K3/384 , H05K3/421 , H05K3/4652 , H05K3/4655 , H05K2201/0154 , H05K2201/0989 , H05K2203/072 , Y10T29/49165
Abstract: [Problem to be Solved]A multilayer flexible printed circuit board having a strip line advantageous to folding is provided.[Solution]A multilayer flexible printed circuit board 100 of an embodiment is a multilayer flexible printed circuit board having a strip line foldable at a folding part F1, the board including: a flexible insulative substrate 30; an inner layer circuit pattern 5 provided inside the flexible insulative substrate 30 and including a signal line 6 extending in a predetermined direction; a ground thin film 14a constituting a ground layer at least in the folding part F1 out of a ground layer of the strip line and constituted of a nonelectrolytic plating coat 14 formed on the flexible insulative substrate 30; and a protective layer 20 that covers the ground thin film 14a and is in close contact with an exposed part 19 from which the flexible insulative substrate 30 is exposed.
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公开(公告)号：US09769921B2
公开(公告)日：2017-09-19
申请号：US14732309
申请日：2015-06-05
Applicant: Tyco Electronics AMP Korea Ltd
Inventor： Yang Yoon Choi , Ok Ky Beak
IPC: H05K1/02 , H05K1/09 , H05K1/11 , H05K3/06 , H05K3/46 , H05K3/42 , C25D5/02 , C23C18/16 , C23C18/54 , H05K3/38 , H05K3/00
CPC classification number: H05K1/0298 , C23C18/1637 , C23C18/1653 , C23C18/54 , C25D5/02 , H05K1/0206 , H05K1/0251 , H05K1/09 , H05K1/115 , H05K3/0094 , H05K3/06 , H05K3/386 , H05K3/429 , H05K3/4602 , H05K3/462 , H05K3/467 , H05K2201/0154 , H05K2201/0323 , H05K2201/095 , H05K2203/072 , H05K2203/0723 , H05K2203/073 , H05K2203/1476
Abstract: A printed circuit board has a double-sided substrate with an insulation layer, a bonding member, a base layer of an aluminum material, and a circuit pattern; a second insulation layer; a second bonding member; a second base layer; a through hole; a zinc substitution layer; a plating layer; and a second circuit pattern.
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公开(公告)号：US09763337B2
公开(公告)日：2017-09-12
申请号：US14652416
申请日：2013-12-20
Inventor： Stefan Jäger , Markus Leitgeb , Thomas Judge
CPC classification number: H05K3/387 , H05K1/0298 , H05K1/034 , H05K1/0346 , H05K1/09 , H05K1/111 , H05K1/117 , H05K3/244 , H05K3/4611 , H05K3/4632 , H05K2201/015 , H05K2201/0154 , H05K2201/09127 , H05K2201/0919 , H05K2201/09845 , H05K2203/0228 , H05K2203/068
Abstract: A semi-finished product for the production of a printed circuit board having a plurality of alternately arranged insulating layers and conductive layers and at least one hard gold-plated edge connector is characterized by the hard gold-plated edge connector being arranged on an inner conductive layer of the semi-finished product and being fully covered by at least one group of an insulating layer and a conductive layer. The inventive Method for producing a printed circuit board having a plurality of alternately arranged insulating layers and conductive layers and at least one hard gold-plated edge connector, where an outer conductive layer is surface treated, is characterized by the steps of providing a hard gold-plated edge connector on a group of an insulating layer and a conductive layer, covering the conductive layer and the hard gold-plated edge connector with at least one group of an insulating layer and a conductive layer, surface-treating an outer conductive layer to form connector pads for wire bonding of electronic components, cutting the insulating layers and the conductive layers down to the conductive layer forming the hard gold-plated edge connector, removing the insulating layers and conductive layers from the hard gold-plated edge connector. The inventive printed circuit board comprised of a plurality of alternately arranged insulating layers and conductive layers and at least one hard gold-plated edge connector is characterized by the hard gold-plated edge connector being arranged on an inner conductive layer of the printed circuit board, and the inner conductive layer forming the hard gold-plated edge connector protruding from the plurality of insulating layers and conductive layers.
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公开(公告)号：US20170240705A1
公开(公告)日：2017-08-24
申请号：US15589114
申请日：2017-05-08
Applicant: MITSUI CHEMICALS, INC.
Inventor： Kenichi FUKUKAWA , Masaki OKAZAKI , Yoshihiro SAKATA , Tatsuhiro URAKAMI , Atsushi OKUBO
CPC classification number: C08G73/1042 , B32B15/08 , B32B15/088 , B32B27/281 , B32B2307/206 , B32B2307/412 , B32B2457/08 , B32B2457/20 , B32B2551/00 , C08G73/10 , C08G73/1082 , C08J5/18 , C08J2379/08 , C08L79/08 , C09D179/08 , G03F7/037 , G03F7/11 , G03F7/20 , G03F7/322 , H01B3/306 , H05K1/0296 , H05K1/0346 , H05K1/0353 , H05K1/0393 , H05K3/0017 , H05K3/281 , H05K2201/0154
Abstract: Provided are a block polyamide acid imide having an appropriate solubility in aqueous alkaline solutions, and block polyimides that are obtained using same and have high transparency and a low coefficient of linear thermal expansion (low CTE). The block polyimide comprises blocks configured from repeating structural units represented by defined formula (1A) and blocks configured from repeating structural units represented by defined formula (1B).
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Patent Agency Ranking
公开(公告)号：US20170232251A1
公开(公告)日：2017-08-17
申请号：US15585093
申请日：2017-05-02
Applicant: Second Sight Medical Products, Inc.
Inventor： Jordan Neysmith , Robert Greenberg , James Little , Brian Mech , Neil Talbot , Qingfang Yao , David Zhou
CPC classification number: A61N1/0543 , A61N1/0541 , A61N1/36046 , H05K1/028 , H05K1/0353 , H05K1/09 , H05K1/111 , H05K1/115 , H05K1/118 , H05K3/0014 , H05K3/0017 , H05K3/0041 , H05K3/06 , H05K3/188 , H05K3/22 , H05K3/388 , H05K3/4644 , H05K2201/0129 , H05K2201/0133 , H05K2201/0141 , H05K2201/0154 , Y10T29/49156 , Y10T29/49158
Abstract: A flexible circuit electrode array with more than one layer of metal traces comprising: a polymer base layer; more than one layer of metal traces, separated by polymer layers, deposited on the polymer base layer, including electrodes suitable to stimulate neural tissue; and a polymer top layer deposited on the polymer base layer and the metal traces. Polymer materials are useful as electrode array bodies for neural stimulation. They are particularly useful for retinal stimulation to create artificial vision, cochlear stimulation to create artificial hearing, or cortical stimulation many purposes. The pressure applied against the retina, or other neural tissue, by an electrode array is critical. Too little pressure causes increased electrical resistance, along with electric field dispersion. Too much pressure may block blood flow.
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公开(公告)号：US20170200694A1
公开(公告)日：2017-07-13
申请号：US15427875
申请日：2017-02-08
Applicant: AUTOMATED ASSEMBLY CORPORATION
Inventor： Robert Neuman
IPC: H01L23/00 , H01L21/56 , H01L21/48 , H01L23/498 , H01L23/31
CPC classification number: H05K3/32 , H01L21/4846 , H01L21/4853 , H01L21/56 , H01L21/563 , H01L23/3135 , H01L23/3157 , H01L23/4985 , H01L23/49883 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L24/85 , H01L24/92 , H01L33/486 , H01L33/54 , H01L33/62 , H01L2224/32225 , H01L2224/45147 , H01L2224/48106 , H01L2224/48225 , H01L2224/48227 , H01L2224/73265 , H01L2224/8385 , H01L2224/85201 , H01L2224/85423 , H01L2224/85447 , H01L2224/85801 , H01L2224/92147 , H01L2224/92247 , H01L2924/00014 , H01L2924/12041 , H01L2924/1205 , H01L2924/1207 , H01L2924/1421 , H01L2933/005 , H01L2933/0066 , H05K1/189 , H05K3/284 , H05K3/321 , H05K3/3426 , H05K2201/0145 , H05K2201/0154 , H05K2201/10098 , H05K2201/10106 , H05K2203/049 , Y02P70/613 , H01L2924/00 , H01L2224/05599 , H01L2224/32245 , H01L2224/48247
Abstract: A disclosed circuit arrangement includes a flexible substrate. A layer of pressure sensitive adhesive (PSA) is directly adhered to a first major surface of the substrate. One or more metal foil pads and electrically conductive wire are attached directly on a surface of the PSA layer. The wire has a round cross-section and one or more portions directly connected to the one or more metal foil pads with one or more weld joints, respectively. An electronic device is attached directly on the surface of the layer of PSA and is electrically connected to the one or more portions of the round wire by one or more bond wires, respectively.
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公开(公告)号：US20170164463A1
公开(公告)日：2017-06-08
申请号：US15356852
申请日：2016-11-21
Inventor： JONATHAN DOUGLAS HATCH , STEPHEN MCGARRY HATCH
CPC classification number: H05K1/0306 , H05K1/02 , H05K1/028 , H05K1/0393 , H05K1/115 , H05K1/144 , H05K3/0023 , H05K3/0064 , H05K3/007 , H05K3/048 , H05K3/103 , H05K3/125 , H05K3/386 , H05K3/389 , H05K3/4611 , H05K3/4644 , H05K2201/0145 , H05K2201/0154 , H05K2201/05 , H05K2201/09009 , H05K2203/0152
Abstract: A PCB page blank includes a flexible substrate, a curable adhesive, a conductive layer, and a conductive layer support. The flexible substrate receives an opaque negative circuit pattern thereon. Portions of the curable adhesive not obscured by the circuit pattern may bond to portions of the conductive layer when exposed to light. The bonded portions of the conductive layer shear or tear from non-bonded portions of the conductive layer such that the bonded portions remain with the flexible substrate and the non-bonded portions remain with the conductive layer support when the flexible substrate and the conductive layer support are separated. The flexible substrate and the bonded portions of the conductive layer thus form a PCB prototype with the bonded portions of the conductive layer forming circuit traces of the circuit pattern.
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69.发明授权公开(公告)号：US09668345B2
公开(公告)日：2017-05-30
申请号：US14389387
申请日：2013-03-27
Applicant: HITACHI CHEMICAL COMPANY, LTD.
Inventor： Hiroyuki Yamaguchi , Seiichi Kurihara , Hiroshi Sakurai , Shunsuke Nukina
CPC classification number: H05K1/116 , H05K1/0216 , H05K1/0218 , H05K1/0251 , H05K1/0298 , H05K1/115 , H05K3/0047 , H05K3/429 , H05K3/4611 , H05K2201/0154 , H05K2201/09509 , H05K2201/09518 , H05K2201/09545 , H05K2201/0959 , H05K2201/09854 , H05K2201/10287 , H05K2203/061 , H05K2203/1572
Abstract: A multilayer wiring board includes a first metal foil wiring layer that has at least two or more layers of metal foil wiring lines and is arranged on a mounting surface side for mounting a surface mount type component, a wire wiring layer that is arranged on an opposite side of the mounting surface, and in which an insulation coating wire is wired, and a first interlayer conduction hole that has a conduction part which electrically connects the metal foil wiring line positioned on a surface of the first metal foil wiring layer to at least one of the metal foil wiring line in an inner layer of the first metal foil wiring layer and the insulation coating wire of the wire wiring layer. A hole diameter of the first interlayer conduction hole varies in a board thickness direction of the multilayer wiring board.
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公开(公告)号：US09648753B2
公开(公告)日：2017-05-09
申请号：US14758753
申请日：2013-12-31
Applicant: AMOGREENTECH CO., LTD.
Inventor： Jong-Soo Kim , Kyung-Hoon Lee , Jeong-Sang Yu , O-Chung Kwon
CPC classification number: H05K3/207 , H05K1/028 , H05K1/0287 , H05K1/0326 , H05K1/0346 , H05K1/092 , H05K1/118 , H05K3/12 , H05K2201/0145 , H05K2201/0154
Abstract: The present invention relates to a method for manufacturing a flexible printed circuit board and a flexible printed circuit board manufactured by using the same. A circuit pattern is formed with a conductive paste on one surface of a base material, and the circuit pattern is sintered at a temperature of 290° C. to 420° C. to manufacture the flexible printed circuit board. As such, manufacturing costs can be reduced and productivity can be improved through a simple yet convenient process. Also, the circuit pattern is formed without a plating process, such that the problem of circuit pattern separation occurring during the plating process can be addressed and product reliability can be improved.
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