公开(公告)号：US20030102152A1

公开(公告)日：2003-06-05

申请号：US10300049

申请日：2002-11-20

Inventor： Lawrence Leroy Kneisel ,  Mohan Paruchuri ,  Vivek Jairazbhoy ,  Vladimir Stoica

IPC: H05K001/02

CPC classification number: H05K3/4641 ,  H05K3/386 ,  H05K3/4038 ,  H05K3/445 ,  H05K2201/0195 ,  H05K2201/0305 ,  H05K2201/0361 ,  H05K2201/0397 ,  H05K2201/09554 ,  H05K2201/09581 ,  H05K2203/1438

Abstract: A multi-layer electronic circuit board design 10 having selectively formed apertures or cavities 26, and which includes grooves or troughs 20, 22 which are effective to selectively entrap liquefied adhesive material, thereby substantially preventing the adhesive material from entering the apertures 26.

公开(公告)号：US06475703B2

公开(公告)日：2002-11-05

申请号：US09203148

申请日：1998-12-01

Applicant: Delin Li ,  Achyuta Achari ,  Alice Dawn Zitzmann ,  Robert Edward Belke, Jr. ,  Brenda Joyce Nation ,  Edward McLeskey ,  Mohan R. Paruchuri ,  Lakhi Nandlal Goenka

Inventor： Delin Li ,  Achyuta Achari ,  Alice Dawn Zitzmann ,  Robert Edward Belke, Jr. ,  Brenda Joyce Nation ,  Edward McLeskey ,  Mohan R. Paruchuri ,  Lakhi Nandlal Goenka

IPC: G03C556

CPC classification number: H05K3/062 ,  H05K3/205 ,  H05K3/386 ,  H05K3/4685 ,  H05K2201/0361 ,  H05K2201/0394 ,  H05K2203/0369 ,  H05K2203/0376

Abstract: A multilayer circuit board having air bridge crossover structures and an additive method for producing the same, wherein the circuit includes specially designed metallic fortifying layers to mechanically and/or electrically fortify the circuit.

Abstract translation: 一种具有空气桥交叉结构的多层电路板及其制造方法，其特征在于，该电路包括专门设计的金属强化层，用于机械地和/或电气地加固电路。

公开(公告)号：US06403893B2

公开(公告)日：2002-06-11

申请号：US09907971

申请日：2001-03-20

Applicant: Achyuta Achari ,  Andrew Zachary Glovatsky ,  Robert Edward Belke ,  Brenda Joyce Nation ,  Delin Li ,  Lakhi N. Goenka ,  Robert Joseph Gordon ,  Thomas Bernd Krautheim

Inventor： Achyuta Achari ,  Andrew Zachary Glovatsky ,  Robert Edward Belke ,  Brenda Joyce Nation ,  Delin Li ,  Lakhi N. Goenka ,  Robert Joseph Gordon ,  Thomas Bernd Krautheim

IPC: H05K114

CPC classification number: H05K3/4038 ,  H05K3/0047 ,  H05K3/06 ,  H05K3/062 ,  H05K3/064 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/44 ,  H05K3/445 ,  H05K3/4608 ,  H05K3/4611 ,  H05K3/4623 ,  H05K3/4641 ,  H05K3/4685 ,  H05K2201/0305 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0379 ,  H05K2201/0397 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09563 ,  H05K2201/09609 ,  H05K2201/09845 ,  H05K2201/09881 ,  H05K2203/0369 ,  H05K2203/066 ,  H05K2203/0733 ,  H05K2203/1152 ,  H05K2203/1184 ,  H05K2203/1536 ,  Y10T29/49156

Abstract: A method for making a multi-layer electronic circuit board 136 having electroplated apertures 96, 98 which may be selectively and electrically isolated from an electrically grounded member 46 and further having selectively formed air bridges and/or crossover members 128 which are structurally supported by material 134.

Abstract translation: 一种用于制造具有电镀孔96,98的多层电子电路板136的方法，其可以与电接地构件46选择性地和电隔离，并且还具有结构上由材料支撑的选择性地形成的空气桥和/或交叉构件128 134。

公开(公告)号：US06327149B1

公开(公告)日：2001-12-04

申请号：US09655558

申请日：2000-09-06

Applicant: Lakhi Nandlal Goenka

Inventor： Lakhi Nandlal Goenka

IPC: H05K720

CPC classification number: H05K1/0209 ,  H01L23/38 ,  H01L2924/0002 ,  H05K2201/0361 ,  H05K2201/09781 ,  H05K2201/10219 ,  Y10T428/252 ,  H01L2924/00

Abstract: A multi-layer circuit board with a thermoelectric or “Peltier” cooler and a method forming a multi-layer circuit board with a thermoelectric or “Peltier” cooler is disclosed. The circuit board includes a thermoelectric cooler which is integrally formed within the circuit board and which is effective to efficiently absorb and dissipate heat from the circuit board.

Abstract translation: 公开了一种具有热电或“珀尔帖”冷却器的多层电路板，以及形成具有热电或“珀尔帖”冷却器的多层电路板的方法。 电路板包括一体形成在电路板内的热电冷却器，其有效地有效地吸收和散发来自电路板的热量。

公开(公告)号：US20010045407A1

公开(公告)日：2001-11-29

申请号：US09815364

申请日：2001-03-22

Inventor： Bharat Patel ,  Jay D. Baker ,  Mohan Paruchuri

IPC: H01B013/00

CPC classification number: H05K3/44 ,  H05K3/0047 ,  H05K3/06 ,  H05K3/062 ,  H05K3/064 ,  H05K3/4038 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/445 ,  H05K3/4608 ,  H05K3/4611 ,  H05K3/4614 ,  H05K3/462 ,  H05K3/4623 ,  H05K3/4641 ,  H05K3/4647 ,  H05K3/4652 ,  H05K3/4685 ,  H05K2201/0305 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0379 ,  H05K2201/0397 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09609 ,  H05K2201/09845 ,  H05K2201/09881 ,  H05K2203/0369 ,  H05K2203/066 ,  H05K2203/0733 ,  H05K2203/1152 ,  H05K2203/1184 ,  H05K2203/1536

Abstract: A method 10 for making a multi-layer electronic circuit board 98 having at least one electrically conductive protuberance 15 which forms a nullvianull and which traverses through the various layers of the electric circuit board 98, and further having at least one interconnection portion 102 which supports a wide variety of components and interconnection assemblies.

Abstract translation: 一种用于制造多层电子电路板98的方法10，该多层电子电路板98具有形成“通孔”的至少一个导电突起15，并穿过电路板98的各个层，并且还具有至少一个互连部分102 其支持各种组件和互连组件。

公开(公告)号：US06271481B1

公开(公告)日：2001-08-07

申请号：US09146514

申请日：1998-09-03

Applicant: Lakhi Nandlal Goenka ,  Jay DeAvis Baker

Inventor： Lakhi Nandlal Goenka ,  Jay DeAvis Baker

IPC: H01R909

CPC classification number: H05K1/111 ,  H05K3/062 ,  H05K3/205 ,  H05K3/4685 ,  H05K2201/0361 ,  H05K2201/0394 ,  H05K2201/09381 ,  H05K2203/0376 ,  Y02P70/611

Abstract: There is disclosed herein a tri-metal-layer precircuit 50 which may be selectively etched to provide a multilayer electronic circuit 60 having air bridge crossovers 49. The enlarged ends 44 of the upper air bridge elements 42, and/or the top pads 41 of the tower elements 43, are specially designed such that undercutting of the ends 44 and/or top pads 41 is minimized, thereby minimizing the risk of air bridge/top pad delamination.

Abstract translation: 这里公开了三金属层预热电路50，其可以被选择性地蚀刻以提供具有空气桥接器49的多层电子电路60.上部空气桥接元件42的扩大端部44和/或上部空气桥接元件42的顶部焊盘41 塔元件43被特别设计成使端部44和/或顶部焊盘41的底切最小化，从而最小化空气桥/顶垫分层的风险。

公开(公告)号：US06248247B1

公开(公告)日：2001-06-19

申请号：US09203146

申请日：1998-12-01

Applicant: Lakhi Nandlal Goenka ,  Mohan R. Paruchuri

Inventor： Lakhi Nandlal Goenka ,  Mohan R. Paruchuri

IPC: H01B1300

CPC classification number: H05K3/4685 ,  H05K3/06 ,  H05K3/062 ,  H05K3/20 ,  H05K2201/0338 ,  H05K2201/0361 ,  H05K2203/0152 ,  H05K2203/0361

Abstract: There is disclosed herein a multilayer circuit board having air bridge crossover structures and a subtractive method for producing the same, wherein the circuit includes specially designed metallic fortifying layers which provide mechanical and/or electrical fortification to the circuit.

Abstract translation: 这里公开了具有空气桥交叉结构的多层电路板及其制造方法，其中电路包括为电路提供机械和/或电气设防的专门设计的金属防腐层。

公开(公告)号：US06217783B1

公开(公告)日：2001-04-17

申请号：US09203147

申请日：1998-12-01

Applicant: Lakhi Nandlal Goenka ,  Mohan R. Paruchuri

Inventor： Lakhi Nandlal Goenka ,  Mohan R. Paruchuri

IPC: H05K300

CPC classification number: H05K3/4685 ,  H05K3/062 ,  H05K3/205 ,  H05K3/386 ,  H05K2201/0361 ,  H05K2201/0394 ,  H05K2203/0369 ,  H05K2203/0376

Abstract: A multilayer circuit board having strengthened air bridge crossover structures, and additive and subtractive methods for producing the same, wherein the circuit includes specially designed metallic fortifying layers to mechanically and/or electrically fortify the circuit. A preferred embodiment includes air bridge structures having generally T-shaped cross-sections, which provide strengthened, mechanically robust air bridges which are especially resistant to damage from flexure and displacement due to physical impact, bending, thermal excursions, and the like.

公开(公告)号：US06168725A

公开(公告)日：2001-01-02

申请号：US08996007

申请日：1997-12-22

Applicant: Achyuta Achari ,  Mohan R. Paruchuri

Inventor： Achyuta Achari ,  Mohan R. Paruchuri

IPC: C23F102

CPC classification number: C23F1/36 ,  H05K3/062 ,  H05K3/067 ,  H05K3/205 ,  H05K3/386 ,  H05K3/4685 ,  H05K2201/0361 ,  H05K2201/0394 ,  H05K2203/0152 ,  H05K2203/0369 ,  H05K2203/0376

Abstract: The invention is an aluminum etchant and method for chemically milling aluminum from, according to a preferred embodiment, a copper-aluminum-copper tri-metal layer to form three-dimensional circuits. The tri-metal comprises copper circuit patterns present on opposing surfaces of an aluminum foil, one of the copper patterns being laminated on a substrate. The etchant comprises an aqueous solution of 60 to 500 g/l base selected from (a) sodium hydroxide, (b) potassium hydroxide, and (c) their mixture; and 30 to 500 g/l of an additive selected from nitrite salt, a borate salt, a bromate salt, or mixture of any of them. The method comprises contacting the tri-metal with the etchant at a temperature between 25 and 95° C. for a time sufficient to remove a desired amount of the aluminum layer and provide (rigid, flexible, or 3-dimensional) electronic circuitry which may contain multiple conductive circuit layers.

Abstract translation: 本发明是一种铝蚀刻剂和方法，用于根据优选实施方案从铜 - 铝 - 铜三金属层化学研磨铝以形成三维电路。 三金属包括存在于铝箔的相对表面上的铜电路图案，其中一个铜图案层压在基板上。 蚀刻剂包括选自（a）氢氧化钠，（b）氢氧化钾和（c）它们的混合物的60至500g / l碱的水溶液; 和30-500g / l的选自亚硝酸盐，硼酸盐，溴酸盐或它们的混合物的添加剂。 该方法包括使三金属与蚀刻剂在25℃和95℃之间的温度下接触足够的时间以除去所需量的铝层，并提供（刚性，柔性或3维）电子电路，其可以 包含多个导电电路层。

公开(公告)号：US6133534A

公开(公告)日：2000-10-17

申请号：US234215

申请日：1994-04-27

Applicant: Naoki Fukutomi ,  Hidehiro Nakamura ,  Hajime Nakayama ,  Yoshiaki Tsubomatsu ,  Masanori Nakamura ,  Kouichi Kaitou ,  Atsushi Kuwano ,  Itsuo Watanabe ,  Masahiko Itabashi

Inventor： Naoki Fukutomi ,  Hidehiro Nakamura ,  Hajime Nakayama ,  Yoshiaki Tsubomatsu ,  Masanori Nakamura ,  Kouichi Kaitou ,  Atsushi Kuwano ,  Itsuo Watanabe ,  Masahiko Itabashi

IPC: G01R1/073 ,  H05K3/04 ,  H05K3/06 ,  H05K3/20 ,  H05K3/40 ,  H05K3/46 ,  H05K1/09

CPC classification number: G01R1/07314 ,  H05K3/205 ,  H05K3/4007 ,  H05K3/4647 ,  H05K3/4658 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0367 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/09781 ,  H05K2203/0152 ,  H05K2203/025 ,  H05K2203/0369 ,  H05K2203/0376 ,  H05K2203/0384 ,  H05K2203/0726 ,  H05K2203/0733 ,  H05K2203/1476 ,  H05K3/04 ,  H05K3/062 ,  H05K3/20 ,  H05K3/4652 ,  Y10S439/931

Abstract: A wiring board for electrical tests; having an insulating substrate, wiring of predetermined pattern which is embedded in the insulating substrate, and bump electrodes which are formed on the wiring and which are respectively brought into contact with corresponding electrodes of an article to-be-tested. Thus, even when the electrode pitch of the article to-be-tested such as a semiconductor device has become smaller(for example, less than 0.1 [mm]), the electrodes can be formed so as to cope with the electrical tests of the article.

Abstract translation: 用于电气测试的接线板; 具有绝缘基板，嵌入在绝缘基板中的预定图案的布线以及形成在布线上并且分别与要测试的物品的相应电极接触的突起电极。 因此，即使当诸如半导体器件的待测试物品的电极间距变得更小（例如，小于0.1 [mm]）时，也可以形成电极，以便应对电气测试 文章。