公开(公告)号：US08436456B2

公开(公告)日：2013-05-07

申请号：US12988697

申请日：2009-03-16

Applicant: Yoshiki Sota ,  Kazuaki Tatsumi

Inventor： Yoshiki Sota ,  Kazuaki Tatsumi

IPC: H01L23/02 ,  H01L21/00

CPC classification number: H01L23/49838 ,  H01L23/13 ,  H01L23/564 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73265 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/305 ,  H05K3/3452 ,  H05K2201/09072 ,  H05K2201/09772 ,  H05K2201/0989 ,  H05K2203/1178 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/00015

Abstract: A wiring board (10) of the present invention includes: a through hole (11b), provided in a semiconductor chip mounted region (15), penetrating the wiring board (10); and a groove pattern (13), provided on a solder resist (9) formed on the semiconductor chip mounted region (15), leading to the through hole (11b). The foregoing configuration makes it possible to guide, via the groove pattern (13) to the through hole (11b), moisture that collects in the semiconductor chip mounted region (15) and therefore to effectively discharge the moisture from the semiconductor chip mounted region (15). Thus, a semiconductor device (30) that employs the wiring board (10) does not suffer from vaporization and expansion, inside of it, due to heat that is applied at the time of manufacturing the semiconductor device (30) and at the time of mounting the semiconductor device (30) on a mount substrate. It is therefore possible to reduce expansion of the semiconductor device.

Abstract translation: 本发明的布线基板（10）具备：贯通所述布线基板（10）的贯通孔（11b），设置在半导体芯片安装区域（15）中。 以及设置在形成在半导体芯片安装区域（15）上的阻焊剂（9）上的通向通孔（11b）的凹槽图案（13）。 上述构造使得可以经由凹槽图案（13）引导到通孔（11b），其收集在半导体芯片安装区域（15）中的湿气，并且因此有效地从半导体芯片安装区域排出水分（ 15）。 因此，采用该布线基板（10）的半导体装置（30）在制造半导体装置（30）时由于加热而在其内部不会发生汽化膨胀， 将半导体器件（30）安装在安装基板上。 因此可以减少半导体器件的膨胀。

公开(公告)号：US20120248596A1

公开(公告)日：2012-10-04

申请号：US13492687

申请日：2012-06-08

Applicant: Reza A. Pagaila ,  Yaojian Lin ,  Jun Mo Koo

Inventor： Reza A. Pagaila ,  Yaojian Lin ,  Jun Mo Koo

IPC: H01L23/36 ,  H01L21/56 ,  H01L21/60

CPC classification number: H01L23/5389 ,  H01L21/561 ,  H01L21/568 ,  H01L23/295 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/367 ,  H01L23/3675 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/544 ,  H01L23/552 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/48 ,  H01L24/97 ,  H01L2221/68381 ,  H01L2221/68386 ,  H01L2223/54426 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16225 ,  H01L2224/21 ,  H01L2224/2105 ,  H01L2224/215 ,  H01L2224/22 ,  H01L2224/221 ,  H01L2224/24195 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29187 ,  H01L2224/2919 ,  H01L2224/29298 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48175 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2924/3511 ,  H05K1/0203 ,  H05K1/186 ,  H05K2201/09772 ,  H01L2924/01014 ,  H01L2924/05432 ,  H01L2924/0542 ,  H01L2924/0503 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929 ,  H01L2924/00012 ,  H01L2224/03 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device has a thermally conductive layer with a plurality of openings formed over a temporary carrier. The thermally conductive layer includes electrically non-conductive material. A semiconductor die has a plurality of bumps formed over contact pads on the die. The semiconductor die is mounted over the thermally conductive layer so that the bumps are disposed at least partially within the openings in the thermally conductive layer. An encapsulant is deposited over the die and thermally conductive layer. The temporary carrier is removed to expose the bumps. A first interconnect structure is formed over the encapsulant, semiconductor die, and bumps. The bumps are electrically connected to the first interconnect structure. A heat sink or shielding layer can be formed over the semiconductor die. A second interconnect structure can be formed over the encapsulant and electrically connected to the first interconnect structure through conductive vias formed in the encapsulant.

Abstract translation: 半导体器件具有形成在临时载体上的多个开口的导热层。 导热层包括非导电材料。 半导体管芯具有形成在管芯上的接触焊盘上的多个凸块。 半导体管芯安装在导热层上，使得凸块至少部分地设置在导热层的开口内。 密封剂沉积在管芯和导热层上。 移除临时载体以暴露凸块。 在密封剂，半导体管芯和凸块之上形成第一互连结构。 凸块电连接到第一互连结构。 可以在半导体管芯上形成散热器或屏蔽层。 第二互连结构可以形成在密封剂之上并且通过形成在密封剂中的导电通孔电连接到第一互连结构。

公开(公告)号：US20120200972A1

公开(公告)日：2012-08-09

申请号：US13362251

申请日：2012-01-31

Applicant: Takahiko FURUTA ,  Toru Itabashi ,  Yuuki Mikami ,  Naoki Tanimoto ,  Hiroaki Nakamura ,  Shigeki Nishiyama

Inventor： Takahiko FURUTA ,  Toru Itabashi ,  Yuuki Mikami ,  Naoki Tanimoto ,  Hiroaki Nakamura ,  Shigeki Nishiyama

IPC: H02H3/08 ,  H02H5/04

CPC classification number: H05K1/0293 ,  H01H85/046 ,  H05K1/0206 ,  H05K1/0209 ,  H05K1/0265 ,  H05K2201/09727 ,  H05K2201/09772 ,  H05K2201/10181

Abstract: An electronic control device includes a substrate, a plurality of component-mounted wires disposed on the substrate, a plurality of electronic components mounted on the respective component-mounted wires, a common wire coupled with each of the electronic components, an interrupt wire coupled between one of the component-mounted wires and the common wire, and a heat release portion. The interrupt wire melts in accordance with heat generated by an overcurrent. The heat release portion is attached to the common wire and is disposed at a position where a wiring distance from the interrupt wire is shorter than a wiring distance between the interrupt wire and any of the electronic components except for one of the electronic components mounted on the one of the component-mounted wires.

Abstract translation: 电子控制装置包括基板，设置在基板上的多个部件安装导线，安装在各个部件安装导线上的多个电子部件，与每个电子部件连接的公共线，连接在 部件安装线和公共线之一以及放热部。 中断线根据过电流产生的热量而熔化。 散热部分附接到公共导线，并且设置在与中断线的布线距离短于中断线和任何电子部件之间的布线距离的位置，除了安装在其上的电子部件之一 其中一个组件安装的电线。

公开(公告)号：US08212957B2

公开(公告)日：2012-07-03

申请号：US12647956

申请日：2009-12-28

Applicant: Daisuke Nakanishi

Inventor： Daisuke Nakanishi

IPC: G02F1/1333

CPC classification number: H04M1/22 ,  G02F1/1336 ,  G02F1/13452 ,  H05K1/0274 ,  H05K1/189 ,  H05K2201/09772 ,  H05K2201/09781 ,  H05K2201/10106 ,  H05K2201/2054

Abstract: A mount structure includes a wiring board and a semiconductor device composed of a light-emitting device or a light-receiving device mounted on one surface side of the wiring board such that an optical axis thereof is oriented in a direction that extends along a board surface of the wiring board. On the one surface side of the wiring board, a first pad on which a first terminal of the semiconductor device is mounted, a second pad on which a second terminal of the semiconductor device is mounted, and a light-shielding conductive layer are formed using the same conductive layer. The first pad and the second pad are arranged on respective sides of an imaginary center line along which the optical axis of the semiconductor device extends and the light-shielding conductive layer is provided at a position beneath a light emission center or a light reception center of the semiconductor device in plan view.

Abstract translation: 安装结构包括布线板和由安装在布线板的一个表面侧上的发光器件或光接收装置构成的半导体器件，使得其光轴沿着板表面延伸的方向定向 的接线板。 在布线板的一个表面侧上，安装半导体器件的第一端子的第一焊盘，安装半导体器件的第二端子的第二焊盘和遮光导电层，使用 相同的导电层。 第一焊盘和第二焊盘被布置在半导体器件的光轴延伸的假想中心线的两侧，并且遮光导电层设置在发光中心或光接收中心的下方的位置 该半导体器件在平面图中。

公开(公告)号：US08125789B2

公开(公告)日：2012-02-28

申请号：US12046893

申请日：2008-03-12

Applicant: Takao Nishimura

Inventor： Takao Nishimura

IPC: H05K7/10

CPC classification number: H05K1/111 ,  H01L23/49838 ,  H01L24/11 ,  H01L24/13 ,  H01L24/32 ,  H01L24/80 ,  H01L24/81 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/11 ,  H01L2224/1134 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/1411 ,  H01L2224/16225 ,  H01L2224/27013 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81194 ,  H01L2224/8121 ,  H01L2224/81385 ,  H01L2224/814 ,  H01L2224/81815 ,  H01L2224/83051 ,  H01L2224/83385 ,  H01L2224/83855 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/01088 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/15798 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/09272 ,  H05K2201/09381 ,  H05K2201/09709 ,  H05K2201/09772 ,  H05K2201/0979 ,  H05K2201/0989 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2924/01031 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/013 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A wiring substrate includes a plurality of electrode terminals, to which external connection terminals of an electronic component are coupled, arranged in a row on one principal surface thereof, wherein the electrode terminals each include: a first linear portion; a second linear portion extending from an end of the first linear portion in a direction different from a direction of the first linear portion; and a bent portion that is a part where the first linear portion and the second linear portion are connected.

Abstract translation: 布线基板包括多个电极端子，电子部件的外部连接端子与该电极端子的一个主表面上排成一行，电极端子各自包括：第一直线部分; 第二直线部分，沿与第一直线部分的方向不同的方向从第一线性部分的端部延伸; 以及作为第一直线部和第二直线部连接的部分的弯曲部。

公开(公告)号：US20120002389A1

公开(公告)日：2012-01-05

申请号：US13011980

申请日：2011-01-24

Applicant: Do-kyun Lee

Inventor： Do-kyun Lee

IPC: H05K1/14

CPC classification number: H05K3/222 ,  H05K1/113 ,  H05K1/181 ,  H05K2201/09772 ,  H05K2201/10159 ,  H05K2201/10363 ,  H05K2201/10522 ,  H05K2201/10545

Abstract: A printed circuit board unit usable with a computer device includes a main board on which a first component and a second component are mounted on an upper surface, and a routing unit mounted on at least one of the upper surface and a lower surface of the main board and including a sub-wire forming at least part of a wire to transmit a data between the first component and the second component.

Abstract translation: 可与计算机装置一起使用的印刷电路板单元包括：主板，第一部件和第二部件安装在主板上;以及布线单元，安装在主板的上表面和下表面中的至少一个上 并且包括形成至少一部分线的子线以在第一部件和第二部件之间传输数据。

公开(公告)号：US20110247868A1

公开(公告)日：2011-10-13

申请号：US13082258

申请日：2011-04-07

Applicant: Chih-Yung CHIA

Inventor： Chih-Yung CHIA

IPC: H05K1/11

CPC classification number: H05K1/02 ,  H05K1/111 ,  H05K3/0061 ,  H05K3/28 ,  H05K2201/0367 ,  H05K2201/09772 ,  H05K2201/09781 ,  H05K2201/2036

Abstract: A printed circuit board includes a board body having a routing-limited area. The routing-limited area is provided with at least one solder pad that is adapted for supporting a metal support thereon. Preferably, the printed circuit board further includes a protrusion block disposed on the solder pad, and having a height greater than that of a signal trace that passes the routing-limited area.

Abstract translation: 印刷电路板包括具有路由限制区域的板体。 布线限制区域设置有至少一个适于在其上支撑金属支撑件的焊盘。 优选地，印刷电路板还包括设置在焊盘上的突起块，其高度大于通过布线限制区域的信号迹线的高度。

公开(公告)号：US20110241221A1

公开(公告)日：2011-10-06

申请号：US13159668

申请日：2011-06-14

Applicant: Yoshiharu OGATA

Inventor： Yoshiharu OGATA

IPC: H01L23/48

CPC classification number: H05K3/305 ,  H01L21/563 ,  H01L23/3128 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L25/0657 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/29007 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K1/0271 ,  H05K3/3452 ,  H05K2201/09772 ,  H05K2201/10674 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00011 ,  H01L2924/00014

Abstract: A semiconductor device comprises a wiring substrate including a wiring pattern; a semiconductor chip installed on the wiring substrate, including a plurality of pads formed on a surface of the semiconductor chip, which opposes the wiring substrate; a first resin layer covering over a part of the wiring pattern within a region of overlapping the semiconductor chip; and a second resin layer installed between the semiconductor chip and the first resin layer. The pads are oppose to and coupled with a part of the wiring pattern exposed over the first resin layer; and the linear expansion coefficient of the wiring substrate is larger than that of the semiconductor chip, the elastic modulus of the wiring substrate is lower than that of the semiconductor chip and the linear expansion coefficient of the first resin layer is larger than that of the second resin layer. The elastic modulus of the first resin layer is lower than that of the second resin layer.

Abstract translation: 半导体器件包括：布线基板，其包括布线图案; 安装在所述布线基板上的半导体芯片，包括与所述布线基板相对的形成在所述半导体芯片的表面上的多个焊盘; 覆盖所述布线图案的与所述半导体芯片重叠的区域的一部分上的第一树脂层; 以及安装在半导体芯片和第一树脂层之间的第二树脂层。 焊盘与暴露在第一树脂层上的布线图案的一部分相对并耦合; 并且布线基板的线膨胀系数大于半导体芯片的线膨胀系数，布线基板的弹性模量低于半导体芯片的弹性模量，并且第一树脂层的线膨胀系数大于第二树脂层的线膨胀系数 树脂层。 第一树脂层的弹性模量低于第二树脂层的弹性模量。

公开(公告)号：US20110164391A1

公开(公告)日：2011-07-07

申请号：US12775341

申请日：2010-05-06

Applicant: Yee Na SHIN ,  Tae Sung JEONG ,  Young Ki LEE ,  Seung Eun LEE

Inventor： Yee Na SHIN ,  Tae Sung JEONG ,  Young Ki LEE ,  Seung Eun LEE

IPC: H05K1/18 ,  H05K3/00

CPC classification number: H05K3/445 ,  H01L23/13 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/24227 ,  H01L2224/73267 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/3011 ,  H01L2924/3511 ,  H05K1/185 ,  H05K3/4641 ,  H05K2201/09745 ,  H05K2201/09772 ,  H05K2201/10674 ,  H05K2203/0191 ,  H05K2203/0315 ,  H01L2924/00

Abstract: Disclosed herein is an electronic component-embedded printed circuit board, including: a metal substrate including an anodic oxide film formed over the entire surface thereof; two electronic components disposed in a cavity formed in the metal substrate in two stages; an insulation layer formed on both sides of the metal substrate to bury the electronic components disposed in the cavity; and circuit layers including vias connected with connecting terminals of the electronic components and formed on the exposed surfaces of the insulation layer. The electronic component-embedded printed circuit board is advantageous in that its radiation performance of radiating the heat generated from an electronic component can be improved, and its production cost can be reduced, because a metal substrate is used instead of a conventional insulating material.

Abstract translation: 这里公开了一种电子部件嵌入式印刷电路板，包括：金属基板，包括在其整个表面上形成的阳极氧化膜; 设置在形成在金属基板中的空腔中的两个电子部件分两级; 形成在所述金属基板的两侧的绝缘层，以埋置设置在所述空腔中的电子部件; 以及电路层，包括与电子部件的连接端子连接并形成在绝缘层的暴露表面上的通孔。 电子元件嵌入式印刷电路板的优点在于，由于使用金属基板代替传统的绝缘材料，因此可以提高其辐射电子元件产生的热量的辐射性能，并且可以降低其制造成本。

公开(公告)号：US07679168B2

公开(公告)日：2010-03-16

申请号：US11309266

申请日：2006-07-21

Applicant: Sheng-Yun Shu

Inventor： Sheng-Yun Shu

IPC: H01L23/58 ,  H01L23/62

CPC classification number: H01L23/50 ,  H01L23/49838 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0245 ,  H05K1/114 ,  H05K2201/09236 ,  H05K2201/09772 ,  H05K2201/10689 ,  H01L2924/00

Abstract: A printed circuit board (PCB) with a differential pair arrangement includes a mounting area for receiving a chip, a plurality of first pads located near one edge of the mounting area, a plurality of second pads located near an opposite edge of the mounting area, the first pads and the second pads are arranged for receiving pins of the chip. A pair of vias is used for connecting layers of the PCB. The second pads are located between the vias and the mounting area. A differential pair includes two signal traces, one of the signal traces is connected to one of the first pads and routed to one of the vias through the mounting area, the other of the signal traces is routed through the mounting area and connected to one of the second pads and then routed to the other one of the vias.

Abstract translation: 具有差分对布置的印刷电路板（PCB）包括用于接收芯片的安装区域，位于安装区域的一个边缘附近的多个第一焊盘，位于安装区域的相对边缘附近的多个第二焊盘， 第一焊盘和第二焊盘被布置成用于接收芯片的引脚。 一对通孔用于连接PCB的层。 第二焊盘位于通孔和安装区域之间。 差分对包括两个信号迹线，其中一个信号迹线连接到第一个焊盘中的一个，并通过安装区域路由到通孔中的一个，另一条信号迹线通过安装区域连接到 第二个垫，然后路由到另一个通孔。