公开(公告)号：US20080036094A1

公开(公告)日：2008-02-14

申请号：US11896580

申请日：2007-09-04

Applicant: Yoshihiro Yoneda

Inventor： Yoshihiro Yoneda

IPC: H01L23/48

CPC classification number: H01L21/563 ,  H01L23/10 ,  H01L23/13 ,  H01L23/564 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73265 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/1461 ,  H01L2924/15151 ,  H01L2924/16152 ,  H01L2924/16195 ,  H03H9/0585 ,  H03H9/059 ,  H03H9/1057 ,  H05K3/303 ,  H05K3/341 ,  H05K3/3436 ,  H05K2201/09072 ,  H05K2201/09572 ,  H05K2201/10674 ,  H05K2203/1147 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: This disclosure provides a technique that prevents debonding at an interface between a functional device and a resin on reflow soldering in a functional device-mounted module requiring a hollow structure. Also disclosed is a functional device having a functional portion mounted on a substrate formed with predetermined wiring patterns, wherein the functional portion of the functional device is arranged in a receiving space, and the substrate is provided with a hole which communicates with the receiving space and a solder-introducing portion made of a metallic material compatible with solder. During solder reflowing, the functional device-mounted module is placed on a mounting substrate such that the solder-introducing portion of the functional device-mounted module contacts a solder paste, and solder is melted with heat. Water inside the receiving space is thus discharged, and solder is introduced into the hole due to surface tension, and the interior of the receiving space is sealed.

Abstract translation: 本公开提供了一种在需要中空结构的功能装置安装的模块中防止回流焊上的功能元件与树脂之间的界面脱粘的技术。 还公开了具有安装在形成有预定布线图案的基板上的功能部分的功能装置，其中功能装置的功能部分布置在接收空间中，并且基板设置有与接收空间连通的孔， 由与焊料相容的金属材料制成的焊料引入部。 在焊锡回流期间，功能元件安装模块被放置在安装基板上，使得功能元件安装模块的焊料引入部分接触焊膏，并且焊料被热熔化。 接收空间内的水因此被排出，并且由于表面张力将焊料引入孔中，并且容纳空间的内部被密封。

公开(公告)号：US07291901B2

公开(公告)日：2007-11-06

申请号：US10803879

申请日：2004-03-19

Applicant: Masateru Koide ,  Misao Umematsu ,  Takashi Kanda ,  Yasuhiro Usui ,  Kenji Fukuzono

Inventor： Masateru Koide ,  Misao Umematsu ,  Takashi Kanda ,  Yasuhiro Usui ,  Kenji Fukuzono

IPC: H01L23/02 ,  H01L23/48

CPC classification number: H01L23/642 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/4006 ,  H01L23/49833 ,  H01L23/50 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/15311 ,  H01L2924/19106 ,  H01L2924/3511 ,  H05K1/0231 ,  H05K1/141 ,  H05K1/182 ,  H05K3/3436 ,  H05K2201/049 ,  H05K2201/09072 ,  H05K2201/1053 ,  H05K2201/10734 ,  H05K2201/10977 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A packaging method, a packaging structure and a package is substrate capable of restraining a warp of a thin film substrate, increasing a product yield, and building up a sufficient cooling capacity in the case of mounting an LSI having a high exothermic quantity. A package substrate 1 of the invention is such that an opening 11 is formed in a first substrate 12, a thin film substrate (a second substrate) 13 is laminated on the first substrate 12, the opening 11 is covered with the thin film substrate 13. Next, a capacitor (a first electronic part) 14 is inserted into the opening 11 and bonded to the thin film substrate, a resin 15 fills an interior of the opening 11 to a fixed or larger thickness and is hardened, the thin film substrate 13 and the capacitor 14 are thereby sustained by the resin 15, an LSI 16 (a second electronic part) that should be connected to the capacitor 14 is bonded to a surface, on an exposed side, of the thin film substrate 13, and the capacitor 14 is connected to the LSI 16.

Abstract translation: 包装方法，包装结构和包装是能够抑制薄膜基板翘曲的基板，提高产品收率，并且在安装具有高放热量的LSI的情况下建立足够的冷却能力的基板。 本发明的封装基板1使得在第一基板12中形成开口11，在第一基板12上层叠薄膜基板（第二基板）13，开口11被薄膜基板13覆盖 。 接下来，将电容器（第一电子部件）14插入到开口11中并且结合到薄膜基板上，树脂15将开口11的内部填充到固定或更大的厚度并被硬化，薄膜基板13 并且电容器14由树脂15维持，应该连接到电容器14的LSI 16（第二电子部件）被接合到薄膜基板13的暴露侧的表面上，并且电容器 14连接到LSI 16。

公开(公告)号：US07269032B2

公开(公告)日：2007-09-11

申请号：US10535212

申请日：2004-07-02

Applicant: Matthias Lungwitz

Inventor： Matthias Lungwitz

IPC: H05K9/00

CPC classification number: H05K1/141 ,  H05K1/0218 ,  H05K1/182 ,  H05K3/3436 ,  H05K2201/0715 ,  H05K2201/09036 ,  H05K2201/09072 ,  H05K2201/09618 ,  H05K2201/10477

Abstract: A shielding apparatus for EMI-sensitive electronic components, especially for radio transmitting devices and/or radio receiving devices of telecommunication terminals for contactless telecommunication, such as cordless telephones and mobile telephones and similar, which can be constructed without using expensive manufacturing and assembly steps without any extra space requirement. The EMI-sensitive electronic components and/or circuits are arranged on a separate, at least double-layered printed circuit board and are embodied as a printed circuit board module. Said circuit board and another separate, at least two-layered circuit board which includes a recess for the EMI-sensitive electronic components and/or circuits and which is embodied in the form of a base printed circuit board, are joined together by soldering, preferably in the region of contact areas, to form a unit such that a cage is formed by the recess which is disposed between two metal surfaces being respectively connected to the shielding surfaces by means of continuous, highly adjacent contacts. The cage shields the EMI-sensitive electronic components and/or circuits on all sides.

Abstract translation: 一种用于EMI敏感电子部件的屏蔽装置，特别是用于无线电通信的电信终端（例如无绳电话和移动电话等）的无线电发射装置和/或无线电接收装置，其可以在不使用昂贵的制造和组装步骤的情况下构建而不需要 任何额外的空间要求。 EMI敏感的电子部件和/或电路被布置在单独的至少双层印刷电路板上并被实施为印刷电路板模块。 所述电路板和另外分开的至少两层电路板，其包括用于EMI敏感的电子部件和/或电路的凹部，并且以基本印刷电路板的形式实施，通过焊接连接在一起，优选地 在接触区域的区域中，形成一个单元，使得保持架由设置在两个金属表面之间的凹部形成，两个金属表面之间通过连续的，高度相邻的触点分别连接到屏蔽表面。 笼子屏蔽了EMI敏感的电子元件和/或电路在所有方面。

公开(公告)号：US07268002B2

公开(公告)日：2007-09-11

申请号：US11265107

申请日：2005-11-03

Applicant: Masateru Koide ,  Misao Umematsu ,  Takashi Kanda ,  Yasuhiro Usui ,  Kenji Fukuzono

Inventor： Masateru Koide ,  Misao Umematsu ,  Takashi Kanda ,  Yasuhiro Usui ,  Kenji Fukuzono

IPC: H01L21/66 ,  H01L21/44

CPC classification number: H01L23/642 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/4006 ,  H01L23/49833 ,  H01L23/50 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/15311 ,  H01L2924/19106 ,  H01L2924/3511 ,  H05K1/0231 ,  H05K1/141 ,  H05K1/182 ,  H05K3/3436 ,  H05K2201/049 ,  H05K2201/09072 ,  H05K2201/1053 ,  H05K2201/10734 ,  H05K2201/10977 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A packaging method, a packaging structure and a package is substrate capable of restraining a warp of a thin film substrate, increasing a product yield, and building up a sufficient cooling capacity in the case of mounting an LSI having a high exothermic quantity. A package substrate 1 of the invention is such that an opening 11 is formed in a first substrate 12, a thin film substrate (a second substrate) 13 is laminated on the first substrate 12, the opening 11 is covered with the thin film substrate 13. Next, a capacitor (a first electronic part) 14 is inserted into the opening 11 and bonded to the thin film substrate, a resin 15 fills an interior of the opening 11 to a fixed or larger thickness and is hardened, the thin film substrate 13 and the capacitor 14 are thereby sustained by the resin 15, an LSI 16 (a second electronic part) that should be connected to the capacitor 14 is bonded to a surface, on an exposed side, of the thin film substrate 13, and the capacitor 14 is connected to the LSI 16.

公开(公告)号：US07219843B2

公开(公告)日：2007-05-22

申请号：US10453796

申请日：2003-06-03

Applicant: William H. Havens ,  Charles P. Barber ,  Colleen Gannon ,  Robert C. Gardiner ,  Robert J. Hennick ,  John A. Pettinelli

Inventor： William H. Havens ,  Charles P. Barber ,  Colleen Gannon ,  Robert C. Gardiner ,  Robert J. Hennick ,  John A. Pettinelli

IPC: G06K7/10

CPC classification number: G06K7/10881 ,  G06K7/10574 ,  G06K7/10584 ,  G06K7/10722 ,  G06K7/10801 ,  G06K7/10861 ,  G06K7/1098 ,  G06K7/14 ,  G06K7/1417 ,  H05K1/18 ,  H05K3/244 ,  H05K2201/09072 ,  H05K2201/09463 ,  H05K2201/0949 ,  H05K2201/09645 ,  H05K2201/09809 ,  H05K2201/10121

Abstract: The invention is an optical reader having a plurality of image sensors. Each image sensor of a plural image sensor optical reader can be disposed on an imaging module that can include a light source. In one embodiment, a frame of image data captured via actuation of an image sensor of a first imaging module and actuation of illumination of a second imaging module is subjected to decoding. The various modules of a multiple imaging module reader can be adapted to have different best focus positions so that a field depth of the reader is improved.

Abstract translation: 本发明是具有多个图像传感器的光学读取器。 可以将多个图像传感器光学读取器的每个图像传感器设置在可以包括光源的成像模块上。 在一个实施例中，经由第一成像模块的图像传感器的致动和第二成像模块的照明的致动所捕获的图像数据的帧被进行解码。 多成像模块读取器的各种模块可以适于具有不同的最佳焦点位置，从而改善读取器的场深。

公开(公告)号：US07217994B2

公开(公告)日：2007-05-15

申请号：US11002480

申请日：2004-12-01

Applicant: Sherry Xiaoqi Zhu ,  Cam T. Nguyen

Inventor： Sherry Xiaoqi Zhu ,  Cam T. Nguyen

IPC: H01L23/02

CPC classification number: H05K1/141 ,  H01L23/5385 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/1515 ,  H01L2924/15159 ,  H01L2924/15192 ,  H05K1/0284 ,  H05K1/182 ,  H05K3/3436 ,  H05K2201/09072 ,  H05K2201/10378 ,  H05K2201/10515 ,  H05K2201/10674 ,  H05K2201/10734 ,  H05K2203/1572 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A stack package for a high density memory module includes at least one memory chip, an ASIC and an interposer, wherein the interposer comprises a first surface having contacts arranged in electrical communication with corresponding contacts on the ASIC and a second, substantially opposite surface including contacts arranged in electrical communication with corresponding contacts on a PCB. The at least one memory chip is dimensioned to fit within a cutout section in the interposer.

Abstract translation: 用于高密度存储器模块的堆叠封装包括至少一个存储器芯片，ASIC和插入器，其中所述插入器包括第一表面，所述第一表面具有布置成与所述ASIC上的对应触点电连通的触点和包括触点的第二基本上相对的表面 布置成与PCB上的相应触点电连通。 所述至少一个存储器芯片的尺寸被设计成装配在所述插入器中的切口部分内。

公开(公告)号：US20060231947A1

公开(公告)日：2006-10-19

申请号：US11105113

申请日：2005-04-13

Applicant: Eiichi Hosomi ,  Paul Harvey

Inventor： Eiichi Hosomi ,  Paul Harvey

IPC: H01L23/34

CPC classification number: H01L23/50 ,  H01L23/13 ,  H01L23/49838 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/19106 ,  H01L2924/3511 ,  H05K1/0231 ,  H05K1/182 ,  H05K2201/09072 ,  H05K2201/1053 ,  H05K2201/10734 ,  H01L2924/00

Abstract: Systems and methods for reducing switching noise in an integrated circuit. In one embodiment, decoupling capacitors are connected to the integrated circuit from the underside of the substrate on which the integrated circuit die is manufactured. The decoupling capacitors are positioned with a higher concentration in the “hot spot” areas of the integrated circuit instead of being evenly distributed. In one embodiment, the decoupling capacitors and the corresponding hole(s) in a circuit board on which the integrated circuit is mounted are positioned so that the circuit board provides support for the central portion of the integrated circuit and thereby prevents the integrated circuit from flexing away from the heat sink/spreader. In one embodiment, the concentration of vias connecting the different ground planes and/or power planes within the integrated circuit is higher in hot spots than in other areas.

公开(公告)号：US20060113653A1

公开(公告)日：2006-06-01

申请号：US11002480

申请日：2004-12-01

Applicant: Sherry Xiaoqi ,  Cam Nguyen

Inventor： Sherry Xiaoqi ,  Cam Nguyen

IPC: H01L23/02

CPC classification number: H05K1/141 ,  H01L23/5385 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/1515 ,  H01L2924/15159 ,  H01L2924/15192 ,  H05K1/0284 ,  H05K1/182 ,  H05K3/3436 ,  H05K2201/09072 ,  H05K2201/10378 ,  H05K2201/10515 ,  H05K2201/10674 ,  H05K2201/10734 ,  H05K2203/1572 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A stack package for a high density memory module includes at least one memory chip, an ASIC and an interposer, wherein the interposer comprises a first surface having contacts arranged in electrical communication with corresponding contacts on the ASIC and a second, substantially opposite surface including contacts arranged in electrical communication with corresponding contacts on a PCB. The at least one memory chip is dimensioned to fit within a cutout section in the interposer.

Abstract translation: 用于高密度存储器模块的堆叠封装包括至少一个存储器芯片，ASIC和插入器，其中所述插入器包括第一表面，所述第一表面具有布置成与所述ASIC上的对应触点电连通的触点和包括触点的第二基本上相对的表面 布置成与PCB上的相应触点电连通。 所述至少一个存储器芯片的尺寸被设计成装配在所述插入器中的切口部分内。

公开(公告)号：US20060033199A1

公开(公告)日：2006-02-16

申请号：US11195818

申请日：2005-08-03

Applicant: Yoshiteru Kawakami ,  Yasuharu Nakamura

Inventor： Yoshiteru Kawakami ,  Yasuharu Nakamura

IPC: H01L23/12

CPC classification number: H05K1/144 ,  H01L23/3677 ,  H01L23/42 ,  H01L23/467 ,  H01L23/49833 ,  H01L23/5385 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2225/1005 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/16195 ,  H01L2924/19105 ,  H05K1/0206 ,  H05K1/0272 ,  H05K1/186 ,  H05K3/284 ,  H05K3/4614 ,  H05K3/4697 ,  H05K2201/064 ,  H05K2201/09072 ,  H05K2201/10378 ,  H05K2203/063 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: An electronic circuit device includes at least a first substrate and a second substrate, a spacer substrate interposed between the first substrate and the second substrate, an electronic component interposed between the first substrate and the second substrate, and at least one through-hole formed on the second circuit substrate opposing the first circuit substrate. The spacer substrate mutually connects the first substrate and the second substrate. The electronic component is connected to the first circuit substrate with the active surface of the electronic component. The through-hole penetrates from a first surface of the second circuit substrate opposing the first substrate to a second surface of the second circuit substrate. The first circuit substrate is connected to the electronic component.

Abstract translation: 电子电路装置至少包括第一基板和第二基板，插入在第一基板和第二基板之间的间隔基板，插入在第一基板和第二基板之间的电子部件，以及至少一个通孔，其形成在 所述第二电路基板与所述第一电路基板相对。 间隔基板相互连接第一基板和第二基板。 电子部件与电子部件的有源面连接到第一电路基板。 通孔从与第一基板相对的第二电路基板的第一表面穿透到第二电路基板的第二表面。 第一电路基板连接到电子部件。

公开(公告)号：US20060018104A1

公开(公告)日：2006-01-26

申请号：US11080672

申请日：2005-03-16

Applicant: Hiroki Katayama ,  Yoshiaki Ishigami

Inventor： Hiroki Katayama ,  Yoshiaki Ishigami

IPC: H05K7/06

CPC classification number: H05K3/3442 ,  H05K1/0239 ,  H05K1/025 ,  H05K1/0253 ,  H05K1/181 ,  H05K2201/0792 ,  H05K2201/09072 ,  H05K2201/093 ,  H05K2201/0969 ,  H05K2201/10022 ,  H05K2201/1003 ,  H05K2201/10121 ,  H05K2201/10484 ,  H05K2201/10515 ,  H05K2201/1053 ,  H05K2201/10636 ,  H05K2201/10984 ,  H05K2201/2036 ,  Y02P70/611 ,  Y02P70/613

Abstract: An electronic component mounted structure has: a circuit board; two semiconductor elements that are mounted on the circuit board; and an AC coupling capacitor that is operable to cut off signals with a predetermined frequency or less and is provided between the two semiconductor elements. The AC coupling capacitor is mounted on the circuit board such that a part or a whole of the AC coupling capacitor is away from the surface of the circuit board.

Abstract translation: 电子部件安装结构具有：电路板; 安装在电路板上的两个半导体元件; 以及AC耦合电容器，其可操作以以预定频率或更小的频率切断信号，并且设置在两个半导体元件之间。 AC耦合电容器安装在电路板上，使得AC耦合电容器的一部分或全部远离电路板的表面。