公开(公告)号：US08385082B2

公开(公告)日：2013-02-26

申请号：US12849820

申请日：2010-08-04

Applicant: Yen-Chih Chang ,  Ke-Hao Chen

Inventor： Yen-Chih Chang ,  Ke-Hao Chen

IPC: H05K1/11 ,  H05K1/14

CPC classification number: H05K7/1069 ,  H01R12/7082 ,  H01R12/714 ,  H05K3/308 ,  H05K2201/10393 ,  H05K2201/1059 ,  H05K2201/10704

Abstract: An electrical connection arrangement includes an IC package, and a PCB having a plurality of receiving holes for receiving a plurality of contacts therein. The contact having a contacting portion engaged with the IC package that seated upon the PCB. A retaining device is provided for securing the IC package onto the PCB. Since there is no socket utilized in the present invention, the total profile of the arrangement and the cost are effectively reduced.

Abstract translation: 电连接装置包括IC封装和具有用于在其中接收多个触点的多个接收孔的PCB。 接触件具有与安装在PCB上的IC封装相接合的接触部分。 提供保持装置用于将IC封装固定到PCB上。 由于在本发明中没有使用插座，所以可以有效地减少布置的总体轮廓和成本。

公开(公告)号：US08159064B2

公开(公告)日：2012-04-17

申请号：US12926626

申请日：2010-11-30

Applicant: Heung Jae Oh ,  Jin Won Choi ,  Ki Taek Lee

Inventor： Heung Jae Oh ,  Jin Won Choi ,  Ki Taek Lee

IPC: H01L23/48

CPC classification number: H05K3/4015 ,  H01L2924/15312 ,  H05K3/3426 ,  H05K2201/10318 ,  H05K2201/10704

Abstract: Disclosed herein is a lead pin for a package substrate. The lead pin for the package substrate according to the exemplary embodiment of the present invention includes a head part having one surface opposite to the package substrate and the other surface that is an opposite side to the one surface; and a connection pin having a pin shape bonded to the other surface of the head part, wherein the head part has a concave depression part toward the package substrate.

Abstract translation: 这里公开了一种用于封装衬底的引脚。 根据本发明的示例性实施例的封装基板的引脚包括具有与封装基板相对的一个表面和与该表面相对的另一个表面的头部; 以及具有与所述头部的另一个表面接合的销形状的连接销，其中，所述头部具有朝向所述封装基板的凹陷部。

公开(公告)号：US07901995B2

公开(公告)日：2011-03-08

申请号：US11689558

申请日：2007-03-22

Applicant: Gabe Cherian

Inventor： Gabe Cherian

IPC: H01L21/60

CPC classification number: H05K3/3426 ,  H01L21/4853 ,  H01L21/6835 ,  H01L23/49555 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/72 ,  H01L24/73 ,  H01L24/742 ,  H01L24/85 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/1012 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/11822 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13124 ,  H01L2224/13147 ,  H01L2224/13184 ,  H01L2224/13582 ,  H01L2224/136 ,  H01L2224/13655 ,  H01L2224/1403 ,  H01L2224/16 ,  H01L2224/1601 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/4556 ,  H01L2224/45599 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73203 ,  H01L2224/73251 ,  H01L2224/73257 ,  H01L2224/81903 ,  H01L2224/85 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01043 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15331 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3025 ,  H01L2924/3511 ,  H05K3/308 ,  H05K2201/09418 ,  H05K2201/10318 ,  H05K2201/10424 ,  H05K2201/10689 ,  H05K2201/10704 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2201/10825 ,  H05K2201/10871 ,  H05K2201/10946 ,  H05K2201/10977 ,  H05K2203/0769 ,  Y02P70/613 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/72

Abstract: The present invention relates generally to permanent interconnections between electronic devices, such as integrated circuit packages, chips, wafers and printed circuit boards or substrates, or similar electronic devices. More particularly it relates to high-density electronic devices.The invention describes means and methods that can be used to counteract the undesirable effects of thermal cycling, shock and vibrations and severe environment conditions in general.For leaded devices, the leads are oriented to face the thermal center of the devices and the system they interact with.For leadless devices, the mounting elements are treated or prepared to control the migration of solder along the length of the elements, to ensure that those elements retain their desired flexibility.

Abstract translation: 本发明一般涉及电子设备之间的永久互连，例如集成电路封装，芯片，晶片和印刷电路板或基板或类似的电子设备。 更具体地说，涉及高密度电子设备。 本发明描述了可用于抵消热循环，冲击和振动以及恶劣环境条件的不良影响的手段和方法。 对于有铅器件，引线面向设备的热中心及其与之相互作用的系统。 对于无引线器件，安装元件被处理或准备好以控制沿着元件长度的焊料的迁移，以确保这些元件保持其期望的柔性。

公开(公告)号：US20110019386A1

公开(公告)日：2011-01-27

申请号：US12882322

申请日：2010-09-15

Applicant: Henning Braunisch ,  Kemal Aygun

Inventor： Henning Braunisch ,  Kemal Aygun

IPC: H05K7/00

CPC classification number: H05K1/0243 ,  H01L23/367 ,  H01L23/66 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/16 ,  H01L2223/6622 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2225/06517 ,  H01L2225/06589 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/14 ,  H05K1/182 ,  H05K3/222 ,  H05K2201/10356 ,  H05K2201/10492 ,  H05K2201/10704 ,  Y10T29/49002 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A multimode system with at least two end points may include a multimode signaling path that, in some embodiments, is a multimode cable or a multimode board and is pluggably connectable to packages at each end point. Each end point may include a processor die package coupled to a socket. The socket may also receive a connector that couples the cable to the package. Power supply signals and input/output signals may be decoupled at each end point.

公开(公告)号：US07816779B2

公开(公告)日：2010-10-19

申请号：US12217294

申请日：2008-07-02

Applicant: Henning Braunisch ,  Kemal Aygun

Inventor： Henning Braunisch ,  Kemal Aygun

IPC: H01L23/52

CPC classification number: H05K1/0243 ,  H01L23/367 ,  H01L23/66 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/16 ,  H01L2223/6622 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2225/06517 ,  H01L2225/06589 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/14 ,  H05K1/182 ,  H05K3/222 ,  H05K2201/10356 ,  H05K2201/10492 ,  H05K2201/10704 ,  Y10T29/49002 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A multimode system with at least two end points may include a multimode signaling path that, in some embodiments, is a multimode cable or a multimode board and is pluggably connectable to packages at each end point. Each end point may include a processor die package coupled to a socket. The socket may also receive a connector that couples the cable to the package. Power supply signals and input/output signals may be decoupled at each end point.

Abstract translation: 具有至少两个端点的多模系统可以包括在一些实施例中是多模电缆或多模板并且可插​​拔地连接到每个端点处的封装的多模信令路径。 每个端点可以包括耦合到插座的处理器管芯封装。 插座还可以接收将电缆耦合到封装的连接器。 电源信号和输入/输出信号可以在每个端点解耦。

公开(公告)号：US20100236815A1

公开(公告)日：2010-09-23

申请号：US12727146

申请日：2010-03-18

Applicant: Jack Seidler

Inventor： Jack Seidler

IPC: H01B5/00 ,  H05K3/00

CPC classification number: H05K3/00 ,  B23K35/0244 ,  H01R12/57 ,  H01R12/707 ,  H01R43/0235 ,  H05K3/3426 ,  H05K3/3478 ,  H05K3/3489 ,  H05K2201/0311 ,  H05K2201/10704 ,  H05K2201/10795 ,  H05K2201/1084 ,  H05K2201/10924 ,  H05K2201/10984 ,  H05K2203/0405 ,  H05K2203/0415 ,  Y02P70/613 ,  Y10T29/49147

Abstract: A method of fixing reflowable elements on electrical contacts. The method includes providing a strip having a number of electrical contacts, each contact including a contact body and a tail portion extending away from the contact body. The tail portions of the contacts are then disposed adjacent an elongate reflowable member. The elongate reflowable member is pushed onto the tail portions of the plurality of contacts. Subsequently, the elongate reflowable member is cut into a plurality of separate reflowable elements, each reflowable element corresponding to one of the tail portions. The electrical contacts with the reflowable element attached thereto are separated from the strip.

Abstract translation: 将可回流元件固定在电触点上的方法。 该方法包括提供具有多个电触点的条带，每个触点包括接触体和远离接触体延伸的尾部。 然后将触头的尾部设置在细长的可回流构件附近。 细长可回流构件被推到多个触点的尾部。 随后，细长可回流构件被切割成多个单独的可回流元件，每个可回流元件对应于尾部中的一个。 与附接到其上的可回流元件的电接触与条分离。

公开(公告)号：US20100136745A1

公开(公告)日：2010-06-03

申请号：US12698352

申请日：2010-02-02

Applicant: Sung-Wook Hwang

Inventor： Sung-Wook Hwang

IPC: H01L21/60 ,  H01L21/50

CPC classification number: H05K1/181 ,  H01L23/49811 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3511 ,  H05K3/3421 ,  H05K3/3447 ,  H05K2201/10515 ,  H05K2201/10689 ,  H05K2201/10704 ,  H05K2201/10734 ,  H05K2201/10946 ,  Y02P70/611 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of fabricating a package-on-package (POP) package is disclosed. The method includes preparing a first semiconductor package including a first substrate having external contact electrodes and a first semiconductor chip mounted on the first substrate, and preparing a second semiconductor package including a second substrate having external contact electrodes and a second semiconductor chip mounted on the second substrate. The method further includes forming lead lines in the second semiconductor package, the lead lines being electrically connected to the external contact electrodes of the second substrate, and stacking the second semiconductor package on the first semiconductor package and electrically connecting the external contact electrodes of the first substrate to the external contact electrodes of the second substrate using the lead lines.

Abstract translation: 公开了一种制造封装封装（POP）封装的方法。 该方法包括制备包括具有外部接触电极的第一基板和安装在第一基板上的第一半导体芯片的第一半导体封装，以及制备包括具有外部接触电极的第二基板和安装在第二基板上的第二半导体芯片的第二半导体封装 基质。 该方法还包括在第二半导体封装中形成引线，引线与第二衬底的外部接触电极电连接，并将第二半导体封装堆叠在第一半导体封装上，并电连接第一半导体封装的外部接触电极 使用引线将衬底施加到第二衬底的外部接触电极。

公开(公告)号：US07723834B2

公开(公告)日：2010-05-25

申请号：US11851284

申请日：2007-09-06

Applicant: Sung-Wook Hwang

Inventor： Sung-Wook Hwang

IPC: H01L23/495

CPC classification number: H05K1/181 ,  H01L23/49811 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3511 ,  H05K3/3421 ,  H05K3/3447 ,  H05K2201/10515 ,  H05K2201/10689 ,  H05K2201/10704 ,  H05K2201/10734 ,  H05K2201/10946 ,  Y02P70/611 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A package-on-package (POP) package in which semiconductor packages are stacked using lead lines rather than conventional solder balls, and a fabricating method thereof are provided. According to the POP package and the fabricating method thereof of the present invention, the POP package is prevented from being short-circuited even when an underlying semiconductor package gets thicker and the POP package can sufficiently withstand deformation caused by post-fabrication warpage.

Abstract translation: 一种封装封装（POP）封装，其中使用引线而不是常规焊球堆叠半导体封装，并提供其制造方法。 根据本发明的POP封装及其制造方法，即使下面的半导体封装变厚并且POP封装能够充分地承受由后制造翘曲引起的变形，也可以防止POP封装短路。

公开(公告)号：US20100002398A1

公开(公告)日：2010-01-07

申请号：US12217294

申请日：2008-07-02

Applicant: Henning Braunisch ,  Kemal Aygun

Inventor： Henning Braunisch ,  Kemal Aygun

IPC: H05K7/20 ,  H05K1/18

CPC classification number: H05K1/0243 ,  H01L23/367 ,  H01L23/66 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/16 ,  H01L2223/6622 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2225/06517 ,  H01L2225/06589 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/14 ,  H05K1/182 ,  H05K3/222 ,  H05K2201/10356 ,  H05K2201/10492 ,  H05K2201/10704 ,  Y10T29/49002 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A multimode system with at least two end points may include a multimode signaling path that, in some embodiments, is a multimode cable or a multimode board and is pluggably connectable to packages at each end point. Each end point may include a processor die package coupled to a socket. The socket may also receive a connector that couples the cable to the package. Power supply signals and input/output signals may be decoupled at each end point.

公开(公告)号：US20090032915A1

公开(公告)日：2009-02-05

申请号：US12154753

申请日：2008-05-27

Applicant: Gabe Cherian ,  Don Saunders

Inventor： Gabe Cherian ,  Don Saunders

IPC: H01L21/60 ,  H01L23/495

CPC classification number: H05K3/3426 ,  H01L21/4853 ,  H01L21/6835 ,  H01L23/49555 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/72 ,  H01L24/73 ,  H01L24/742 ,  H01L24/85 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/1012 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/11822 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13124 ,  H01L2224/13147 ,  H01L2224/13184 ,  H01L2224/13582 ,  H01L2224/136 ,  H01L2224/13655 ,  H01L2224/1403 ,  H01L2224/16 ,  H01L2224/1601 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/4556 ,  H01L2224/45599 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73203 ,  H01L2224/73251 ,  H01L2224/73257 ,  H01L2224/81903 ,  H01L2224/85 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01043 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15331 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3025 ,  H01L2924/3511 ,  H05K3/308 ,  H05K2201/09418 ,  H05K2201/10318 ,  H05K2201/10424 ,  H05K2201/10689 ,  H05K2201/10704 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2201/10825 ,  H05K2201/10871 ,  H05K2201/10946 ,  H05K2201/10977 ,  H05K2203/0769 ,  Y02P70/613 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/72

Abstract: Two groups of interconnection devices and methods are described. Both provide columns between electronic packages and boards or between chips and substrates or the like. In the first group, called Thermal Flex Contact Carrier (TFCC), the column elements are carved out of a flat laminated structure and then formed to suit. In the second group, the carrier, which carries the connecting elements, is made out of a soluble or removable material, which acts at the same time, as a solder mask, to prevent the solder from wicking along the stem of the elements.

Abstract translation: 描述了两组互连设备和方法。 两者都在电子封装和电路板之间或芯片和衬底之间提供列等。 在第一组中，称为热挠性接触载体（TFCC），将柱元素从平面层压结构中雕刻出来，然后形成。 在第二组中，承载连接元件的载体由可溶或可移除的材料制成，其作为焊接掩模同时作用，以防止焊料沿着元件的芯部芯吸。