公开(公告)号：US20080247572A1

公开(公告)日：2008-10-09

申请号：US12065933

申请日：2006-08-24

Applicant: Geert Langereis ,  Johannes Wilhelmus Weekamp ,  Jacobus Bernardus Giesbers

Inventor： Geert Langereis ,  Johannes Wilhelmus Weekamp ,  Jacobus Bernardus Giesbers

IPC: H04R25/00

CPC classification number: F04B43/043 ,  B01L3/502707 ,  B01L3/502738 ,  B01L2200/10 ,  B01L2200/12 ,  B01L2300/0627 ,  B01L2300/0819 ,  B01L2300/0887 ,  B01L2300/123 ,  B01L2300/1827 ,  B01L2400/0638 ,  B81B2201/0257 ,  B81C1/00119 ,  B81C1/00182 ,  B81C99/0095 ,  B81C2201/019 ,  F16K99/0001 ,  F16K99/0007 ,  F16K99/0015 ,  F16K99/0034 ,  F16K99/0051 ,  F16K2099/008 ,  F16K2099/0084 ,  H04R19/04 ,  H04R31/00 ,  Y10T428/24851

Abstract: The invention relates to a method of manufacturing a MEMS capacitor microphone and further to such MEMS capacitor microphone. With the method a MEMS capacitor microphone can be manufactured by stacking pre-processed foils (10) having a conductive layer (11a,11b) on at least one side. After stacking, the foils (10) are sealed, using pressure and heat. Finally the MEMS capacitor microphones are separated from the stack (S). The pre-processing of the foils (preferably done by means of a laser beam) comprises a selection of the following steps: (A) leaving the foil intact, (B) locally removing the conductive layer, (C) removing the conductive layer and partially evaporating the foil (10), and (D) removing both the conductive layer as well as foil (10), thus making holes in the foil (10). In combination with said stacking, it is possible to create cavities and membranes. This opens up the possibility of manufacturing MEMS capacitor microphone.

Abstract translation: 本发明涉及一种制造MEMS电容麦克风的方法，并且还涉及这种MEMS电容麦克风。 利用该方法，MEMS电容式麦克风可以通过在至少一侧上堆叠具有导电层（11a，11b）的预处理箔（10）来制造。 堆叠后，使用压力和热量将箔（10）密封。 最后，MEMS电容麦克风与堆叠（S）分离。 箔的预处理（优选通过激光束进行）包括以下步骤的选择：（A）完全保留箔，（B）局部去除导电层，（C）去除导电层和 部分地蒸发箔（10），以及（D）去除导电层以及箔（10），从而在箔（10）中形成孔。 结合所述堆叠，可以产生空腔和膜。 这开启了制造MEMS电容麦克风的可能性。

公开(公告)号：US07422928B2

公开(公告)日：2008-09-09

申请号：US10572554

申请日：2004-09-12

Applicant: Naomasa Oka ,  Hiroshi Harada ,  Jun Ogihara ,  Hiroshi Fukshima ,  Hiroshi Noge ,  Yuji Suzuki ,  Kiyohiko Kawano ,  Takaaki Yoshihara ,  Masahiko Suzumura

Inventor： Naomasa Oka ,  Hiroshi Harada ,  Jun Ogihara ,  Hiroshi Fukshima ,  Hiroshi Noge ,  Yuji Suzuki ,  Kiyohiko Kawano ,  Takaaki Yoshihara ,  Masahiko Suzumura

IPC: H01L21/00 ,  H02N1/00

CPC classification number: G02B26/0816 ,  B81B3/0086 ,  B81B2201/033 ,  B81B2201/045 ,  B81C1/00484 ,  B81C2201/0109 ,  B81C2201/019 ,  G02B6/3516 ,  G02B6/3518 ,  G02B6/3546 ,  G02B6/355 ,  G02B6/357 ,  G02B6/3584 ,  H02N1/008

Abstract: A process for fabricating a micro-electro-mechanical system (MEMS) composed of fixed components fixedly supported on a lower substrate and movable components movably supported on the lower substrate. The process utilizes an upper substrate separate from the lower substrate. The upper substrate is selectively etched in its top layer to form therein a plurality of posts which project commonly from a bottom layer of the upper substrate. The posts include the fixed components to be fixed to the lower substrate and the movable components which are resiliently supported only to one or more of the fixed components to be movable relative to the fixed components. The lower substrate is formed in its top surface with at least one recess. The upper substrate is then bonded to the top of the lower substrate upside down in such a manner as to place the fixed components directly on the lower substrate and to place the movable components upwardly of the recess. Finally, the bottom layer of the upper substrate is removed to release the movable components from the bottom layer for floating the movable components above the recess and allowing them to move relative to the lower substrate, while keeping the fixed components fixed to the top of the lower substrate.

Abstract translation: 一种用于制造由固定地支撑在下基板上的固定部件和可移动地支撑在下基板上的可移动部件的微机电系统（MEMS）的制造方法。 该方法利用与下基板分开的上基板。 在其顶层中选择性地蚀刻上基板，以在其中形成多个从上基板的底层共同突出的柱。 支柱包括要固定到下基板的固定部件和仅弹性地支撑到一个或多个固定部件以相对于固定部件可移动的可动部件。 下基板在其顶表面上形成有至少一个凹部。 然后将上基板以这样的方式上下连接到下基板的顶部，以将固定部件直接放置在下基板上并将可移动部件放置在凹部的上方。 最后，去除上基板的底层以从底层释放可移动部件，用于使可移动部件浮动在凹部上方并允许​​它们相对于下基板移动，同时保持固定部件固定在 下基板。

公开(公告)号：US07419845B2

公开(公告)日：2008-09-02

申请号：US11188678

申请日：2005-07-25

Applicant: Thomas Rueckes ,  Brent M. Segal ,  Darren K. Brock

Inventor： Thomas Rueckes ,  Brent M. Segal ,  Darren K. Brock

IPC: H01L21/00

CPC classification number: H01L21/76838 ,  B81C1/00142 ,  B81C2201/019 ,  B82Y10/00 ,  G11C13/025 ,  G11C23/00 ,  G11C2213/16 ,  G11C2213/81 ,  H01H1/0094 ,  Y10S977/734

Abstract: Methods of producing an electromechanical circuit element are described. A lower structure having lower support structures and a lower electrically conductive element is provided. A nanotube ribbon (or other electromechanically responsive element) is formed on an upper surface of the lower structure so as to contact the lower support structures. An upper structure is provided over the nanotube ribbon. The upper structure includes upper support structures and an upper electrically conductive element. In some arrangements, the upper and lower electrically conductive elements are in vertical alignment, but in some arrangements they are not.

Abstract translation: 描述制造机电电路元件的方法。 提供具有较低支撑结构和较低导电元件的下部结构。 纳米管带（或其他机电响应元件）形成在下结构的上表面上以便接触下支撑结构。 在纳米管带上提供上部结构。 上部结构包括上部支撑结构和上部导电元件。 在一些布置中，上和下导电元件是垂直对准的，但在某些布置中它们不是。

公开(公告)号：US20080188059A1

公开(公告)日：2008-08-07

申请号：US12033395

申请日：2008-02-19

Applicant: Navid Yazdi

Inventor： Navid Yazdi

IPC: H01L21/52

CPC classification number: G01P15/18 ,  B81B2201/0235 ,  B81C1/00253 ,  B81C2201/019 ,  G01C19/5719 ,  G01P1/023 ,  G01P15/0802 ,  G01P15/125 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/16195 ,  H01L2924/16235 ,  H01L2924/00014

Abstract: A micromachined sensor and a process for fabrication and vertical integration of a sensor and circuitry at wafer-level. The process entails processing a first wafer to incompletely define a sensing structure in a first surface thereof, processing a second wafer to define circuitry on a surface thereof, bonding the first and second wafers together, and then etching the first wafer to complete the sensing structure, including the release of a member relative to the second wafer. The first wafer is preferably a silicon-on-insulator (SOI) wafer, and the sensing structure preferably includes a member containing conductive and insulator layers of the SOI wafer. Sets of capacitively coupled elements are preferably formed from a first of the conductive layers to define a symmetric capacitive full-bridge structure.

Abstract translation: 微机械传感器和晶圆级传感器和电路的制造和垂直集成工艺。 该过程需要处理第一晶片以在其第一表面中不完全地限定感测结构，处理第二晶片以在其表面上限定电路，将第一和第二晶片结合在一起，然后蚀刻第一晶片以完成感测结构 ，包括相对于第二晶片释放元件。 第一晶片优选为绝缘体上硅（SOI）晶片，并且感测结构优选地包括含有SOI晶片的导电层和绝缘体层的构件。 电容耦合元件的组优选地由第一导电层形成以限定对称的电容全桥结构。

公开(公告)号：US07406761B2

公开(公告)日：2008-08-05

申请号：US11084978

申请日：2005-03-21

Applicant: Ijaz H. Jafri ,  Jonathan L. Klein ,  Galen P. Magendanz

Inventor： Ijaz H. Jafri ,  Jonathan L. Klein ,  Galen P. Magendanz

IPC: H05K3/20

CPC classification number: B81C1/00142 ,  B81B2201/0271 ,  B81C2201/019 ,  B81C2203/036 ,  B81C2203/051 ,  H03H3/0072 ,  H03H9/2447 ,  H03H9/462 ,  Y10T29/49005 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49826 ,  Y10T29/49861

Abstract: A method for fabrication of single crystal silicon micromechanical resonators using a two-wafer process, including either a Silicon-on-insulator (SOI) or insulating base and resonator wafers, wherein resonator anchors, a capacitive air gap, isolation trenches, and alignment marks are micromachined in an active layer of the base wafer; the active layer of the resonator wafer is bonded directly to the active layer of the base wafer; the handle and dielectric layers of the resonator wafer are removed; viewing windows are opened in the active layer of the resonator wafer; masking the single crystal silicon semiconductor material active layer of the resonator wafer with photoresist material; a single crystal silicon resonator is machined in the active layer of the resonator wafer using silicon dry etch micromachining technology; and the photoresist material is subsequently dry stripped.

Abstract translation: 一种使用双晶片工艺制造单晶硅微机械谐振器的方法，包括绝缘体上硅（SOI）或绝缘基底和谐振器晶片，其中谐振器锚，电容气隙，隔离沟槽和对准标记 被微加工在基底晶片的有源层中; 谐振器晶片的有源层直接接合到基底晶片的有源层; 去除谐振器晶片的手柄和电介质层; 观察窗在谐振器晶片的有源层中打开; 用光致抗蚀剂材料掩蔽谐振晶片的单晶硅半导体材料有源层; 使用硅干蚀刻微加工技术在谐振器晶片的有源层中加工单晶硅谐振器; 随后将光致抗蚀剂材料干燥剥离。

公开(公告)号：US07399652B2

公开(公告)日：2008-07-15

申请号：US10821263

申请日：2004-04-08

Applicant: Simone Sassolini ,  Mauro Marchi ,  Marco Del Sarto ,  Lorenzo Baldo

Inventor： Simone Sassolini ,  Mauro Marchi ,  Marco Del Sarto ,  Lorenzo Baldo

IPC: H01L21/58

CPC classification number: H01L21/76898 ,  B81B2201/033 ,  B81B2201/045 ,  B81C1/00484 ,  B81C1/00896 ,  B81C2201/019 ,  G02B6/357 ,  G02B6/3584

Abstract: A method for manufacturing a micro-electro-mechanical device, which has supporting parts and operative parts, includes providing a first semiconductor wafer, having a first layer of semiconductor material and a second layer of semiconductor material arranged on top of the first layer, forming first supporting parts and first operative parts of the device in the second layer, forming temporary anchors in the first layer, and bonding the first wafer to a second wafer, with the second layer facing the second wafer. After bonding the first wafer and the second wafer together, second supporting parts and second operative parts of said device are formed in the first layer. The temporary anchors are removed from the first layer to free the operative parts formed therein.

Abstract translation: 一种具有支撑部件和操作部件的微电子机械装置的制造方法，包括提供具有第一半导体材料层的第一半导体晶片和配置在第一层顶部的第二半导体材料层，形成 在第二层中的装置的第一支撑部分和第一操作部分，在第一层中形成临时锚固件，以及将第一晶片结合到第二晶片，第二层面向第二晶片。 在将第一晶片和第二晶片接合在一起之后，所述器件的第二支撑部件和第二操作部分形成在第一层中。 将临时锚固件从第一层移除以释放其中形成的操作部件。

公开(公告)号：US20080157098A1

公开(公告)日：2008-07-03

申请号：US11964519

申请日：2007-12-26

Applicant: Takashi NOMA

Inventor： Takashi NOMA

IPC: H01L31/00 ,  H01L33/00 ,  H01L21/00

CPC classification number: H01L31/167 ,  B81C1/0023 ,  B81C2201/019 ,  H01L23/481 ,  H01L25/0657 ,  H01L25/167 ,  H01L31/1804 ,  H01L2224/48091 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/1461 ,  H01L2924/351 ,  Y02E10/547 ,  H01L2924/00014 ,  H01L2924/00

Abstract: The invention provides a semiconductor device with high reliability and smaller size and a method of manufacturing the same. A light emitting element as a device element is formed on the front surface of a semiconductor substrate, for example. In detail, an N-type semiconductor layer, a P-type semiconductor layer and pad electrodes are formed on the front surface of the semiconductor substrate. A device element receiving light from the light emitting element (e.g. a photodiode element), for example, and pad electrodes are formed on the front surface of another semiconductor substrate. The semiconductor substrates are attached and integrated with an adhesive layer being interposed therebetween. Wiring layers electrically connected to the pad electrodes and wiring layers electrically connected to the other pad electrodes are formed on the side surface of the semiconductor substrate.

Abstract translation: 本发明提供一种具有高可靠性和较小尺寸的半导体器件及其制造方法。 作为器件元件的发光元件例如形成在半导体衬底的前表面上。 详细地，在半导体衬底的前表面上形成N型半导体层，P型半导体层和焊盘电极。 在另一个半导体衬底的前表面上形成接收来自发光元件（例如光电二极管元件）的光的器件元件和焊盘电极。 将半导体基板与夹在其间的粘合剂层附着并整合。 与半导体衬底的侧表面上形成电连接到焊盘电极和电连接到其它焊盘电极的布线层的布线层。

公开(公告)号：US07335996B2

公开(公告)日：2008-02-26

申请号：US11442394

申请日：2006-05-30

Applicant: Qin-Yi Tong

Inventor： Qin-Yi Tong

IPC: H01L23/48

CPC classification number: B32B7/04 ,  B32B2250/04 ,  B81C1/00357 ,  B81C2201/019 ,  B81C2203/0118 ,  B81C2203/019 ,  H01L21/3105 ,  H01L21/76251 ,  H01L24/26 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/08059 ,  H01L2224/29186 ,  H01L2224/80896 ,  H01L2224/81894 ,  H01L2224/81895 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L2224/83894 ,  H01L2224/83896 ,  H01L2224/9202 ,  H01L2224/9212 ,  H01L2224/92125 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01016 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01058 ,  H01L2924/01067 ,  H01L2924/01072 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/351 ,  Y10T156/10 ,  Y10T428/24355 ,  Y10T428/24942 ,  Y10T428/31504 ,  Y10T428/31678 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/05442

Abstract: A method of bonding includes using a bonding layer having a fluorinated oxide. Fluorine may be introduced into the bonding layer by exposure to a fluorine-containing solution, vapor or gas or by implantation. The bonding layer may also be formed using a method where fluorine is introduced into the layer during its formation. The surface of the bonding layer is terminated with a desired species, preferably an NH2 species. This may be accomplished by exposing the bonding layer to an NH4OH solution. High bonding strength is obtained at room temperature. The method may also include bonding two bonding layers together and creating a fluorine distribution having a peak in the vicinity of the interface between the bonding layers. One of the bonding layers may include two oxide layers formed on each other. The fluorine concentration may also have a second peak at the interface between the two oxide layers.

Abstract translation: 接合方法包括使用具有氟化氧化物的接合层。 可以通过暴露于含氟溶液，蒸汽或气体或通过注入将氟引入结合层。 接合层也可以使用在其形成期间将氟引入层中的方法形成。 接合层的表面用所需的物质，优选NH 2种类终止。 这可以通过将粘合层暴露于NH 4 OH溶液来实现。 在室温下获得高粘结强度。 该方法还可以包括将两个结合层结合在一起并产生在接合层之间的界面附近具有峰的氟分布。 结合层之一可以包括彼此形成的两个氧化物层。 氟浓度也可以在两个氧化物层之间的界面处具有第二个峰。

公开(公告)号：US20080009090A1

公开(公告)日：2008-01-10

申请号：US11896171

申请日：2007-08-30

Applicant: Makoto Asai

Inventor： Makoto Asai

IPC: H01L21/306

CPC classification number: B81C1/00626 ,  B81B2201/0235 ,  B81B2201/0292 ,  B81B2203/0118 ,  B81C2201/014 ,  B81C2201/019 ,  G01P15/0802 ,  G01P15/125 ,  G01P2015/0814

Abstract: A physical quantity sensor includes: a semiconductor substrate; a cavity disposed in the substrate and extending in a horizontal direction of the substrate; a groove disposed on the substrate and reaching the cavity; a movable portion separated by the cavity and the groove so that the movable portion is movably supported on the substrate; and an insulation layer disposed on a bottom of the movable portion so that the insulation layer provides a roof of the cavity.

Abstract translation: 物理量传感器包括：半导体衬底; 设置在所述基板中并在所述基板的水平方向上延伸的空腔; 设置在所述基板上并到达所述空腔的凹槽; 可移动部分，由空腔和沟槽分隔开，使得可移动部分可移动地支撑在基板上; 以及设置在所述可动部分的底部上的绝缘层，使得所述绝缘层提供所述空腔的顶部。

公开(公告)号：US07250101B2

公开(公告)日：2007-07-31

申请号：US10434493

申请日：2003-05-07

Applicant: Jeffrey A. Thompson ,  Adam L. Cohen ,  Michael S. Lockard ,  Dennis R. Smalley

Inventor： Jeffrey A. Thompson ,  Adam L. Cohen ,  Michael S. Lockard ,  Dennis R. Smalley

IPC: C25D1/00 ,  C25D5/02 ,  C25D5/48 ,  C25D5/52

CPC classification number: B81C1/00126 ,  B33Y10/00 ,  B33Y70/00 ,  B81C2201/0181 ,  B81C2201/0188 ,  B81C2201/019

Abstract: Multilayer structures are electrochemically fabricated on a temporary (e.g. conductive) substrate and are thereafter bonded to a permanent (e.g. dielectric, patterned, multi-material, or otherwise functional) substrate and removed from the temporary substrate. In some embodiments, the structures are formed from top layer to bottom layer, such that the bottom layer of the structure becomes adhered to the permanent substrate, while in other embodiments the structures are form from bottom layer to top layer and then a double substrate swap occurs. The permanent substrate may be a solid that is bonded (e.g. by an adhesive) to the layered structure or it may start out as a flowable material that is solidified adjacent to or partially surrounding a portion of the structure with bonding occurs during solidification. The multilayer structure may be released from a sacrificial material prior to attaching the permanent substrate or it may be released after attachment.

Abstract translation: 多层结构在临时的（例如导电的）衬底上电化学地制造，然后在永久（例如电介质，图案化，多材料或其他功能）的衬底上结合并从临时衬底去除。 在一些实施例中，结构由顶层到底层形成，使得结构的底层变得粘附到永久性基底上，而在其它实施例中，结构是从底层到顶层形成的，然后是双层衬底交换 发生。 永久性基材可以是与层状结构结合的固体（例如通过粘合剂），或者可以作为在凝固期间发生结合而在结构的一部分附近凝固的可流动材料开始。 多层结构可以在附着永久性基底之前从牺牲材料上释放，或者在附着后可以释放多层结构。