公开(公告)号：US20030223290A1

公开(公告)日：2003-12-04

申请号：US10424923

申请日：2003-04-29

Inventor： Myun-joo Park ,  Jae-jun Lee

IPC: G11C007/00

CPC classification number: H05K1/0216 ,  G11C7/1006 ,  H05K1/0237 ,  H05K1/14 ,  H05K2201/044 ,  H05K2201/09727 ,  H05K2201/09781

Abstract: A semiconductor memory device includes memory modules which have memories and a data bus which transfers data to the memory modules, in which the data bus comprises a low frequency band data pass unit which removes the high frequency component of the data and sends the data to the memory modules. The low frequency band data pass unit comprises a plurality of stubs which are connected to the data bus in parallel and are formed as printed circuit board (PCB) patterns. The low frequency band data pass unit comprises a plurality of plates that are connected to the data bus in parallel and are formed as PCB patterns. The low frequency band data pass unit has a shape in which parts having a wide width and parts having a narrow width are alternately connected. Therefore, without adding a separate passive device, the semiconductor memory device reduces the high frequency noise of data transferred through a data bus such that the voltage margin of the data improves, the cost for passive devices such as capacitors, is reduced, and the process for attaching the passive devices is simplified.

Abstract translation: 半导体存储器件包括具有存储器的存储器模块和将数据传送到存储器模块的数据总线，其中数据总线包括一个低频带数据传递单元，该单元去除数据的高频分量并将数据发送到 内存模块 低频带数据传送单元包括并联连接到数据总线并形成为印刷电路板（PCB）图案的多个短截线。 低频带数据传送单元包括并联连接到数据总线并形成为PCB图案的多个板。 低频带数据传送单元具有宽度宽的部分和宽度窄的部分交替连接的形状。 因此，在不添加单独的无源器件的情况下，半导体存储器件减少通过数据总线传送的数据的高频噪声，从而数据的电压裕度提高，诸如电容器等无源器件的成本降低，并且该过程 用于安装无源器件简化了。

公开(公告)号：US20030089514A1

公开(公告)日：2003-05-15

申请号：US10319926

申请日：2002-12-12

Inventor： Junichi Hayama ,  Noboru Nakama ,  Tetsuya Murayama ,  Kenji Tsutsumi ,  Satoshi Tojo ,  Hiroshi Kadoya ,  Kiyonori Kusuda ,  Kenji Toshimitsu

IPC: H05K009/00

CPC classification number: H01R13/719 ,  H01R13/6625 ,  H05K1/0231 ,  H05K1/141 ,  H05K3/308 ,  H05K3/3447 ,  H05K3/368 ,  H05K2201/044 ,  H05K2201/10189 ,  H05K2201/1059 ,  Y10S439/941 ,  Y10S439/947

Abstract: A power supply terminal that prevents damage to capacitors included in a noise filter circuit therein which may occur due to a BWB's warp or thermal stresses at soldering time. The noise filter circuit is formed on a noise filter circuit substrate, being a substrate separate from the BWB. The noise filter circuit substrate is connected conductively to part of each of press fit terminals.

Abstract translation: 一种电源端子，其防止由于BWB在焊接时间的翘曲或热应力而发生的噪声滤波器电路中包含的电容器的损坏。 噪声滤波器电路形成在与BWB分离的基板的噪声滤波器电路基板上。 噪声滤波器电路基板导电地连接到每个压配端子的一部分。

公开(公告)号：US20030018940A1

公开(公告)日：2003-01-23

申请号：US09911634

申请日：2001-07-23

Inventor： James A. McCall ,  Michael W. Leddige

IPC: H03M013/00

CPC classification number: H05K1/0246 ,  G11C5/063 ,  H05K1/117 ,  H05K1/141 ,  H05K2201/044 ,  H05K2201/09254 ,  H05K2201/10022

Abstract: In some embodiments, the invention includes a system having first, second, third and fourth modules; and a circuit board including first, second, third, and fourth module connectors to receive the first and second modules, respectively. The system includes among other things a first group of paths of conductors extending from the circuit board to the first module connector, to the first module, back to the first module connector, to the circuit board, to the second module connector, to the second module, back to the second module connector, to terminations, wherein the first group of paths include a first short loop through section in the first module and a second short loop through section in the second module, to each couple to stubs for corresponding first and second chips of the first and second modules.

Abstract translation: 在一些实施例中，本发明包括具有第一，第二，第三和第四模块的系统; 以及电路板，包括分别接收第一和第二模块的第一，第二，第三和第四模块连接器。 该系统包括第一组导体，从电路板延伸到第一模块连接器，第一组件，第一模块连接器，电路板，第二模块连接器，第二组件连接器 模块，返回到第二模块连接器，到终端，其中第一组路径包括第一模块中的第一短循环部分和第二模块中的第二短循环部分，每个耦合到短截线用于对应的第一和 第一和第二模块的第二芯片。

公开(公告)号：US06498759B2

公开(公告)日：2002-12-24

申请号：US09752119

申请日：2000-12-29

Applicant: Nai-Shung Chang ,  Ching-Fu Chuang ,  Hsiu-Wen Ho

Inventor： Nai-Shung Chang ,  Ching-Fu Chuang ,  Hsiu-Wen Ho

IPC: G11C700

CPC classification number: G06F1/26 ,  G11C5/04 ,  G11C5/06 ,  G11C5/14 ,  G11C5/143 ,  G11C8/06 ,  H05K1/0246 ,  H05K1/0262 ,  H05K1/14 ,  H05K1/141 ,  H05K2201/044 ,  H05K2201/10022 ,  H05K2201/10159

Abstract: A system can produce a suitable voltage for powering the memory modules plugged into the memory module slots of a motherboard. A power-good signal is issued when the motherboard is powered up. A power safety device on the motherboard then issues a 2.5V to the memory module slot. If DDR DRAM type of memory modules are not detected after a while, the power safety device will turn off the 2,5V supply and provide a 3.3V, which is suitable for SDRAM type memory modules.This invention avoids sending a 3.3V to DDR DRAM modules, thereby burning the memory chip. The presence of DDR DRAM modules can be detected by a general-purpose purpose input/output port through accessing the recorded data in the EEPROM of the memory module. Alternatively, memory module type can be determined by sending out a low-current pulse signal to the memory module slot. Hence, a suitable voltage source is automatically provided to power the memory modules in the slots.

Abstract translation: 系统可以产生合适的电压，用于为插入主板的存储器模块槽中的存储器模块供电。 主板上电时发出电源良好信号。 主板上的电源安全设备然后向内存模块插槽发出2.5V电压。 如果DDR DRAM类型的存储器模块一段时间没有被检测到，电源安全设备将关闭2,5V电源并提供3.3V，这适用于SDRAM型存储器模块。本发明避免了将3.3V发送到DDR DRAM模块，从而烧录存储芯片。 通过访问存储器模块的EEPROM中的记录数据，可以通过通用目的输入/输出端口来检测DDR DRAM模块的存在。 或者，可以通过向存储器模块插槽发送低电流脉冲信号来确定存储器模块类型。 因此，自动提供合适的电压源来为插槽中的存储器模块供电。

公开(公告)号：US06426879B1

公开(公告)日：2002-07-30

申请号：US09824015

申请日：2001-04-03

Applicant: Masayuki Take

Inventor： Masayuki Take

IPC: H05K116

CPC classification number: H05K1/0246 ,  H05K1/0231 ,  H05K1/14 ,  H05K1/141 ,  H05K9/0064 ,  H05K2201/044 ,  H05K2201/10022 ,  H05K2201/10196

Abstract: The invention provides a circuit-mounted board which can improve the reliability in the operations of a system having expansion slots. The load adjustment board is a circuit-mounted board to be used by being inserted into the expansion slot of the system, and comprises a plurality of connection pins to obtain electric connection with another board, and devices each having variable electric property, such as a variable resistance or a variable capacitor, provided for each connection pin. One end of each device is connected to the respective connection pin, and the other end is fixed to the predetermined potential (ground, for example). The board is inserted into a vacant slot of the expansion slots of the system to suppress reflection noise etc.

公开(公告)号：US20020051350A1

公开(公告)日：2002-05-02

申请号：US09824015

申请日：2001-04-03

Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA

Inventor： Masayuki Take

IPC: H05K007/02

CPC classification number: H05K1/0246 ,  H05K1/0231 ,  H05K1/14 ,  H05K1/141 ,  H05K9/0064 ,  H05K2201/044 ,  H05K2201/10022 ,  H05K2201/10196

Abstract: The invention provides a circuit-mounted board which can improve the reliability in the operations of a system having expansion slots. The load adjustment board is a circuit-mounted board to be used by being inserted into the expansion slot of the system, and comprises a plurality of connection pins to obtain electric connection with another board, and devices each having variable electric property, such as a variable resistance or a variable capacitor, provided for each connection pin. One end of each device is connected to the respective connection pin, and the other end is fixed to the predetermined potential (ground, for example). The board is inserted into a vacant slot of the expansion slots of the system to suppress reflection noise etc.

Abstract translation: 本发明提供一种电路安装板，其可以提高具有扩展槽的系统的操作的可靠性。 负载调整板是通过插入到系统的扩展槽中而使用的电路安装板，并且包括多个连接引脚以与另一个板获得电连接，以及各自具有可变电性能的装置，例如 可变电阻或可变电容器，为每个连接引脚提供。 每个设备的一端连接到相应的连接引脚，另一端固定到预定电位（例如地面）。 该板插入系统的扩展槽的空槽，以抑制反射噪声等。

公开(公告)号：US06366466B1

公开(公告)日：2002-04-02

申请号：US09524450

申请日：2000-03-14

Applicant: Michael W. Leddige ,  Bryce D. Horine ,  James A. McCall

Inventor： Michael W. Leddige ,  Bryce D. Horine ,  James A. McCall

IPC: H05K102

CPC classification number: H05K1/0251 ,  H05K1/0265 ,  H05K1/116 ,  H05K3/429 ,  H05K2201/044 ,  H05K2201/09718 ,  H05K2201/09727 ,  H05K2201/09736 ,  H05K2201/10159

Abstract: A multi-layer printed circuit board that includes a first layer and a second layer that have first and second signal traces, respectively. The first signal trace has a relatively thin section and a relatively thick section. The multi-layer printed circuit board also includes a via that couples the first signal trace to the second signal trace. The first signal trace's relatively thin section is located between its relatively thick section and the via.

Abstract translation: 一种多层印刷电路板，包括分别具有第一和第二信号迹线的第一层和第二层。 第一个信号迹线具有较薄的部分和较厚的部分。 多层印刷电路板还包括将第一信号迹线耦合到第二信号迹线的通孔。 第一个信号迹线的相对较薄的部分位于其相对较厚的部分和通孔之间。

公开(公告)号：US06362968B1

公开(公告)日：2002-03-26

申请号：US09340961

申请日：1999-06-28

Applicant: Robert J. Lajara ,  Hassan Siahpolo ,  Ronald Barnes ,  Kenneth Kitlas

Inventor： Robert J. Lajara ,  Hassan Siahpolo ,  Ronald Barnes ,  Kenneth Kitlas

IPC: H05K714

CPC classification number: G06F1/184 ,  H05K1/0271 ,  H05K1/18 ,  H05K7/1461 ,  H05K2201/044 ,  H05K2201/2009 ,  H05K2201/2018

Abstract: A stiffener for a printed circuit board where the stiffener is placed between the printed circuit board and a wall of the metal chassis in a computer system housing. The loaded printed circuit board may first be mounted on the stiffener, which, in turn, may then be mounted on the appropriate wall of the chassis along with the circuit board. Alternately, the stiffener may first be mounted on the appropriate chassis wall, and the circuit board may then be mounted on the stiffener. Additional circuit components may then be added onto the circuit board. The lies between the circuit board and the wall of the chassis on which the circuit board is being mounted. The back plane support provided by the stiffener may reduce damage to the conducting paths of the printed circuit board due to pressures exerted during component mounting, manufacture, transportation, etc. Additionally, a circuit board carrying densely populated electronic components may be easily mounted on or removed from the chassis without damage. Adequate board-to-chassis grounding may also be accomplished through the sheet metal stiffener frame. Horizontal and vertical struts in the stiffener frame may provide additional stiffness and rigidity in the vicinity of the high density connectors on the circuit board. Besides increased stability, unusually tight tolerances on the flatness of the circuit board surface near high density connectors may be achieved with the support provided by the stiffener.

Abstract translation: 用于印刷电路板的加强件，其中加强件位于印刷电路板和计算机系统外壳中金属底盘的壁之间。 装载的印刷电路板可以首先安装在加强件上，然后可以将其与电路板一起安装在底盘的适当壁上。 或者，加强件可以首先安装在适当的底盘壁上，然后将电路板安装在加强件上。 然后可以将附加的电路部件添加到电路板上。 电路板和电路板正在安装的底盘的墙壁之间。 由加强件提供的背板支撑件可能由于在部件安装，制造，运输等过程中施加的压力而降低对印刷电路板的导电路径的损坏。此外，携带密集的电子部件的电路板可以容易地安装在 从机箱中取出而不损坏。 还可以通过金属板加强筋框架来实现足够的板对底盘接地。 加强框架中的水平和垂直支柱可以在电路板上的高密度连接器附近提供额外的刚度和刚性。 除了增加的稳定性之外，通过加强件提供的支撑可以实现在高密度连接器附近的电路板表面的平坦度上的非常紧密的公差。

公开(公告)号：US6128685A

公开(公告)日：2000-10-03

申请号：US025388

申请日：1998-02-18

Applicant: Jeffrey J. Cronin

Inventor： Jeffrey J. Cronin

IPC: G06F13/40 ,  H05K1/02 ,  H05K1/14 ,  H05K7/10 ,  G06F13/38

CPC classification number: H05K1/0246 ,  G06F13/4086 ,  H05K7/1092 ,  H05K1/0231 ,  H05K1/14 ,  H05K1/141 ,  H05K1/142 ,  H05K2201/044 ,  H05K2201/10022 ,  H05K2201/10325 ,  H05K2201/10704

Abstract: A method for terminating a bus configured to have one or more processors coupled thereto. The method comprises coupling a support member having a termination circuit thereon to a conductor of the bus. In one embodiment, the support member is connected to the bus separately from the processor. In another embodiment, the support member is coupled between the bus and the processor. The support member may include an auxiliary circuit in addition to the termination circuit and may be used to correct, supply, or update signals transmitted on the bus.

Abstract translation: 一种用于终止被配置为具有与其耦合的一个或多个处理器的总线的方法。 该方法包括将其上具有终端电路的支撑构件连接到总线的导体。 在一个实施例中，支撑构件与处理器分开地连接到总线。 在另一个实施例中，支撑构件耦合在总线和处理器之间。 支持构件除了终端电路之外还可以包括辅助电路，并且可以用于校正，提供或更新在总线上传输的信号。

公开(公告)号：US6061249A

公开(公告)日：2000-05-09

申请号：US968407

申请日：1997-11-12

Applicant: Edwin J. Nealis

Inventor： Edwin J. Nealis

IPC: H05K1/14 ,  H05K3/00 ,  H05K7/14 ,  H05K7/10

CPC classification number: H05K7/1439 ,  H05K3/0064 ,  H05K7/1452 ,  H05K1/14 ,  H05K2201/0116 ,  H05K2201/0195 ,  H05K2201/044 ,  H05K2201/10189 ,  H05K2203/1147

Abstract: In one form, the invention is directed to the combination of: a plate; a first connector on the plate; a first circuit card assembly including a first circuit card and a second connector on the first circuit card which second connector is capable of coupling to the first connector; and a layer of sealing material on the plate and having a first opening therein to accept a part of the first circuit card assembly with the first and second connectors coupled. The layer of sealing material has a first cantilevered flap which has a first, relaxed state. The first cantilevered flap is deflected from the first state into a second state wherein the first cantilevered flap bears sealingly against a part of the first circuit card assembly with the first and second connectors coupled.

Abstract translation: 在一种形式中，本发明涉及：板的组合; 板上的第一连接器; 第一电路卡组件，包括第一电路卡和第二连接器，第一电路卡上的第二连接器能够耦合到第一连接器; 以及在所述板上的一层密封材料，并且在其中具有第一开口，以接纳所述第一和第二连接器连接的第一电路卡组件的一部分。 密封材料层具有第一悬臂翼片，其具有第一松弛状态。 第一悬臂翼片从第一状态偏转到第二状态，其中第一悬臂翼片密封地抵靠第一和第二连接器连接的第一电路卡组件的一部分。