公开(公告)号：US20100003784A1

公开(公告)日：2010-01-07

申请号：US12466361

申请日：2009-05-14

Applicant: CHUNG-JEN TSAI ,  CHIA-CHENG CHEN ,  HUNG-YI CHANG ,  TUNG-YAO KUO ,  CHENG-HSIEN LIN

Inventor： CHUNG-JEN TSAI ,  CHIA-CHENG CHEN ,  HUNG-YI CHANG ,  TUNG-YAO KUO ,  CHENG-HSIEN LIN

IPC: H01L21/52

CPC classification number: H05K1/0271 ,  H05K3/0052 ,  H05K3/303 ,  H05K3/341 ,  H05K2201/09127 ,  H05K2201/09136 ,  H05K2201/09681 ,  H05K2201/09781 ,  H05K2201/10674 ,  H05K2201/2009

Abstract: A method for assembling an electronic component on a printed circuit board includes following steps. Firstly, a printed circuit board substrate including a central main portion and a peripheral unwanted portion is provided. Secondly, electrically conductive patterns and reinforcing patterns are formed on the main portion and the unwanted portion respectively. Thirdly, an electronic component is mounted on the main portion and electrically connected with the electrically conductive patterns. Fifthly, the unwanted portion is removed.

Abstract translation: 一种用于在印刷电路板上组装电子部件的方法包括以下步骤。 首先，提供包括中央主要部分和外围不想要的部分的印刷电路板基板。 其次，分别在主要部分和不想要的部分上形成导电图案和加强图案。 第三，电子部件安装在主体部分上并与导电图形电连接。 第五，去除不想要的部分。

公开(公告)号：US20090260864A1

公开(公告)日：2009-10-22

申请号：US12346655

申请日：2008-12-30

Applicant: Jun Ho Lee

Inventor： Jun Ho Lee

IPC: H05K1/16 ,  H05K1/00

CPC classification number: H05K1/0245 ,  H05K1/0236 ,  H05K2201/09236 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2201/09681

Abstract: A circuit board includes a plurality of differential signal line pairs, and a plurality of electromagnetic bandgap (EBG) patterns, each configured to be disposed to overlap the plurality of differential signal line pairs, wherein the EBG patterns are electrically insulated from the differential signal line pairs.

Abstract translation: 电路板包括多个差分信号线对和多个电磁带隙（EBG）图案，每个电磁带隙（EBG）图案被配置为与多个差分信号线对重叠，其中EBG图案与差分信号线电绝缘 对。

公开(公告)号：US20090184782A1

公开(公告)日：2009-07-23

申请号：US12232463

申请日：2008-09-17

Applicant: Ja-Bu Koo ,  Mi-Ja Han ,  Han Kim

Inventor： Ja-Bu Koo ,  Mi-Ja Han ,  Han Kim

IPC: H01P1/203

CPC classification number: H01P3/088 ,  H01L2224/16225 ,  H01P1/2005 ,  H05K1/0236 ,  H05K1/0237 ,  H05K3/429 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2201/09681

Abstract: Disclosed are an electromagnetic bandgap structure and a printed circuit board. In accordance with an embodiment of the present invention, the electromagnetic bandgap structure can include a dielectric layer; a plurality of conductive plates; a stitching via, configured to pass through the dielectric layer and have a part electrically connecting the conductive plates to each other by connecting through a planar surface that is different from a planar surface of the conductive plates, and a through via. Here, the dielectric layer, the conductive plates and the stitching via can be placed between any two conductive layers, and the through via can be configured to pass through a clearance hole formed in the conductive layer and electrically connect the two conductive layers to each other.

Abstract translation: 公开了电磁带隙结构和印刷电路板。 根据本发明的实施例，电磁带隙结构可以包括电介质层; 多个导电板; 缝合通孔，其构造成穿过介电层并且具有通过连接通过不同于导电板的平坦表面的平坦表面和通孔而将导电板彼此电连接的部分。 这里，电介质层，导电板和缝合通孔可以放置在任何两个导电层之间，并且通孔可以被配置为穿过形成在导电层中的间隙孔并将两个导电层彼此电连接 。

公开(公告)号：US20090139704A1

公开(公告)日：2009-06-04

申请号：US11910460

申请日：2006-04-06

Applicant: Kota Otoshi ,  Eiji Kono ,  Hidehito Kubo ,  Masahiko Kimbara ,  Yuichi Furukawa ,  Shinobu Yamauchi ,  Ryoichi Hoshino ,  Nobuhiro Wakabayashi ,  Shintaro Nakagawa

Inventor： Kota Otoshi ,  Eiji Kono ,  Hidehito Kubo ,  Masahiko Kimbara ,  Yuichi Furukawa ,  Shinobu Yamauchi ,  Ryoichi Hoshino ,  Nobuhiro Wakabayashi ,  Shintaro Nakagawa

IPC: F28F7/00

CPC classification number: H01L23/367 ,  H01L23/3677 ,  H01L23/3735 ,  H01L23/473 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K3/0061 ,  H05K3/341 ,  H05K3/4015 ,  H05K2201/0373 ,  H05K2201/09681 ,  H05K2201/0969 ,  Y02P70/613 ,  H01L2924/00

Abstract: A heat radiator 1 includes an insulating substrate 3 whose first side serves as a heat-generating-element-mounting side, and a heat sink 5 fixed to a second side of the insulating substrate 3. A metal layer 7 is formed on a side of the insulating substrate 3 opposite the heat-generating-element-mounting side. A stress relaxation member 4 intervenes between the metal layer 7 of the insulating substrate 3 and the heat sink 5. The stress relaxation member 4 is formed of an aluminum plate 10 having a plurality of through holes 9 formed therein, and the through holes 9 serve as stress-absorbing spaces. The stress relaxation member 4 is brazed to the metal layer 7 of the insulating substrate 3 and to the heat sink 5. This heat radiator 1 is low in material cost and exhibits excellent heat radiation performance.

Abstract translation: 散热器1包括第一侧用作发热元件安装侧的绝缘基板3和固定到绝缘基板3的第二侧的散热片5.金属层7形成在 绝缘基板3与发热元件安装侧相反。 应力松弛部件4介于绝缘基板3的金属层7和散热片5之间。应力松弛部件4由形成有多个通孔9的铝板10形成，通孔9 作为应力吸收空间。 应力松弛部件4钎焊到绝缘基板3的金属层7和散热片5.该散热器1的材料成本低，散热性能优异。

公开(公告)号：US20090126978A1

公开(公告)日：2009-05-21

申请号：US12353117

申请日：2009-01-13

Applicant: Kok-Siang Ng ,  King Keong Wong ,  Michael E. Ryan

Inventor： Kok-Siang Ng ,  King Keong Wong ,  Michael E. Ryan

IPC: H05K1/02

CPC classification number: H05K1/0245 ,  H05K1/0224 ,  H05K1/0237 ,  H05K1/0253 ,  H05K2201/09236 ,  H05K2201/09681 ,  H05K2201/0969 ,  Y10T29/49155

Abstract: A component having reference layer openings to contribute towards achieving a differential impedance in a circuit, is described herein.

Abstract translation: 这里描述了具有参考层开口以有助于实现电路中的差分阻抗的部件。

公开(公告)号：US07495929B2

公开(公告)日：2009-02-24

申请号：US11858740

申请日：2007-09-20

Applicant: Kok-Siang Ng ,  King Keong Wong ,  Michael E. Ryan

Inventor： Kok-Siang Ng ,  King Keong Wong ,  Michael E. Ryan

IPC: H05K7/00

CPC classification number: H05K1/0245 ,  H05K1/0224 ,  H05K1/0237 ,  H05K1/0253 ,  H05K2201/09236 ,  H05K2201/09681 ,  H05K2201/0969 ,  Y10T29/49155

Abstract: A component having reference layer openings to contribute towards achieving a differential impedance in a circuit, is described herein.

Abstract translation: 这里描述了具有参考层开口以有助于实现电路中的差分阻抗的部件。

公开(公告)号：US07474541B2

公开(公告)日：2009-01-06

申请号：US11383185

申请日：2006-05-12

Applicant: Tse-Hsine Laio ,  Ting-Kuo Kao

Inventor： Tse-Hsine Laio ,  Ting-Kuo Kao

IPC: H05K7/12

CPC classification number: H05K1/0209 ,  H05K3/3452 ,  H05K3/3457 ,  H05K2201/0373 ,  H05K2201/09681 ,  H05K2201/09781 ,  H05K2203/043

Abstract: In a printed circuit board and its heat dissipating metal surface layout, a layer of copper foil is coated onto the printed circuit board for dissipating heat, and the surface of the copper foil is covered by an insulating coating, and a bare copper is formed on the surface of copper foil which is not covered by the insulating coating, and the bare copper is arranged in a cross shape, or in the shape of “#”, so that when the printed circuit board goes through a soldering furnace, the cohesion of solder is even instead of aggregating at a same position or the center, so as to obtain a larger protruding area and facilitate dissipating heat and transmitting current.

Abstract translation: 在印刷电路板及其散热金属表面布置中，将一层铜箔涂覆在印刷电路板上用于散热，铜箔的表面被绝缘涂层覆盖，并且裸铜形成在 未被绝缘涂层覆盖的铜箔的表面和裸铜布置成十字形或“＃”形，使得当印刷电路板通过焊接炉时，其内聚力 焊料是均匀的，而不是在相同的位置或中心处聚集，以便获得更大的突出面积并且有助于散热和传输电流。

公开(公告)号：US07473854B2

公开(公告)日：2009-01-06

申请号：US11380008

申请日：2006-04-25

Applicant: Mitsuru Honjo ,  Yuki Saitou ,  Yoshifumi Morita ,  Yoshifumi Yamamoto

Inventor： Mitsuru Honjo ,  Yuki Saitou ,  Yoshifumi Morita ,  Yoshifumi Yamamoto

IPC: B32B9/00 ,  H05K1/02 ,  H01R9/00

CPC classification number: H05K1/0253 ,  H05K1/0224 ,  H05K1/0393 ,  H05K2201/09236 ,  H05K2201/09681 ,  Y10T428/24917 ,  Y10T428/24926

Abstract: A ground pattern includes a plurality of integrally formed first to third ground lines. A plurality of first ground lines are arranged parallel to one another at equal intervals. A plurality of second ground lines are arranged parallel to one another at equal intervals between adjacent ones of the first ground lines. A plurality of third ground lines are arranged parallel to one another at equal intervals between adjacent ones of the first ground lines at a predetermined angle with respect to the second ground lines. The third ground lines each connect one end of one adjacent second ground line with the other end of another adjacent second ground line. The ground lines form triangular openings.

Abstract translation: 接地图案包括多个整体形成的第一至第三接地线。 多个第一接地线以相等的间隔彼此平行地布置。 多个第二接地线在相邻的第一接地线之间以相等的间隔彼此平行地布置。 多个第三接地线相对于第二接地线以预定的角度以相等间隔彼此平行地布置在相邻的第一接地线之间。 第三接地线各自将一个相邻的第二接地线的一端与另一相邻的第二接地线的另一端连接。 地线形成三角形开口。

公开(公告)号：US07458844B2

公开(公告)日：2008-12-02

申请号：US11309403

申请日：2006-08-04

Applicant: Chun-Hung Chen

Inventor： Chun-Hung Chen

IPC: H01R31/08

CPC classification number: H05K1/0216 ,  H05K1/0215 ,  H05K3/222 ,  H05K3/325 ,  H05K2201/0311 ,  H05K2201/093 ,  H05K2201/09663 ,  H05K2201/09681 ,  H05K2201/10409

Abstract: A grounding device for reducing electromagnetic interference (EMI) on a printed circuit board (PCB) includes a grounded portion formed on the PCB, a threaded hole defined in the PCB, and a connecting member. The grounded portion is a part of a grounding layer of the PCB and with high impedance. The threaded hole is grounded and with low impedance. The connecting member includes a first connecting tab and a second connecting tab separately formed at opposite ends thereof. The first connecting tab is electrically connected with the threaded hole via a screw. The second connecting end resiliently abuts against the grounded portion of the PCB.

Abstract translation: 用于降低印刷电路板（PCB）上的电磁干扰（EMI）的接地装置包括形成在PCB上的接地部分，在PCB中限定的螺纹孔和连接部件。 接地部分是PCB的接地层的一部分，具有高阻抗。 螺纹孔接地，阻抗低。 连接构件包括分别形成在其相对端部处的第一连接翼片和第二连接翼片。 第一连接片通过螺丝与螺纹孔电连接。 第二连接端弹性地邻接PCB的接地部分。

公开(公告)号：US07432775B2

公开(公告)日：2008-10-07

申请号：US10793362

申请日：2004-03-04

Applicant: Achyut Dutta

Inventor： Achyut Dutta

IPC: H01P3/08

CPC classification number: H01L23/66 ,  H01L23/5383 ,  H01L25/0655 ,  H01L2223/6627 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/13091 ,  H01L2924/1903 ,  H01L2924/19032 ,  H01L2924/19033 ,  H01L2924/3011 ,  H01P1/2005 ,  H01P3/08 ,  H05K1/0224 ,  H05K1/0236 ,  H05K1/024 ,  H05K1/0253 ,  H05K1/0298 ,  H05K1/0306 ,  H05K1/0313 ,  H05K2201/0187 ,  H05K2201/0191 ,  H05K2201/0715 ,  H05K2201/09036 ,  H05K2201/09063 ,  H05K2201/09681 ,  Y02P80/30 ,  H01L2924/00 ,  H01L2224/05599

Abstract: Fundamental interconnect systems for connecting high-speed electronics elements are provided. The interconnect systems consists of the signal line, dielectric system with opened trench or slot filled up with the air or lower dielectric loss material, and the ground plane. The signal line could be for example, microstripline, strip line, coplanar line, single ended or differential pairs. The interconnect system can be used for on-chip interconnects or can also be used for off-chip interconnects (chip-to-chip interconnects). The fundamental techniques provided in this invention can also be used for high-speed connectors and high-speed cables. More over, this fundamental technology is also used for the high sped die package, high speed connector, and high speed cables where conventional manufacturing technology can be used and yet to increase the bandwidth of the interconnects.

Abstract translation: 提供了用于连接高速电子元件的基础互连系统。 互连系统由信号线，具有开放沟槽的介质系统或充满空气或较低介质损耗材料的槽以及接地层组成。 信号线可以是例如微带线，带状线，共面线，单端或差分对。 互连系统可用于片上互连，也可用于片外互连（芯片到芯片间互连）。 本发明提供的基本技术也可用于高速连接器和高速电缆。 更重要的是，这种基础技术也被用于可以使用常规制造技术并且增加互连带宽的高速度封装，高速连接器和高速电缆。