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    PROCESS STACK FOR CVD PLASMA TREATMENT
    1.
    发明申请
    PROCESS STACK FOR CVD PLASMA TREATMENT 有权

    公开(公告)号：US20250037976A1

    公开(公告)日：2025-01-30

    申请号：US18227767

    申请日：2023-07-28

    Applicant: Applied Materials, Inc.

    Inventor： Anirudh K. Alewoor ,  Akshay Dhanakshirur ,  Mayur Govind Kulkarni

    IPC: H01J37/32 ,  C23C16/44

    Abstract: Gas distribution assemblies, processing chambers, and methods for processing substrates are provided. A substrate processing chamber includes a chamber body having a first end and a second end, a lid coupled to the first end of the chamber body, an isolator disposed on an upper surface of the lid, a faceplate disposed on an upper surface of the isolator, a substrate support disposed on a shaft extending through the second end of the chamber body, a pumping ring positioned within the chamber body, and an exhaust outlet in fluid communication with a system foreline and the plurality of apertures. The processing chamber defines a processing region between the substrate support and the faceplate. The pumping ring includes a flange extending in a plane generally parallel with a top surface of the substrate support that defines a plurality of apertures.

    ISOLATOR FOR PROCESSING CHAMBERS
    7.
    发明申请
    ISOLATOR FOR PROCESSING CHAMBERS 有权

    公开(公告)号：US20220328293A1

    公开(公告)日：2022-10-13

    申请号：US17228996

    申请日：2021-04-13

    Applicant: Applied Materials, Inc.

    Inventor： Akshay Dhanakshirur ,  Saketh Pemmasani ,  Mayur Govind Kulkarni ,  Madhu Santosh Kumar Mutyala

    IPC: H01J37/32 ,  C23C16/44 ,  C23C16/455 ,  C23C16/458

    Abstract: Apparatus and methods for reducing undesirable residue material deposition and buildup on one or more surfaces within a processing chamber are provided herein. In embodiments disclosed herein, a processing chamber includes a chamber body having a chamber base, one or more sidewalls, and a chamber lid defining a processing volume; a showerhead disposed in the chamber lid and having a bottom surface adjacent the processing volume; and an isolator disposed between the chamber lid and the one or more sidewalls. The isolator includes a first end contacting the showerhead; a second end opposite the first end; an angled inner wall connected to the first end and extending radially outwardly from the first end towards the second end; and a lower inner wall at a different angle from the angled inner wall. The first end and the angled inner wall of the isolator form a first angle less than 90°.

    WAFER NON-UNIFORMITY TWEAKING THROUGH LOCALIZED ION ENHANCED PLASMA (IEP)
    10.
    发明申请
    WAFER NON-UNIFORMITY TWEAKING THROUGH LOCALIZED ION ENHANCED PLASMA (IEP) 有权

    公开(公告)号：US20220093368A1

    公开(公告)日：2022-03-24

    申请号：US17026840

    申请日：2020-09-21

    Applicant: Applied Materials, Inc.

    Inventor： Saketh Pemmasani ,  Akshay Dhanakshirur ,  Mayur Govind Kulkarni ,  Khokan Chandra Paul ,  Madhu Santosh Kumar Mutyala

    IPC: H01J37/32 ,  C23C16/455

    Abstract: semiconductor processing chambers include a gasbox. The chambers may include a substrate support. The chambers may include a blocker plate positioned between the gasbox and the substrate support. The blocker plate may define a plurality of apertures. The chambers may include a faceplate positioned between the blocker plate and the substrate support. The faceplate may be characterized by a first surface facing the blocker plate and a second surface opposite the first surface. The second surface and the substrate support may at least partially define a processing region within the chamber. The faceplate may define an inner plurality of apertures. Each of the inner apertures may include a generally cylindrical aperture profile. The faceplate may define an outer plurality of apertures that are positioned radially outward from the inner apertures. Each of the outer apertures may include a conical aperture profile that extends through the second surface.

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