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公开(公告)号:US20210274648A1
公开(公告)日:2021-09-02
申请号:US16805517
申请日:2020-02-28
Applicant: Cray Inc.
Inventor: Hyunjun Kim , Andrew J. Becker , Paul T. Wildes
Abstract: One embodiment can provide a method and system for compensating for timing skew in a differential pair transmission line on a printed circuit board (PCB). During operation, the system obtains a PCB comprising one or more layers and at least a differential pair transmission line. The differential pair transmission line comprises first and second transmission lines, with a respective transmission line coupled to at least one via extending through the one or more layers of the PCB. The system determines a difference in length between first and second transmission lines and determines a stub length of the at least one via based on the determined difference in length between the first and second transmission lines, thereby compensating for the time skew in the differential pair transmission line.
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公开(公告)号:US10716213B2
公开(公告)日:2020-07-14
申请号:US16048267
申请日:2018-07-28
Applicant: Cray Inc.
Inventor: Hyunjun Kim , Andy Becker , Jim Fitzke , Brad Smith , Paul Wildes
Abstract: To eliminate signal loss and sources of signal attenuation, a connection methodology is utilized which enables high-speed signals to be directly communicated from particular integrated circuits housed on a printed circuit board, to other locations within a system. More specifically, a signal escape strategy directly connects a high-speed cable to a point on the circuit board which is very close to the integrated circuit itself. A back-side connection methodology is utilized so that electrical signals pass directly from the integrated circuit through a via, to a connection point on the backside of the circuit board. To accommodate this connection, a specially designed interposer and related paddle cards are utilized so the high-speed communication cable can be easily attached.
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公开(公告)号:US20180228019A1
公开(公告)日:2018-08-09
申请号:US15428865
申请日:2017-02-09
Applicant: Cray Inc.
Inventor: Andy Becker , Hyunjun Kim , Shawn Utz , Paul Wildes
CPC classification number: H05K1/0251 , G06F17/5009 , G06F17/5072 , G06F17/5081 , H05K1/024 , H05K1/112 , H05K1/113 , H05K1/116 , H05K3/0005 , H05K3/4007 , H05K3/4038 , H05K3/429 , H05K2201/09454 , H05K2201/096 , H05K2201/09718 , H05K2201/09781
Abstract: The various structures forming communication paths on a printed circuit board can create several undesired effects, especially when high frequency signals are considered. Non-functional pads created during the manufacturing process have the potential to create an undesired effect, but when the overall collection of non-functional pads are carefully configured, an optimized communication path can be formed. More specifically, by selectively removing some collection of the non-functional pads, the high frequency characteristics of the communication paths can be optimized.
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公开(公告)号:US20200375025A1
公开(公告)日:2020-11-26
申请号:US16880944
申请日:2020-05-21
Applicant: Cray Inc.
Inventor: Hyunjun Kim , Andrew J. Becker , Paul Taylor Wildes , Gregory E. Scott
Abstract: One embodiment provides a printed circuit board (PCB). The PCB can include one or more metal layers and at least a pair of differential transmission lines. The pair of differential transmission lines can include a first transmission line and a second transmission line. The first transmission line can include a plurality of timing-skew-compensation structures, and a respective timing-skew-compensation structure of the first transmission line or a corresponding segment of the second transmission line adjacent to the timing-skew-compensation structure has a non-uniform width.
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公开(公告)号:US10595394B1
公开(公告)日:2020-03-17
申请号:US16407721
申请日:2019-05-09
Applicant: Cray Inc.
Inventor: Hyunjun Kim , Paul Wildes , Andy Becker , Shawn Utz
Abstract: A printed circuit board includes additional stitching vias placed at strategic location within a connection matrix, which provides additional isolation and further accommodates high-speed communication capabilities. The stitching vias have a variable length or depth, depending on related structures within the circuit board, so as to avoid any interference with underlining escape routing, or alternative signal transmission structures. More specifically, these stitching vias help to eliminate cross-talk in the via field caused by the close proximity of signal carrying structures. Further, differential signal communication is better accommodated based upon this reduction in cross-talk.
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公开(公告)号:US10154581B2
公开(公告)日:2018-12-11
申请号:US15428865
申请日:2017-02-09
Applicant: Cray Inc.
Inventor: Andy Becker , Hyunjun Kim , Shawn Utz , Paul Wildes
Abstract: The various structures forming communication paths on a printed circuit board can create several undesired effects, especially when high frequency signals are considered. Non-functional pads created during the manufacturing process have the potential to create an undesired effect, but when the overall collection of non-functional pads are carefully configured, an optimized communication path can be formed. More specifically, by selectively removing some collection of the non-functional pads, the high frequency characteristics of the communication paths can be optimized.
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公开(公告)号:US10966311B2
公开(公告)日:2021-03-30
申请号:US16882146
申请日:2020-05-22
Applicant: CRAY INC.
Inventor: Hyunjun Kim , Andrew J. Becker , Paul Taylor Wildes
Abstract: Systems and methods are provided for reducing crosstalk between differential signals in a printed circuit board (PCB) using fine pitch vias. A pair of contact pads are on the top surface of the PCB and configured to couple a PCB component to the PCB, the contacts a first distance from each other. A first via of a plurality of vias is electrically coupled to a first contact of the pair of contacts and a second via is electrically coupled to a second contact, the first via and second via a second distance from each other, the second distance being less than current standards for minimum via pitch. Each via comprises a via pad on the top surface and a plated through-hole extending from the top surface to a termination point. A separator gap is between the first via and the second via.
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公开(公告)号:US20200037448A1
公开(公告)日:2020-01-30
申请号:US16048267
申请日:2018-07-28
Applicant: Cray Inc.
Inventor: Hyunjun Kim , Andy Becker , Jim Fitzke , Brad Smith , Paul Wildes
Abstract: To eliminate signal loss and sources of signal attenuation, a connection methodology is utilized which enables high-speed signals to be directly communicated from particular integrated circuits housed on a printed circuit board, to other locations within a system. More specifically, a signal escape strategy directly connects a high-speed cable to a point on the circuit board which is very close to the integrated circuit itself. A back-side connection methodology is utilized so that electrical signals pass directly from the integrated circuit through a via, to a connection point on the backside of the circuit board. To accommodate this connection, a specially designed interposer and related paddle cards are utilized so the high-speed communication cable can be easily attached.
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公开(公告)号:US20160366759A1
公开(公告)日:2016-12-15
申请号:US14461900
申请日:2014-08-18
Applicant: Cray Inc.
Inventor: Hyunjun Kim , Jeffrey Scott Conger , Gregory Erwin Scott
CPC classification number: H05K1/0225 , H05K1/0219 , H05K1/0222 , H05K1/0245 , H05K1/0298 , H05K1/114 , H05K1/115 , H05K3/4007 , H05K3/42 , H05K2201/093 , H05K2201/09336 , H05K2201/09609 , H05K2201/09618 , Y10T29/49155 , Y10T29/49165
Abstract: A multi-layer printed circuit board has a number of landing pads that are configured to engage a connector secured thereto. Between the landing pads associated with different signals is at least one micro via that is electrically connected to a ground plane on an outer surface of the multi-layer printed circuit board, and a ground plane on an inner layer of the multi-layer printed circuit board.
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公开(公告)号:US20150013155A1
公开(公告)日:2015-01-15
申请号:US14507201
申请日:2014-10-06
Applicant: Cray Inc.
Inventor: Hyunjun Kim , Jeffrey Scott Conger , Gregory Erwin Scott
CPC classification number: H05K1/0225 , H05K1/0219 , H05K1/0222 , H05K1/0245 , H05K1/0298 , H05K1/114 , H05K1/115 , H05K3/4007 , H05K3/42 , H05K2201/093 , H05K2201/09336 , H05K2201/09609 , H05K2201/09618 , Y10T29/49155 , Y10T29/49165
Abstract: A multi-layer printed circuit board has a number of landing pads that are configured to engage a connector secured thereto. Between the landing pads associated with different signals is at least one micro via that is electrically connected to a ground plane on an outer surface of the multi-layer printed circuit board, and a ground plane on an inner layer of the multi-layer printed circuit board.
Abstract translation: 多层印刷电路板具有多个着陆焊盘,其被配置为接合固定到其上的连接器。 在与不同信号相关联的着陆垫之间是至少一个微通孔,其电连接到多层印刷电路板的外表面上的接地平面,以及多层印刷电路的内层上的接地平面 板。
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