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公开(公告)号：US09736945B2
公开(公告)日：2017-08-15
申请号：US14813218
申请日：2015-07-30
Applicant: IBIDEN CO., LTD.
Inventor： Nobuya Takahashi
IPC: H05K1/09 , H05K3/18 , H05K3/16 , H01L23/498 , H05K1/11 , H05K1/14 , H05K3/40 , H01L23/00 , H01L25/065 , H01L25/18 , H01L21/48 , H01L23/538
CPC classification number: H05K3/18 , H01L21/4857 , H01L23/49866 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/32 , H01L24/73 , H01L25/0655 , H01L25/18 , H01L2224/131 , H01L2224/16227 , H01L2224/16238 , H01L2224/1703 , H01L2224/32225 , H01L2224/73204 , H01L2924/1436 , H01L2924/15192 , H01L2924/15311 , H05K1/0296 , H05K1/0313 , H05K1/09 , H05K1/111 , H05K1/141 , H05K3/16 , H05K3/4007 , H05K2201/0326 , H05K2201/0364 , H05K2201/0391 , H05K2201/0769 , H05K2201/09236 , H05K2201/0929 , H05K2201/094 , H05K2201/09654 , H05K2201/097 , H05K2201/09736 , H05K2201/098 , H01L2924/014
Abstract: A printed wiring board includes an insulation layer, conductive pads formed on the insulation layer and positioned to connect an electronic component, and a conductive wiring pattern including first and second conductive patterns and formed on the insulation layer such that the conductive wiring pattern is extending between the conductive pads. The first pattern includes first wiring lines, the second pattern includes second wiring lines, the first and second conductive patterns are formed such that the first wiring lines and the second wiring lines are alternately arrayed on the insulation layer, each of the first wiring lines includes a first metal layer formed on an interface with the insulation layer, each of the second wiring lines includes a second metal layer formed on an interface with the insulation layer, and the first metal layer includes a metal material which is different from a metal material forming the second metal layer.
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公开(公告)号：US20170318669A1
公开(公告)日：2017-11-02
申请号：US15649830
申请日：2017-07-14
Applicant: Intel Corporation
Inventor： Kristof Darmawikarta , Daniel Sobieski , Kyu Oh Lee , Sri Ranga Sai Boyapati
CPC classification number: H05K1/0298 , H01L23/49822 , H01L23/49838 , H05K1/113 , H05K3/0041 , H05K3/181 , H05K3/188 , H05K3/4038 , H05K3/422 , H05K3/429 , H05K3/4644 , H05K2201/09218 , H05K2201/09372 , H05K2201/095 , H05K2201/096 , H05K2201/09654 , H05K2203/0548
Abstract: Some example forms relate to an electronic package. The electronic package includes a first dielectric layer that includes an electrical trace formed on a surface of the first dielectric layer and a second dielectric layer on the surface of the first dielectric layer. The second dielectric layer includes an opening. The electrical trace is within the opening. The electronic package includes an electrical interconnect that fills the opening and extends above an upper surface of the second dielectric layer such that the electrically interconnect is electrically connected to the electrical trace on the first dielectric layer.
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公开(公告)号：US09345140B2
公开(公告)日：2016-05-17
申请号：US14855233
申请日：2015-09-15
Applicant: CANON KABUSHIKI KAISHA
Inventor： Hiroshi Isono
IPC: H01R9/00 , H05K1/18 , H01L25/065 , H05K1/11 , H05K1/02
CPC classification number: H05K1/181 , H01L25/0657 , H01L2224/16225 , H01L2225/06548 , H01L2225/06555 , H01L2924/15174 , H05K1/0228 , H05K1/0231 , H05K1/0243 , H05K1/025 , H05K1/0298 , H05K1/115 , H05K2201/09654 , H05K2201/10545 , H05K2201/10734
Abstract: A printed circuit board includes a first semiconductor package on a first surface layer of a printed wiring board and a second semiconductor package on a second surface layer where a bus signal is transmitted from the first to the second semiconductor package. A first bus wiring path from a signal terminal on an inner circumference side of the first semiconductor package via a via hole and the second surface layer to a signal terminal on an outer circumference side of the second semiconductor package and a second bus wiring path from a signal terminal on an outer circumference side of the first semiconductor package via the second surface layer and a via hole to a signal terminal on an inner circumference side of the second semiconductor package are provided, thus securing a return current path for a signal current and realizing a high density wiring while suppressing radiation noise.
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Patent Agency Ranking
公开(公告)号：US20160037629A1
公开(公告)日：2016-02-04
申请号：US14813218
申请日：2015-07-30
Applicant: IBIDEN CO., LTD.
Inventor： Nobuya TAKAHASHI
CPC classification number: H05K3/18 , H01L21/4857 , H01L23/49866 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/32 , H01L24/73 , H01L25/0655 , H01L25/18 , H01L2224/131 , H01L2224/16227 , H01L2224/16238 , H01L2224/1703 , H01L2224/32225 , H01L2224/73204 , H01L2924/1436 , H01L2924/15192 , H01L2924/15311 , H05K1/0296 , H05K1/0313 , H05K1/09 , H05K1/111 , H05K1/141 , H05K3/16 , H05K3/4007 , H05K2201/0326 , H05K2201/0364 , H05K2201/0391 , H05K2201/0769 , H05K2201/09236 , H05K2201/0929 , H05K2201/094 , H05K2201/09654 , H05K2201/097 , H05K2201/09736 , H05K2201/098 , H01L2924/014
Abstract: A printed wiring board includes an insulation layer, conductive pads formed on the insulation layer and positioned to connect an electronic component, and a conductive wiring pattern including first and second conductive patterns and formed on the insulation layer such that the conductive wiring pattern is extending between the conductive pads. The first pattern includes first wiring lines, the second pattern includes second wiring lines, the first and second conductive patterns are formed such that the first wiring lines and the second wiring lines are alternately arrayed on the insulation layer, each of the first wiring lines includes a first metal layer formed on an interface with the insulation layer, each of the second wiring lines includes a second metal layer formed on an interface with the insulation layer, and the first metal layer includes a metal material which is different from a metal material forming the second metal layer.
Abstract translation: 印刷布线板包括绝缘层，形成在绝缘层上并定位成连接电子部件的导电焊盘和包括第一和第二导电图案并形成在绝缘层上的导电布线图案，使得导电布线图案在 导电垫。 第一图案包括第一布线，第二图案包括第二布线，第一和第二导电图案形成为使得第一布线和第二布线交替排列在绝缘层上，每个第一布线包括 形成在与所述绝缘层的界面上的第一金属层，每个所述第二布线包括形成在与所述绝缘层的界面上的第二金属层，并且所述第一金属层包括与形成金属的金属材料不同的金属材料 第二金属层。
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公开(公告)号：US20130279135A1
公开(公告)日：2013-10-24
申请号：US13863631
申请日：2013-04-16
Applicant: CANON KABUSHIKI KAISHA
Inventor： Hiroshi Isono
IPC: H05K1/18
CPC classification number: H05K1/181 , H01L25/0657 , H01L2224/16225 , H01L2225/06548 , H01L2225/06555 , H01L2924/15174 , H05K1/0228 , H05K1/0231 , H05K1/0243 , H05K1/025 , H05K1/0298 , H05K1/115 , H05K2201/09654 , H05K2201/10545 , H05K2201/10734
Abstract: A printed circuit board includes a first semiconductor package on a first surface layer of a printed wiring board and a second semiconductor package on a second surface layer where a bus signal is transmitted from the first to the second semiconductor package. A first bus wiring path from a signal terminal on an inner circumference side of the first semiconductor package via a via hole and the second surface layer to a signal terminal on an outer circumference side of the second semiconductor package and a second bus wiring path from a signal terminal on an outer circumference side of the first semiconductor package via the second surface layer and a via hole to a signal terminal on an inner circumference side of the second semiconductor package are provided, thus securing a return current path for a signal current and realizing a high density wiring while suppressing radiation noise.
Abstract translation: 印刷电路板包括印刷线路板的第一表面层上的第一半导体封装和第二表面层上的第二半导体封装，其中总线信号从第一半导体封装传输到第二半导体封装。 从第一半导体封装的内周侧的信号端子经由通孔和第二表面层到第二半导体封装的外周侧的信号端子的第一总线布线路径和从第二总线布线路径 提供经由第二表面层的第一半导体封装的外周侧的信号端子和到第二半导体封装的内周侧的信号端子的通孔，从而确保用于信号电流的返回电流路径并实现 高密度布线，同时抑制辐射噪声。
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公开(公告)号：US20170064821A1
公开(公告)日：2017-03-02
申请号：US14840979
申请日：2015-08-31
Applicant: Kristof Darmawikarta , Daniel Sobieski , Kyu Oh Lee , Sri Ranga Sai Boyapati
Inventor： Kristof Darmawikarta , Daniel Sobieski , Kyu Oh Lee , Sri Ranga Sai Boyapati
CPC classification number: H05K1/0298 , H01L23/49822 , H01L23/49838 , H05K1/113 , H05K3/0041 , H05K3/181 , H05K3/188 , H05K3/4038 , H05K3/422 , H05K3/429 , H05K3/4644 , H05K2201/09218 , H05K2201/09372 , H05K2201/095 , H05K2201/096 , H05K2201/09654 , H05K2203/0548
Abstract: Some example forms relate to an electronic package. The electronic package includes a first dielectric layer that includes an electrical trace formed on a surface of the first dielectric layer and a second dielectric layer on the surface of the first dielectric layer. The second dielectric layer includes an opening. The electrical trace is within the opening. The electronic package includes an electrical interconnect that fills the opening and extends above an upper surface of the second dielectric layer such that the electrically interconnect is electrically connected to the electrical trace on the first dielectric layer.
Abstract translation: 一些示例形式涉及电子包装。 电子封装包括第一电介质层，其包括形成在第一电介质层的表面上的电迹线和在第一电介质层的表面上的第二电介质层。 第二电介质层包括开口。 电迹线在开口内。 电子封装包括电互连，其填充开口并且在第二电介质层的上表面上方延伸，使得电互连电连接到第一电介质层上的电迹线。
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公开(公告)号：US20160007466A1
公开(公告)日：2016-01-07
申请号：US14855233
申请日：2015-09-15
Applicant: CANON KABUSHIKI KAISHA
Inventor： Hiroshi Isono
IPC: H05K1/18 , H01L25/065 , H05K1/02 , H05K1/11
CPC classification number: H05K1/181 , H01L25/0657 , H01L2224/16225 , H01L2225/06548 , H01L2225/06555 , H01L2924/15174 , H05K1/0228 , H05K1/0231 , H05K1/0243 , H05K1/025 , H05K1/0298 , H05K1/115 , H05K2201/09654 , H05K2201/10545 , H05K2201/10734
Abstract: A printed circuit board includes a first semiconductor package on a first surface layer of a printed wiring board and a second semiconductor package on a second surface layer where a bus signal is transmitted from the first to the second semiconductor package. A first bus wiring path from a signal terminal on an inner circumference side of the first semiconductor package via a via hole and the second surface layer to a signal terminal on an outer circumference side of the second semiconductor package and a second bus wiring path from a signal terminal on an outer circumference side of the first semiconductor package via the second surface layer and a via hole to a signal terminal on an inner circumference side of the second semiconductor package are provided, thus securing a return current path for a signal current and realizing a high density wiring while suppressing radiation noise.
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公开(公告)号：US09185804B2
公开(公告)日：2015-11-10
申请号：US13863631
申请日：2013-04-16
Applicant: CANON KABUSHIKI KAISHA
Inventor： Hiroshi Isono
CPC classification number: H05K1/181 , H01L25/0657 , H01L2224/16225 , H01L2225/06548 , H01L2225/06555 , H01L2924/15174 , H05K1/0228 , H05K1/0231 , H05K1/0243 , H05K1/025 , H05K1/0298 , H05K1/115 , H05K2201/09654 , H05K2201/10545 , H05K2201/10734
Abstract: A printed circuit board includes a first semiconductor package on a first surface layer of a printed wiring board and a second semiconductor package on a second surface layer where a bus signal is transmitted from the first to the second semiconductor package. A first bus wiring path from a signal terminal on an inner circumference side of the first semiconductor package via a via hole and the second surface layer to a signal terminal on an outer circumference side of the second semiconductor package and a second bus wiring path from a signal terminal on an outer circumference side of the first semiconductor package via the second surface layer and a via hole to a signal terminal on an inner circumference side of the second semiconductor package are provided, thus securing a return current path for a signal current and realizing a high density wiring while suppressing radiation noise.
Abstract translation: 印刷电路板包括印刷线路板的第一表面层上的第一半导体封装和第二表面层上的第二半导体封装，其中总线信号从第一半导体封装传输到第二半导体封装。 从第一半导体封装的内周侧的信号端子经由通孔和第二表面层到第二半导体封装的外周侧的信号端子的第一总线布线路径和从第二总线布线路径 提供经由第二表面层的第一半导体封装的外周侧的信号端子和到第二半导体封装的内周侧的信号端子的通孔，从而确保用于信号电流的返回电流路径并实现 高密度布线，同时抑制辐射噪声。
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