公开(公告)号：US3902165A

公开(公告)日：1975-08-26

申请号：US46528274

申请日：1974-04-29

Applicant: CSELT CENTRO STUDI LAB TELECOM

Inventor： ARTOM AURO

IPC: H04L12/52 ,  H04J3/12

CPC classification number: H04L12/52

Abstract: Several subscriber stations equipped with data terminals, adapted to send out and receive code words at different but harmonically interrelated rates, selectively communicate with one another via at least one central office and assigned PCM channels, each station being linked with its central office through a two-way analog-type signal path which includes an incoming and an outgoing branch terminating in respective baseband modems at the subscriber end and at the central-office end. A memory at the central office stores information relating to the transmission rates and line characteristics of the several signal paths served thereby. Three quarters of each code word are reserved for message bits, the fourth quarter being allocated to service bits. A subscriber wishing to establish a connection transmits, via the associated outgoing branch, to the central office a service code identifying that subscriber; the central office thereupon emits a pair of command signals, based upon the received code and the stored information, to select a matching filter circuit in a compatible equalizer section for insertion in series with that outgoing branch. A confirmation signal from the central office sets a clock circuit at the calling subscriber station to a selected operating speed, less than the fixed transmission rate of that station, preparatorily to the dialing of the number of the called subscriber; upon the establishment of a data link via the central office to the called station, the corresonding clock circuit thereof is synchronized with that of the calling station by a similar code.

公开(公告)号：US3593658A

公开(公告)日：1971-07-20

申请号：US3593658D

申请日：1969-07-01

Applicant: CSELT CENTRO STUDI LAB TELECOM

Inventor： ARTOM AURO

IPC: H04L17/30 ,  B41J5/46

CPC classification number: H04L17/30

Abstract: A teleprinter responsive to binary code combinations includes a continuously rotating font wheel with 51 peripherally equispaced typefaces and, synchronized with it, a reference wheel with 51 peripherally spaced alphanumerical markings respectively assigned to these typefaces and with 9 nonalphanumerical markings interspersed with the former. A sensor generates counting pulses in response to successive markings and steps a binary counter whose setting is fed to a comparator also receiving code combinations or ''''words'''' stored in a register in response to incoming message signals. Upon detecting a match, the comparator trips a striker successively confronted by the typefaces of the font wheel, operation of this striker being inhibited during periods in which counting pulses are generated by nonalphanumerical markings.

公开(公告)号：US3914553A

公开(公告)日：1975-10-21

申请号：US50861274

申请日：1974-09-23

Applicant: CSELT CENTRO STUDI LAB TELECOM

Inventor： MELINDO FLAVIO ,  PERUCCA GIOVANNI

IPC: H04Q11/04 ,  H04J3/00

CPC classification number: H04Q11/04

Abstract: A PCM/TDM terminal has m parallel receiving lines and m parallel transmitting lines for recurrent sequences of n words, of m bits each, originating at or destined for n channels connectable to that terminal by way of two alternately operating conversion units. Each conversion unit comprises an orthogonal matrix of m.n register stages for individual bits, divided into m columns and n rows, the first unit communicating with the channels while the second unit communicates with the terminal and vice versa. In an alternation of switching phases whose duration equals the time period occupied by an m-bit word serially arriving or departing over any channel, the unit communicating with the channels has its n row inputs and its n row outputs respectively connected to the incoming and outgoing channel branches while the unit communicating with the terminal has its m column inputs and its m column outputs respectively connected to the transmitting and receiving terminal lines. Thus, in a first phase the first unit stores in its n rows the bits of as many words arriving over the incoming channel branches and, simultaneously, reads out to the outgoing channel branches the bits of n words previously receiving from the terminal; at the same time the second unit stores in its m columns the bits of n successive words coming from the terminal and reads out to the terminal the bits of as many words previously fed in by the channels. In a second phase the roles of the two units are reversed.

Abstract translation: PCM / TDM终端具有m个并行接收线和m个并行发送线，用于n个字的复现序列，每个m个位，每个m个位，通过两个交替操作的转换单元发起或发往可连接到该终端的n个通道。 每个转换单元包括用于各个位的m.n个寄存器级的正交矩阵，分成m列和n行，第一单元与通道通信，而第二单元与终端通信，反之亦然。 在交替相位的交替阶段，其持续时间等于通过任何通道串行到达或离开的m位字所占据的时间段，与信道通信的单元具有其n行输入，并且其n行输出分别连接到输入和输出 信道分支，而与终端通信的单元具有其m列输入，并且其m列输出分别连接到发送和接收终端线路。 因此，在第一阶段中，第一单元在其n行存储通过输入信道到达的多个字的位分支，并同时读出输出信道，分支从终端先前接收的n个字的位; 同时，第二单元在其m列中存储来自终端的n个连续字的位，并且向终端读出先前由信道馈送的多个字的位。 在第二阶段，两个单位的角色相反。

公开(公告)号：US3887798A

公开(公告)日：1975-06-03

申请号：US42513273

申请日：1973-12-17

Applicant: CSELT CENTRO STUDI LAB TELECOM

Inventor： DEVINCENTIIS GIROLAMO ,  LUVISON ANGELO

IPC: G06F1/025 ,  H03K13/24

CPC classification number: G06F1/0255

Abstract: To generate pulse trains corresponding to the binary representation of numbers in the so-called Walsh code, the numbers ranging from 1 to m-1 where m 2k 1, a logic network RC1 with k+1 inputs and m outputs converts a selected binary number into the equivalent Walsh function whose bits are stored on associate flip-flops 501 - 516 forming respective stages of a dynamic memory. Another logic network RC2 determines the highestranking finite bit (1) of the selected binary number and, according to the rank thereof, selects one of k+1 subharmonically related pulse frequencies in the output of a frequency divider to step the dynamic memory at a cadence corresponding to that rank and to read out in series the contents of a corresponding number of pairs of memory stages, representing the stored Walsh function, the read-out recurring continuously until the next selection as the stored bits are recirculated in the memory 501 516.

Abstract translation: 为了产生对应于所谓的沃尔什码中的数字的二进制表示的脉冲串，从1到m-1的数字，其中m = 2k + 1，具有k + 1个输入和m个输出的逻辑网络RC1转换 将选择的二进制数转换成等效的沃尔什函数，其比特存储在形成动态存储器的各个阶段的关联触发器501-516上。 另一个逻辑网络RC2确定所选二进制数的最高排位有限位（1），并且根据其等级，在分频器的输出中选择k + 1次谐波相关的脉冲频率中的一个，以将动态存储器 与该等级对应的节奏，并连续地读出表示所存储的沃尔什函数的相应数量的存储器级对的内容，连续读出循环，直到下一个选择作为存储的比特在存储器501中再循环 - 516。

公开(公告)号：US3922497A

公开(公告)日：1975-11-25

申请号：US45354674

申请日：1974-03-21

Applicant: CSELT CENTRO STUDI LAB TELECOM

Inventor： ARTOM AURO ,  DEMICHELIS CARLO

IPC: H04M11/06 ,  H04Q11/04 ,  H04J3/00

CPC classification number: H04Q11/04 ,  H04M11/06

Abstract: To enable selective voice communication and data transmission between calling and called subscribers of a PCM telephone network served by a central office, the latter includes a processor which intervenes during data transmission but is bypassed during voice communication while preserving the information required for instantaneous resumption of data transmission. The processor includes two buffer registers MCD1, MCD2 for incoming and outgoing message signals and two service registers MS1, MS2 for ancillary information, each register having a multiplicity of stages which are allocated to respective channels of a PCM frame and are scanned simultaneously with corresponding stages of the other registers. Calling and called subscribers are assigned separate line links giving access to respective channels via corresponding register stages, with transfer of message signals from a stage of register MCD1 (temporarily assigned to one subscriber) to a stage of register MCD2 (temporarily assigned to the other subscriber) under the control of a programmer during data transmission. This transfer is discontinued during voice communication while the contents of the associated stages of the service registers MS1, MS2 remain intact.

Abstract translation: 为了实现由中央局服务的PCM电话网络的呼叫和被叫用户之间的选择性语音通信和数据传输，后者包括在数据传输期间干预但在语音通信期间被旁路的处理器，同时保留瞬时恢复数据所需的信息 传输。 该处理器包括两个用于输入和输出消息信号的缓冲寄存器MCD1，MCD2和用于辅助信息的两个服务寄存器MS1，MS2，每个寄存器具有分配给PCM帧的相应通道的多个级并且与相应级同时扫描 的其他寄存器。 呼叫和被叫用户被分配单独的线路链路，通过相应的寄存器阶段访问相应的信道，并将消息信号从寄存器MCD1（临时分配给一个用户）的级传送到寄存器MCD2的级（暂时分配给另一个用户 ）在数据传输期间由程序员控制。 在语音通信期间中止该传输，而服务寄存器MS1，MS2的相关级的内容保持不变。

公开(公告)号：US3914695A

公开(公告)日：1975-10-21

申请号：US48699974

申请日：1974-07-10

Applicant: CSELT CENTRO STUDI LAB TELECOM

Inventor： GIUSTO PIETRO PORZIO

IPC: H04L27/20 ,  H04B1/04

CPC classification number: H04L27/2071

Abstract: A binary data stream of cadence f to be transmitted by PSK (phase-shift keying) modulation is split into two pulse sequences, composed of alternate bits of that data stream, which are translated into 180* phase shifts of respective sinusoidal carrier waves in quadrature with each other, the frequency f of the two carrier waves being the reciprocal of the pulse width 2/f of the two pulse sequences in a specific instance. A pair of interleaved trains of trigger pulses, each coinciding with the zero crossings of a respective carrier wave, enable the operation of associated phase shifters - in response to amplitude changes of the respective pulse sequences - only at a peak of a carrier wave in trailing position or at a zero crossing of a carrier wave in leading position, thereby minimizing the amplitude excursions occurring upon a subsequent passage of the combined carrier waves through a band-pass filter or other network of limited bandwidth.

Abstract translation: 要通过PSK（相移键控）调制发送的节奏f的二进制数据流被分为由数据流的交替位组成的两个脉冲序列，它们被转换成相位正交载波的180度相移 彼此之间，两个载波的频率f是特定情况下两个脉冲序列的脉冲宽度2 / f的倒数。 触发脉冲的一对交错列，每一个与相应载波的过零点相重合，使得相关联的移相器能够响应于相应脉冲序列的幅度变化而仅在后沿中的载波的峰值处操作 位置或在前导位置处的载波的零交叉处，从而最小化在组合的载波通过带通滤波器或其他有限带宽的网络的后续通过时发生的振幅偏移。

公开(公告)号：JP2001053735A

公开(公告)日：2001-02-23

申请号：JP2000188108

申请日：2000-06-22

Applicant: CSELT CENTRO STUDI LAB TELECOM

Inventor： BONELLO ROBERTO ,  DA DALT NICOLA ,  MOSCA PAOLO ,  NERVO GIACOLINO ,  QUASSO ROBERTO

IPC: H03L7/06 ,  H04J3/06 ,  H04L7/00 ,  H04L7/033 ,  H04L12/56

Abstract: PROBLEM TO BE SOLVED: To obtain a mechanism capable of efficiently and surely operating band width of extremely wide frequency without imposing any synchronization constraint to a data channel to be transmitted. SOLUTION: Input (3) and output (4) are included in a memory (2) for storage of data, the data is inputted as an input data (Pin) stream under control of an input timing signal (XIN) in the input (3) and the data stored in the memory (2) is read as output data (Pout) under control of a reconstruction timing signal (XOUT) from the output (4). The input timing signal (XIN) is used as an input signal and a corresponding output signal (XOUT) with locked phase is generated by a phase locked loop (7). The reconstruction timing signal is obtained from the output signal of the phase locked loop output 7. A means (8) to measure drift transfer of the remaining phase is provided and affects to a transmission functional band of the phase of the phase locked loop output (7) (23, 9, 10). The means is preferable without using any ring filter.

公开(公告)号：JP2000183734A

公开(公告)日：2000-06-30

申请号：JP35030499

申请日：1999-12-09

Applicant: CSELT CENTRO STUDI LAB TELECOM

Inventor： BALISTRERI EMANUELE ,  BURZIO MARCO

IPC: H03L7/099 ,  H03L7/10 ,  H03L7/107

Abstract: PROBLEM TO BE SOLVED: To provide a phase locked loop that is configured to be in operation according to a plurality of characteristics flexibly with high reliability over a sufficiently wide frequency range. SOLUTION: The phase locked loop includes an input comparator 2 that generates a deviation signal, and the deviation signal is used to drive an oscillator 5 to generate an output signal (CLKOUT) locked to an input signal. The oscillator 5 is operated according to a plurality of characteristics under the control of a control means 8 including a search means. The search means executes a 1st search stage for a characteristic group where an operation of the oscillator 5 is allowed by scanning the range that can gradually be reduced according to a general binary search procedure. When the 1st search step is finished, other fine search means identifies an optimum operating point to automatically compensate the fluctuation that may be possible.

公开(公告)号：JP2000155406A

公开(公告)日：2000-06-06

申请号：JP24865399

申请日：1999-09-02

Applicant: CSELT CENTRO STUDI LAB TELECOM

Inventor： ARDITO MARCO ,  MENEGHINI GIANCARLO

IPC: H01L21/306 ,  C03C15/00 ,  G02B5/18 ,  G03F1/00 ,  G03F1/08

Abstract: PROBLEM TO BE SOLVED: To etch the surface of quartz glass with good precision. SOLUTION: A layer 2 of an electrically conductive material is deposited on a quartz glass substrate 1 with a surface to be etched. A pattern that copies an etching pattern to be formed on the surface of the substrate 1 is formed on the electrically conductive material layer 2 by depositing a resist 3 on the layer 2 and exposing and developing the resist 3 to disclose a region of the layer 2 corresponding to the region of the substrate 1 to be etched. A material such as titanium is selected as the electrically conductive material and it is etched with the same etching medium as that used for etching the substrate 1, e.g. CHF3. The removal of the electrically conductive layer 2 and the etching of the substrate 1 in the region not convered with the resist are then carried out in a single step.

公开(公告)号：JP2000113217A

公开(公告)日：2000-04-21

申请号：JP27936999

申请日：1999-09-30

Applicant: CSELT CENTRO STUDI LAB TELECOM

Inventor： FRANCINI GIANLUCA ,  QUAGLIA MAURO

IPC: G06T11/00 ,  G06T15/04 ,  G06T17/10 ,  G06T17/20 ,  G06T17/00

Abstract: PROBLEM TO BE SOLVED: To provide a method capable of producing a face model with reality in both a still state and an animation state. SOLUTION: This method is capable of producing a 3D face model and being used, for instance, for the realization of an incarnation (avatar), video communication use, a video game, video production and the production of an advanced man-machine interface. At least one human facial image is given together with a 3D face model M having a summit structure. The 3D face model M includes several surfaces selected from a set consisting of a face surface V, a right eye surface OD, a left eye surface OS, an upper teeth surface DS and a lower teeth surface DI. A set of corresponding points among vertexes of the model M surface and a set of corresponding points on at least one facial image are respectively selected. Next, the model structure M is corrected so that the respective sets of the corresponding points can be coincided with each other.