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公开(公告)号:US6444490B2
公开(公告)日:2002-09-03
申请号:US89470601
申请日:2001-06-28
Applicant: IBM
IPC: H01L23/495 , H01L23/498 , H01L25/065 , H05K1/02 , H01L21/44
CPC classification number: H01L23/49816 , H01L23/49524 , H01L23/49531 , H01L24/45 , H01L24/48 , H01L25/0657 , H01L2224/16 , H01L2224/451 , H01L2224/48091 , H01L2224/4824 , H01L2224/73204 , H01L2225/06517 , H01L2225/06527 , H01L2225/06551 , H01L2225/06579 , H01L2924/00013 , H01L2924/01079 , H01L2924/07811 , H01L2924/10253 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19107 , H01L2924/30107 , H01L2924/3011 , H05K1/0228 , H01L2924/00014 , H01L2224/29099 , H01L2924/00 , H01L2924/00012
Abstract: Thin-film microflex twisted-wire pair and other connectors are disclosed. Semiconductor packages include microflex technology that electrically connects at least one chip to another level of packaging. Microflex connectors, such as thin-film twisted-wire pair connectors according to the present invention provide superior electrical performance, which includes reduced line inductance, incorporation of integrated passive components, and attachment of discrete passive and active components to the microflex. All of these features enable operation of the chip at increased frequencies.
Abstract translation: 公开了薄膜微纤维双绞线对和其它连接器。 半导体封装包括将至少一个芯片电连接到另一层封装的微技术技术。 根据本发明的诸如薄膜双绞线对连接器的Microflex连接器提供优异的电气性能,其包括降低的线路电感,集成的无源部件的结合以及将离散的被动和有源部件附接到微反射镜。 所有这些特性使芯片在频率增加的情况下能够运行。
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公开(公告)号:JP2000156461A
公开(公告)日:2000-06-06
申请号:JP15140999
申请日:1999-05-31
Applicant: IBM
Inventor: BERTIN CLAUDE L , FERENCE THOMAS GEORGE , WAYNE JOHN HOWEL , SPROGIS EDMUND J
IPC: H01L25/18 , H01L23/538 , H01L25/065 , H01L25/07
Abstract: PROBLEM TO BE SOLVED: To individually set a chip and to achieve a compact semiconductor package with a high-integration technique by equipping a plurality of independent chips that are electrically connected and function completely and chip-on- chip part connection/interconnection for electrically connecting the chips to an external circuit. SOLUTION: Chip-on-chip parts 10 include a first chip 30, a second chip 40, and chip-on-chip part connection 20. An active region 35 of the first chip 30 is electrically connected to an active region 45 of the second chip 40 via solder ball connection 50 or electrical connection between chips. Also, the chip- on-chip part connection 20 is a solder column 22 that is connected to the first chip 30, and the solder column 22 can connect the chip-on-chip parts 10 to an external circuit via a substrate, thus achieving a reliable, compact semiconductor package with high-integration technique and at the same time improving thermal performance.
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公开(公告)号:DE69332196D1
公开(公告)日:2002-09-19
申请号:DE69332196
申请日:1993-03-22
Applicant: IBM
Inventor: FERENCE THOMAS GEORGE , GRUBER PETER ALFRED , HERNANDEZ BERNARDO , PALMER MICHAEL JOHN , ZINGHER ARTHUR RICHARD
Abstract: An apparatus and method are described for injection molding solder mounds onto electronic devices. The apparatus has a reservoir (46) for molten solder which is disposed over a cavity in an injection plate (34). The injection plate is disposed over a mold (32) having an array of cavities therein into which solder is injection molded. The mold is disposed over a workpiece (50), such as a semiconductor chip or a semiconductor chip packaging substrate. The cavities in the mold are aligned with electrical contact locations on the chip or substrate. The workpiece is heated and the molten solder is forced under gas pressure into the cavity (68) in the injection plate (34) disposed above the array of cavities in the mold. The molten solder is forced into the array of cavities in the mold. The injection plate (34) is advanced to slide over the mold to wipe away the excess solder above the mold at a plurality of wiping apertures in the injection plate. The injection plate is further advanced to a location having a nonsolder wettable surface at which location the injection plate is removed. The mold is then removed to leave solder mounds disposed on the workpiece. The workpiece can be a semiconductor chip, a semiconductor chip packaging substrate or a dummy substrate onto which the injected molded solder adheres such as a polymer layer to form a carrier substrate for a solder mound array which can be subsequently transferred to a substrate such as a semiconductor chip or a semiconductor chip packaging substrate. The apparatus and methods of the present invention can be integrated into an automated manufacturing system for depositing an array of solder mounds onto a substrates.
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公开(公告)号:DE69332196T2
公开(公告)日:2003-05-15
申请号:DE69332196
申请日:1993-03-22
Applicant: IBM
Inventor: FERENCE THOMAS GEORGE , GRUBER PETER ALFRED , HERNANDEZ BERNARDO , PALMER MICHAEL JOHN , ZINGHER ARTHUR RICHARD
Abstract: An apparatus and method are described for injection molding solder mounds onto electronic devices. The apparatus has a reservoir (46) for molten solder which is disposed over a cavity in an injection plate (34). The injection plate is disposed over a mold (32) having an array of cavities therein into which solder is injection molded. The mold is disposed over a workpiece (50), such as a semiconductor chip or a semiconductor chip packaging substrate. The cavities in the mold are aligned with electrical contact locations on the chip or substrate. The workpiece is heated and the molten solder is forced under gas pressure into the cavity (68) in the injection plate (34) disposed above the array of cavities in the mold. The molten solder is forced into the array of cavities in the mold. The injection plate (34) is advanced to slide over the mold to wipe away the excess solder above the mold at a plurality of wiping apertures in the injection plate. The injection plate is further advanced to a location having a nonsolder wettable surface at which location the injection plate is removed. The mold is then removed to leave solder mounds disposed on the workpiece. The workpiece can be a semiconductor chip, a semiconductor chip packaging substrate or a dummy substrate onto which the injected molded solder adheres such as a polymer layer to form a carrier substrate for a solder mound array which can be subsequently transferred to a substrate such as a semiconductor chip or a semiconductor chip packaging substrate. The apparatus and methods of the present invention can be integrated into an automated manufacturing system for depositing an array of solder mounds onto a substrates.
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