公开(公告)号：EP1366512A4

公开(公告)日：2009-07-08

申请号：EP01987440

申请日：2001-12-19

Applicant: IBM

Inventor： WALKER GEORGE F ,  GOLDBLATT RONALD D ,  GRUBER PETER A ,  HORTON RAYMOND R ,  PETRARCA KEVIN S ,  VOLANT RICHARD P ,  CHENG TIEN-JEN

IPC: H01L23/52 ,  H01L21/3205 ,  H01L21/60 ,  H01L23/485 ,  H01L21/44 ,  H01L23/48

CPC classification number: H01L24/48 ,  H01L21/76865 ,  H01L21/76873 ,  H01L21/76879 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/45 ,  H01L24/85 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05083 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05169 ,  H01L2224/05181 ,  H01L2224/05556 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/11912 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13116 ,  H01L2224/16 ,  H01L2224/45144 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/48644 ,  H01L2224/48664 ,  H01L2224/48669 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2924/0001 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/00015 ,  H01L2924/00012

Abstract: A process is described for forming a common input-output (I/O) site that is suitable for both wire-bond and solder bump flip chip connections, such as controlled-collapse chip connections (C4). The present invention is particularly suited to semiconductor chips that use copper as the interconnection material, in which the soft dielectrics used in manufacturing such chips are susceptible to damage due to bonding forces. The present invention reduces the risk of damage by providing site having a noble metal on the top surface of the pad, while providing a diffusion barrier to maintain the high conductivity of the metal interconnects. Process steps for forming an I/O site within a substrate are reduced by providing a method for selectively depositing metal layers in a feature formed in the substrate. Since the I/O sites of the present invention may be used for either wire-bond or solder bump connections, this provides increased flexibility for chip interconnection options, while also reducing process costs.

Abstract translation: 描述了用于形成适用于引线键合和焊料凸点倒装芯片连接（例如可控塌陷芯片连接（C4））的公共输入 - 输出（I / O）位置的过程。 本发明特别适用于使用铜作为互连材料的半导体芯片，其中用于制造这种芯片的软电介质容易因结合力而损坏。 本发明通过在衬垫的顶表面上提供具有贵金属的部位，同时提供扩散阻挡层以维持金属互连的高导电性，从而降低了损坏的风险。 通过提供在衬底中形成的特征中选择性地沉积金属层的方法来减少用于在衬底内形成I / O部位的工艺步骤。 由于本发明的I / O站点可以用于引线键合或焊料凸点连接，这为芯片互连选项提供了增加的灵活性，同时还降低了工艺成本。

公开(公告)号：JPH10308465A

公开(公告)日：1998-11-17

申请号：JP10919398

申请日：1998-04-20

Applicant: IBM

Inventor： JAMES HOWARD COVELL II ,  LANIE R BOLDE ,  DAVID LYN EDWARDS ,  LUIS SIGMUND GOLDMAN ,  GRUBER PETER A ,  HILTON T TOY

IPC: H01L23/02 ,  H01L23/10

Abstract: PROBLEM TO BE SOLVED: To enable a semiconductor substrate to be hermetically sealed up in a cap whose thermal expansion coefficient is different from that of the substrate by a method wherein a first thin solder interconnection layer is restrained from reflowing on a high-melting thick solder wall so as to enable a solder seal band to retain its layered structure. SOLUTION: A solder seal 23 is joined to a substrate 10 with a thin solder interconnection layer 41 formed on the substrate 10 and a thick solder wall 43 cast on a cap 20. The thick solder wall 43 is set different in chemical composition from the thin solder interconnection layer 41 so as to have a higher melting point than the thin solder interconnection layer 41. By this setup, the interconnection layer 41 can be reflowed so as to mount the cap 20 on the substrate 10 without melting or deflecting the thick wall 43. Therefore, a solder seal of this constitution is capable of coping with a case that a gap between a cap and a substrate is a few times as large as usual.

公开(公告)号：WO2011102929A3

公开(公告)日：2012-02-02

申请号：PCT/US2011021626

申请日：2011-01-19

Applicant: IBM ,  GRUBER PETER A ,  LAURO PAUL A ,  NAH JAE-WOONG

Inventor： GRUBER PETER A ,  LAURO PAUL A ,  NAH JAE-WOONG

IPC: H01L21/3205

CPC classification number: H05K3/3452 ,  H01L21/4853 ,  H01L23/3157 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/742 ,  H01L2224/0401 ,  H01L2224/05647 ,  H01L2224/10145 ,  H01L2224/1131 ,  H01L2224/11472 ,  H01L2224/1148 ,  H01L2224/11849 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/1403 ,  H01L2224/742 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01042 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/3468 ,  H05K2201/09036 ,  H05K2201/09827 ,  H05K2201/09845 ,  H05K2203/0126 ,  H05K2203/043 ,  H05K2203/0557 ,  H05K2203/0594 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A substrate comprising a plurality of wet-able pads formed on a surface of the substrate; and a solder resist layer deposited on the surface of the substrate is obtained. At least the solder resist layer is formed with recessed regions defining volumes adjacent the wet- able pads. Molten solder is directly injected into the volumes adjacent the wet-able pads, such that the volumes adjacent the wet-able pads are filled with solder and the solder solidifies forming a plurality of solder structures adhered to the wet-able pads. The substrate and the solder are re-heated after the solidification, to re-flow the solder into generally spherical balls extending above the outer surface of the solder resist layer. In an alternative approach, solder injection and solidification are carried out in a nitrogen environment or a forming gas environment, and the reflow step may be omitted.

Abstract translation: 一种衬底，包括形成在所述衬底的表面上的多个可湿性焊盘; 并且获得沉积在基板表面上的阻焊层。 至少阻焊层形成有限定与湿润垫相邻的体积的凹陷区域。 将熔融的焊料直接注入到与可湿性焊盘相邻的体积中，使得与可湿性焊盘相邻的体积被焊料填充，并且焊料固化形成粘附到湿润焊盘的多个焊料结构。 在固化之后，将基板和焊料重新加热，以将焊料重新流入延伸到阻焊层的外表面之上的大致球形的球体。 在替代方法中，焊料注入和凝固在氮气环境或形成气体环境中进行，并且可以省略回流步骤。

公开(公告)号：DE69015491T2

公开(公告)日：1995-07-20

申请号：DE69015491

申请日：1990-06-16

Applicant: IBM

Inventor： BOOTH RICHARD B ,  GRUBE GARY W ,  GRUBER PETER A ,  KHANDROS IGOR Y ,  ZINGHER ARTHUR R

IPC: H05K7/20 ,  B22F1/02 ,  B23K35/20 ,  B23K35/22 ,  B23K35/26 ,  C22C1/02 ,  H01L23/36 ,  H01L23/373

Abstract: A liquid metal matrix thermal paste comprises a dispersion of non-reacting thermally conductive particles (12) in a low melting temperature liquid metal matrix (14). The particles preferably are silicon, molybdenum, tungsten or other materials which do not react with gallium at temperatures below approximately 100 DEG C. The preferred liquid metals are gallium and indium eutectic, gallium and tin eutectic and gallium, indium and tin ternary, eutectic. The particles (12) may be coated with a noble metal to minimize surface oxidation and enhance wettability of the particles. The liquid metal matrix thermal paste is used as a high thermally conducting paste in cooling high power dissipation components in conjunction with a conventional fluid cooling system.

公开(公告)号：DE69015491D1

公开(公告)日：1995-02-09

申请号：DE69015491

申请日：1990-06-16

Applicant: IBM

Inventor： BOOTH RICHARD B ,  GRUBE GARY W ,  GRUBER PETER A ,  KHANDROS IGOR Y ,  ZINGHER ARTHUR R

IPC: H05K7/20 ,  B22F1/02 ,  B23K35/20 ,  B23K35/22 ,  B23K35/26 ,  C22C1/02 ,  H01L23/36 ,  H01L23/373

Abstract: A liquid metal matrix thermal paste comprises a dispersion of non-reacting thermally conductive particles (12) in a low melting temperature liquid metal matrix (14). The particles preferably are silicon, molybdenum, tungsten or other materials which do not react with gallium at temperatures below approximately 100 DEG C. The preferred liquid metals are gallium and indium eutectic, gallium and tin eutectic and gallium, indium and tin ternary, eutectic. The particles (12) may be coated with a noble metal to minimize surface oxidation and enhance wettability of the particles. The liquid metal matrix thermal paste is used as a high thermally conducting paste in cooling high power dissipation components in conjunction with a conventional fluid cooling system.

公开(公告)号：CA2018930A1

公开(公告)日：1991-02-08

申请号：CA2018930

申请日：1990-06-13

Applicant: IBM

Inventor： BOOTH RICHARD B ,  GRUBE GARY W ,  GRUBER PETER A ,  KHANDROS IGOR Y ,  ZINGHER ARTHUR R

IPC: H05K7/20 ,  B22F1/02 ,  B23K35/20 ,  B23K35/22 ,  B23K35/26 ,  C22C1/02 ,  H01L23/36 ,  H01L23/373

Abstract: A liquid metal matrix thermal paste comprises a dispersion of non-reacting thermally conductive particles (12) in a low melting temperature liquid metal matrix (14). The particles preferably are silicon, molybdenum, tungsten or other materials which do not react with gallium at temperatures below approximately 100 DEG C. The preferred liquid metals are gallium and indium eutectic, gallium and tin eutectic and gallium, indium and tin ternary, eutectic. The particles (12) may be coated with a noble metal to minimize surface oxidation and enhance wettability of the particles. The liquid metal matrix thermal paste is used as a high thermally conducting paste in cooling high power dissipation components in conjunction with a conventional fluid cooling system.