公开(公告)号：MY169590A

公开(公告)日：2019-04-22

申请号：MYPI2010700005

申请日：2010-02-02

Applicant: MIMOS BERHAD

Inventor： DANIEL BIEN CHIA SHENG ,  AZLINA MOHD ZAIN ,  LEE HING WAH

Abstract: The present invention describes a novel method of fabricating nano-resistors (22) which allows full integration with standard CMOS fabrication process. The resistor comprises long and thin nano-structures as resistive element. It is formed by conductive nano-spacers (18B) using oxide (16) as mould on insulating layer. An embodiment of such structure is polysilicon nano-structures doped or implanted with n-type or p-type ions (20) to improve material conductance. The electrical properties of the device will change with respect to the dimension of these nano-structures. Resistors with polysilicon nano-structures down to 10 nm can be produced with resulting measured resistance in the MOhm scale.

公开(公告)号：MY181531A

公开(公告)日：2020-12-25

申请号：MYPI2013700121

申请日：2013-01-18

Applicant: MIMOS BERHAD

Inventor： MOHAMMAD FAIRUZ AMIR ,  MAZLIN MAN ,  MUHAMMAD RAMDZAN BUYONG ,  SHARAIFAH KAMARIAH WAN SABLI ,  AZLINA MOHD ZAIN

Abstract: In fabricating a bond pad in a semiconductor device, the silicon nitride and silicon dioxide layers are separately etched using fluorine-based plasma in a reactive ion etching process chamber. Each layer?s recipe is customized, instead of using the same recipe or parameters for both layers as conventionally practiced, so that the initial undercut structure is prevented from forming and growing into the undesirable trench on the surface of the nitride layer. Next, solvent cleaning process is done after the etching so that the unwanted polymers formed during the etching may be removed. The remaining photoresist is then removed using a microwave oxygen plasma ashing method. The last layer, TiN ARC, is then removed using a chlorine-based plasma in a reactive ion etch process chamber. Finally, the exposed metal bond pad surface is cleaned with a solvent-free cleaning agent to remove the unwanted residues and by-products from the TiN ARC etching to avoid pitting corrosion of the metal surface. Most illustrative drawing: FIGURE 5

公开(公告)号：MY173981A

公开(公告)日：2020-03-02

申请号：MYPI2010700033

申请日：2010-05-26

Applicant: MIMOS BERHAD

Inventor： MUHAMAD RAMDZAN BUYONG ,  MOHSEN NABIPOOR ,  DANIEL BIEN CHIA SHENG ,  AZLINA MOHD ZAIN ,  SITI AISHAH MOHAMAD BAHARUDDIN ,  RAHIMAH MOHD SAMAN ,  ABDUL GHANI OTHAMAN

Abstract: A novel humidity sensor is described. The capacitive humidity sensor comprises at least two pairs of electrode contact pads (24) spaced apart; and a moisture sensitive film (26) formed around the electrode contact pads. The sensor is characterized in that, at least a pair of metals (28) connect the electrode contact pads to form a pair of 1-shaped electrodes of a capacitor, wherein the capacitance measured changes according to humidity. Another sensor embodiment can be formed with contact pads exposed at two side of the moisture sensitive film. A method of fabricating the sensor is also described.

公开(公告)号：MY185758A

公开(公告)日：2021-06-04

申请号：MYUI2012700426

申请日：2012-07-02

Applicant: MIMOS BERHAD

Inventor： DANIEL BIEN CHIA SHENG ,  TEH AUN SHIH ,  MUHAMAD RAMDZAN BUYONG ,  AZLINA MOHD ZAIN

IPC: G01N27/12

Abstract: A method of fabricating a gas sensor with a conductive sensing element on a microhotplate (102) is provided, the method includes the steps of fabricating a microhotplate (102) on silicon, fabricating a nanostructured sensor on the microhotplate (102) by growing of conductive nanotubes (110) or nanowires with metal catalyst and functionalising the conductive nanotubes or nanowires, wherein step the nanotubes (110) or nanowires are functionalised with metal oxides selected from a group consisting and not limited to tin oxide (SnO2), tungsten oxide (WOx), tantalum pent-oxide (Ta2O5), aluminium oxide (Al2O3) copper oxide (CuO), iron oxide (Fe2O3), titanium oxide (TiO), Neodymium Oxide (Nd2O3) and zinc oxide (ZnO). (Figure 2)

公开(公告)号：MY178129A

公开(公告)日：2020-10-05

申请号：MYPI2010700079

申请日：2010-10-29

Applicant: MIMOS BERHAD

Inventor： DANIEL BIEN CHIA SHENG ,  RAHIMAH MOHD SAMAN ,  SITI AISHAH MOHAMAD BADARUDDIN ,  AZLINA MOHD ZAIN ,  MUHAMAD RAMDZAN BUYONG ,  MOHAMAD FAIRUZ AMIR

Abstract: The present invention provides an ISFET sensor device and a method to fabricate the ISFET sensor device with nanostructured membrane which will improve the sensitivity and efficiency of the device. The nanostructures can be in unlimited shape or design, in the form of nanowires, nanorings or nanoparticles, fabricated with the function to increase the sensor sensitivity by increasing the surface area of the membrane exposed to the sample solution or electrolyte. The nanostructured membrane can be formed either by nanofabrication techniques which includes lithographic patterning, pattern transfer, thin film deposition and etching methods or by spin coating of nanomaterials and nanowires using various materials, not limited to, such as, Si3N4 [32], polysilicon [34] and metallic nanowires.

公开(公告)号：MY170998A

公开(公告)日：2019-09-23

申请号：MYPI20085246

申请日：2008-12-23

Applicant: MIMOS BERHAD

Inventor： MUHAMAD RAMDZAN BUYONG ,  AZLINA MOHD ZAIN ,  SITI AISHAH MOHAMAD BADARUDDIN ,  MOHD ISMAHADI SYONO ,  LEE HING WAH

Abstract: The present invention provides a valveless micropump (100) comprises an inlet (110) and. an outlet ( 112); a reservoir (120) positioned between the inlet ( 110) and the outlet (112), the reservoir (120) having a chamber (130) defined therein, and the inlet (110) and the outlet (112) having a fluid communication with the chamber (130) through a respective diffuser (106, 108) serving as the valveless feature; and a fluid driving means defines at the reservoir (120), the fluid driving means operably drives fluid from the inlet (100) to the outlet (112) through the diffuser (106), the chamber (130) and the diffuser (108) accordingly.

公开(公告)号：WO2013154417A3

公开(公告)日：2013-10-17

申请号：PCT/MY2013/000075

申请日：2013-04-08

Applicant: MIMOS BERHAD

Inventor： DANIEL BIEN CHIA SHENG ,  AZLINA MOHD ZAIN ,  SITI AISHAH MOHAMAD BADARUDDIN

IPC: H01L29/06 ,  C30B29/06 ,  C30B29/60 ,  C30B33/00

Abstract: The present invention relates to a method for use in fabrication of silicon dioxide nanowires, which does not require any form metal catalyst or conventional high resolution lithography. The method comprises the steps of providing a silicon based substrate (100); forming, silicon based nanostructures (200) on an insulating material and forming silicon dioxide nanowires by selective oxidation process (300); wherein the silicon based nanostructures (200) are formed on the sidewall of said insulating material; and wherein the selective oxidation process (300) includes the step of thermally oxidizing silicon nanostructures.

公开(公告)号：WO2013154417A2

公开(公告)日：2013-10-17

申请号：PCT/MY2013000075

申请日：2013-04-08

Applicant: MIMOS BERHAD

Inventor： DANIEL BIEN CHIA SHENG ,  AZLINA MOHD ZAIN ,  SITI AISHAH MOHAMAD BADARUDDIN

IPC: H01L29/06

CPC classification number: C30B29/06 ,  B82Y40/00 ,  C30B29/60 ,  C30B33/005

Abstract: The present invention relates to a method for use in fabrication of silicon dioxide nanowires, which does not require any form metal catalyst or conventional high resolution lithography. The method comprises the steps of providing a silicon based substrate (100); forming, silicon based nanostructures (200) on an insulating material and forming silicon dioxide nanowires by selective oxidation process (300); wherein the silicon based nanostructures (200) are formed on the sidewall of said insulating material; and wherein the selective oxidation process (300) includes the step of thermally oxidizing silicon nanostructures.

Abstract translation: 本发明涉及一种用于制造二氧化硅纳米线的方法，其不需要任何形式的金属催化剂或常规的高分辨率光刻技术。 该方法包括以下步骤：提供硅基衬底（100）; 在绝缘材料上形成硅基纳米结构（200）并通过选择性氧化工艺形成二氧化硅纳米线（300）; 其中所述硅基纳米结构（200）形成在所述绝缘材料的侧壁上; 并且其中所述选择氧化工艺（300）包括热氧化硅纳米结构的步骤。

公开(公告)号：WO2011096790A3

公开(公告)日：2011-11-10

申请号：PCT/MY2010000317

申请日：2010-12-13

Applicant: MIMOS BERHAD ,  BIEN CHIA SHENG DANIEL ,  AZLINA MOHD ZAIN ,  LEE HING WAH

Inventor： BIEN CHIA SHENG DANIEL ,  AZLINA MOHD ZAIN ,  LEE HING WAH

IPC: H01L27/04

CPC classification number: H01L27/0802

Abstract: The present invention describes a novel method of fabricating nano-resistors (22) which allows full integration with standard CMOS fabrication process. The resistor comprises long and thin nano-structures as resistive element. It is formed by conductive nano-spacers (18B) on insulating layer. An embodiment of such structure is polysilicon nano-structures doped or implanted with n-type or p-type ions (20) to improve material conductance. The electrical properties of the device will change with respect to the dimension of these nano-structures. Resistors with polysilicon nano-structures down to 10 nm can be produced with resulting measured resistance in the MOhm scale.

Abstract translation: 本发明描述了一种制造纳米电阻器（22）的新方法，其允许与标准CMOS制造工艺的完全集成。 电阻器包括长而薄的纳米结构作为电阻元件。 它由绝缘层上的导电纳米间隔物（18B）形成。 这种结构的实施例是掺杂或注入n型或p型离子（20）的多晶硅纳米结构，以改善材料电导率。 器件的电学特性将相对于这些纳米结构的尺寸而变化。 可以产生具有低至10nm的多晶硅纳米结构的电阻器，其中产生测量的电阻为莫尔刻度。