Wafer level package for sensor devices
    1.
    发明公开
    Wafer level package for sensor devices 审中-公开
    Verpackung auf WaferebenefürSensoren

    公开(公告)号:EP1775259A1

    公开(公告)日:2007-04-18

    申请号:EP05425719.1

    申请日:2005-10-14

    Abstract: In a substrate-level assembly (22), a device substrate (20) of semiconductor material has a top face (20a) and houses a first integrated device (1), provided with a buried cavity (3), formed within the device substrate (20), and with a membrane (4), suspended over the buried cavity (3) in the proximity of the top face (20a). A capping substrate (21) is mechanically coupled to the device substrate (20) above the top face (20a) so as to cover the first integrated device (1), in such a manner that a first empty space (25) is provided above the membrane (4). Electrical-contact elements (28a, 28b) electrically connect the integrated device (1) with the outside of the substrate-level assembly (22). The device substrate (20) integrates at least a further integrated device (1', 10) provided with a respective membrane (4'); and a further empty space (25'), fluidically isolated from the first empty space (25), is provided over the respective membrane (4') of the further integrated device (1', 10).

    Abstract translation: 在衬底级组件(22)中,半导体材料的器件衬底(20)具有顶面(20a)并且容纳设置有器件衬底(3)内的掩埋腔(3)的第一集成器件(1) (20),以及在所述顶面(20a)附近悬挂在所述掩埋腔(3)上的膜(4)。 封盖基板(21)在上表面(20a)之上机械耦合到器件基板(20),以便覆盖第一集成器件(1),使得第一空间(25)设置在上面 膜(4)。 电接触元件(28a,28b)将集成器件(1)与衬底级组件(22)的外部电连接。 装置基板(20)至少集成有设置有相应膜(4')的另外的集成装置(1',10); 并且在另一个集成装置(1',10)的相应膜(4')上方设置有与第一空空间(25)流体隔离的另外的空的空间(25')。

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