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公开(公告)号：KR1020090104298A
公开(公告)日：2009-10-06
申请号：KR1020080029656
申请日：2008-03-31
Applicant: 삼성전기주식회사
Abstract: PURPOSE: An embedded multi-output transformer is provided to prevent an insulation problem of a high voltage output and a balance problem of an output current by inserting a first bobbin and n second bobbins into insertion holes. CONSTITUTION: An embedded multi-output transformer includes a first bobbin(10), a second bobbin(11), a first coil(15), a second coil(16), and a pair of cores(12). One first winding(13) with one input terminal and one ground terminal is formed in the first bobbin. N second windings with two output terminals are formed in the second bobbin. The first coil is wound around the first winding. The second coils are wound around the n second windings respectively. The first bobbin is inserted into the insertion hole formed in the second bobbin. The pair of cores are inserted into the insertion hole formed in the first bobbin.
Abstract translation: 目的：提供一种嵌入式多输出变压器，通过将第一个线轴和n个第二个线轴插入插入孔中，防止高压输出的绝缘问题和输出电流的平衡问题。 构成：嵌入式多输出变压器包括第一线轴（10），第二线轴（11），第一线圈（15），第二线圈（16）和一对铁心（12）。 在第一线轴中形成具有一个输入端子和一个接地端子的第一绕组（13）。 具有两个输出端子的N个第二绕组形成在第二绕线筒中。 第一个线圈绕在第一个绕组上。 第二线圈分别缠绕在n个第二绕组上。 第一线轴被插入到形成在第二线轴中的插入孔中。 一对芯体插入形成在第一筒管中的插入孔中。
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公开(公告)号：KR100857165B1
公开(公告)日：2008-09-05
申请号：KR1020070036510
申请日：2007-04-13
Applicant: 삼성전기주식회사
IPC: H05K3/12
CPC classification number: C25D7/123 , H05K3/0038 , H05K3/108 , H05K3/205 , H05K3/421 , H05K3/423 , H05K2201/0376 , H05K2201/0394 , H05K2201/09563 , H05K2203/108
Abstract: A method for manufacturing a printed circuit board is provided to form a circuit pattern with a high density by forming an embossed carving pattern on a metal layer of a carrier and transferring the embossed carving pattern to an insulated layer. A method for manufacturing a printed circuit board includes the steps of: forming an embossed carving pattern corresponding to a circuit pattern on a metal layer of a carrier(S100); stacking and compressing the carrier on the insulated layer so that the embossed carving pattern faces toward the insulated layer(S200); removing the carrier, and transferring the metal layer and the embossed carving pattern to the insulated layer(S300); forming a via-hole on the insulated layer to which the metal layer is transferred(S400); forming a seed layer on the via-hole(S500); and filling the via-hole and forming a plating layer on the metal layer by performing an electrolytic plating for the insulated layer to which the metal layer is transferred using the metal layer and the seed layer as an electrode(S600).
Abstract translation: 提供一种制造印刷电路板的方法，通过在载体的金属层上形成压纹雕刻图案并将压纹雕刻图案转印到绝缘层上，形成具有高密度的电路图案。 制造印刷电路板的方法包括以下步骤：在载体的金属层上形成与电路图形相对应的压纹雕刻图案（S100）; 在绝缘层上堆叠和压缩载体，使得压花雕刻图案朝向绝缘层（S200）; 移除载体，并将金属层和压纹雕刻图案转印到绝缘层上（S300）; 在转移金属层的绝缘层上形成通孔（S400）; 在所述通孔上形成种子层（S500）; 并且通过使用金属层和种子层作为电极对被转印金属层的绝缘层进行电解电镀（S600），填充通孔并在金属层上形成镀层。
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公开(公告)号：KR100820635B1
公开(公告)日：2008-04-11
申请号：KR1020070000557
申请日：2007-01-03
Applicant: 삼성전기주식회사
IPC: H05K3/40
CPC classification number: H05K3/4038 , H05K1/115 , H05K3/04 , H05K3/429
Abstract: A manufacturing method of a circuit board is provided to reduce manufacturing cost and time by connecting layers through inserting conductive members into an insulating layer. A manufacturing method of a circuit board includes the steps of: inserting a plurality of conductive members into an insulating layer(S100); forming a hole by removing a part of the conductive members and filling the hole(S200); and forming circuit patterns connected to the remaining conductive members on the insulating layer(S300). In the step of inserting the plurality of conductive members, a carrier having the plurality of conductive members is pressed on the insulating layer. The conductive members are arranged on the carrier at the same intervals.
Abstract translation: 提供一种电路板的制造方法，通过将导电构件插入绝缘层来连接层来降低制造成本和时间。 电路板的制造方法包括以下步骤：将多个导电构件插入绝缘层（S100）中; 通过去除一部分导电构件并填充孔来形成孔（S200）; 以及形成连接到绝缘层上的剩余导电构件的电路图案（S300）。 在插入多个导电构件的步骤中，具有多个导电构件的载体被压在绝缘层上。 导电构件以相同的间隔布置在载体上。
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公开(公告)号：KR100782405B1
公开(公告)日：2007-12-07
申请号：KR1020060104893
申请日：2006-10-27
Applicant: 삼성전기주식회사
IPC: H05K3/30
CPC classification number: H01L21/4857 , H01L23/13 , H01L23/49822 , H01L2224/16 , H01L2924/00011 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/15153 , H01L2924/1517 , H05K1/183 , H05K3/108 , H05K3/20 , H05K3/4658 , H05K3/4697 , H05K2203/308 , H01L2224/0401
Abstract: A method for manufacturing a printed circuit board is provided to improve the precision of substrate manufacture by securing the thickness tolerance of a cavity through the adjustment of thickness of photoresist. A method for manufacturing a printed circuit board includes the steps of: providing a core substrate with an embedded inner layer circuit(S10); forming a first via for interlayer conduction on the core substrate(S20); selectively forming first photoresist on the core substrate in correspondence to a cavity(S30); stacking a first build-up layer having a first outer layer circuit on the core substrate(S40); and selectively removing the first build-up layer in correspondence to the location of the cavity, and removing the first photoresist(S60).
Abstract translation: 提供一种用于制造印刷电路板的方法，以通过调节光致抗蚀剂的厚度来确保空腔的厚度公差来提高基板制造的精度。 一种制造印刷电路板的方法包括以下步骤：提供具有嵌入式内层电路的芯基板（S10）; 在芯基板上形成层间导电的第一通孔（S20）; 对应于空腔，在芯基板上选择性地形成第一光致抗蚀剂（S30）; 在芯基板上堆叠具有第一外层电路的第一堆积层（S40）; 并且相应于空腔的位置选择性地去除第一堆积层，以及去除第一光致抗蚀剂（S60）。
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Patent Agency Ranking
公开(公告)号：KR1020070085179A
公开(公告)日：2007-08-27
申请号：KR1020070069531
申请日：2007-07-11
Applicant: 삼성전기주식회사
IPC: H01L23/12
CPC classification number: H01L24/73 , H01L2224/32145 , H01L2224/32225 , H01L2224/48227 , H01L2224/73265 , H01L2225/1023 , H01L2225/1058 , H01L2924/15153 , H01L2924/15311 , H01L2924/3025 , H01L2924/00012 , H01L2924/00
Abstract: A package on package substrate and its manufacturing method are provided to reduce a thickness of the package on a package substrate and to extend a space between a top package and a bottom package by forming a metal bump and a cavity on a bottom package substrate. A top package substrate(2) is laminated on an upper portion of a bottom package substrate(1). A solder ball(3) is coupled to a lower surface of the top package substrate. A metal bump(20) is protruded from the upper surface of the bottom package substrate. The metal bump corresponds to a position of the solder ball. A cavity is recessed from the upper surface of the bottom package substrate, corresponding to a position where an electronic device(4) is mounted. A bonding pad is formed on a position corresponding to an electrical point of contact of the electronic device. The metal bump is formed in a body with the bottom package substrate.
Abstract translation: 提供封装在基板上的封装及其制造方法，以减小封装衬底上的封装的厚度，并且通过在底部封装衬底上形成金属凸块和空腔来延伸顶部封装和底部封装之间的空间。 顶部封装衬底（2）层压在底部封装衬底（1）的上部上。 焊球（3）耦合到顶部封装衬底的下表面。 金属凸块（20）从底部封装基板的上表面突出。 金属凸块对应于焊球的位置。 腔体从底部封装衬底的上表面凹入，对应于安装电子器件（4）的位置。 在与电子设备的电接触点相对应的位置处形成接合焊盘。 金属凸块与底部封装基板形成在主体中。
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公开(公告)号：KR100732385B1
公开(公告)日：2007-06-27
申请号：KR1020060049999
申请日：2006-06-02
Applicant: 삼성전기주식회사
IPC: H01L21/60
Abstract: A method of manufacturing a package substrate is provided to improve the degree of freedom in a circuit design, to obtain a circuit product with high density and to improve electrical properties of the package substrate itself by omitting an additional plating introducing wire using a remaining seed layer as the plating introducing wire. A circuit pattern(34) and a bonding pad(35) are buried in an insulating layer(36). A seed layer(32) is formed on the insulating layer, so that a buried pattern substrate is completed. A dry film is formed on the seed layer. The seed layer and the dry film are removed from an upper portion of the bonding pad. A surface treatment is performed on the bonding pad by using the remaining seed layer as a plating introducing wire. The circuit pattern is exposed to the outside by removing the remaining seed layer and dry film therefrom.
Abstract translation: 提供一种制造封装衬底的方法，以提高电路设计的自由度，通过使用剩余晶种层省略附加电镀引入线来获得具有高密度的电路产品并且改善封装衬底本身的电性能 作为电镀引入线。 电路图案（34）和焊盘（35）埋入绝缘层（36）中。 在绝缘层上形成籽晶层（32），从而完成掩埋图案衬底。 在种子层上形成干膜。 籽晶层和干膜从键合焊盘的上部被去除。 通过使用剩余种子层作为电镀引入线在接合焊盘上执行表面处理。 通过从中除去剩余的籽晶层和干膜，使电路图案暴露于外部。
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公开(公告)号：KR100716827B1
公开(公告)日：2007-05-09
申请号：KR1020050056882
申请日：2005-06-29
Applicant: 삼성전기주식회사
IPC: H05K3/46
Abstract: 본 발명은 칩 실장형 인쇄회로기판의 제조방법에 관한 것으로, 수지층의 한면에 동박층이 적층된 RCC(Resin Coated Copper Foil) 또는 절연층에 개구부를 형성하고 코어에 열압착하여 캐비티(Cavity)를 형성할 때, RCC 내의 수지층 또는 절연층의 유리전이온도보다 낮은 유리전이온도를 갖는 열가소성 필름을 함께 열압착하여 열가소성 필름이 RCC 내의 수지층 또는 절연층보다 먼저 용융되어 캐비티를 채움으로써 이후 실장될 칩에 대응하는 캐비티의 형상을 보호 및 유지시켜 제품의 신뢰성을 향상시킨 칩 실장형 인쇄회로기판의 제조방법에 관한 것이다.
열가소성 필름, 적층, 캐비티, RCC, 인쇄회로기판-
公开(公告)号：KR100699587B1
公开(公告)日：2007-03-23
申请号：KR1020060037084
申请日：2006-04-25
Applicant: 삼성전기주식회사
Inventor： 박정현
IPC: H05B41/36 , G02F1/13357
CPC classification number: H05B41/38 , G02F1/133603 , G02F1/133604 , H05B41/2822 , H05B41/2824
Abstract: An inverter synchronization circuit is provided to stably perform the driving operation during an inverter dimming process by directly applying a triangular signal to a comparator and inputting a square wave from the comparator to the inverter synchronization circuit. An inverter synchronization circuit synchronizes an external synchronous signal with an inverter driving signal. A synchronous signal duty changing unit(601) converts the external synchronous signal to a synchronous signal with a predetermined duty ratio. A signal waveform changing unit(602) receives a triangular signal from an inverter control IC and converts the inputted signal to an inverter driving signal. A driving signal duty changing unit(603) converts the inverter driving signal from the signal waveform changing unit to a square wave with the same duty ratio as the output signal from the synchronous signal duty changing unit. A frequency comparator(604) compares the synchronous signal with the driving signal from the synchronous signal duty changing unit and outputs a compared result. A synchronous unit(605) applies a predetermined signal to the inverter control IC based on the compared result and synchronizes the inverter driving signal with the external synchronous signal.
Abstract translation: 提供了一种逆变器同步电路，通过直接向比较器施加三角波信号并将比较器的方波输入到逆变器同步电路，在逆变器调光过程中稳定地执行驱动操作。 逆变器同步电路将外部同步信号与变频器驱动信号同步。 同步信号占空比改变单元（601）将外部同步信号转换成具有预定占空比的同步信号。 信号波形改变单元（602）从逆变器控制IC接收三角形信号，并将输入的信号转换为逆变器驱动信号。 驱动信号占空比改变单元（603）将来自信号波形变化单元的反相器驱动信号转换成与来自同步信号占空比变更单元的输出信号相同的占空比的方波。 频率比较器（604）将同步信号与来自同步信号占空比变更单元的驱动信号进行比较，并输出比较结果。 同步单元（605）基于比较结果向逆变器控制IC施加预定信号，并将逆变器驱动信号与外部同步信号同步。
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公开(公告)号：KR100674714B1
公开(公告)日：2007-01-25
申请号：KR1020050054498
申请日：2005-06-23
Applicant: 삼성전기주식회사
CPC classification number: H01F30/04 , H01F3/10 , H01F27/38 , H01F38/10 , H05B41/2822
Abstract: 본 발명은, 트랜스포머에 관한 것으로, 1차 권선부를 중심으로 양쪽에 2차 권선부를 위치시키고, 2차 권선부의 모든 단자가 출력 단자로 사용되며, 입력 단자와 출력 단자를 서로 반대 방향에 위치시킴으로써, 고압 출력측의 리턴 와이어 발생을 억제할 뿐 아니라, 인쇄회로기판과의 관계에서 충분한 절연 이격거리 확보 및 그에 따른 회로 구현이 용이하게 되고, 종래의 트랜스포머보다 더 향상된 효율 및 상당한 비용 절감을 가져오게 되며, 트랜스포머를 사용하는 제품의 크기도 소형화 할 수 있는 이점이 있다.
1개의 입력 단자와 1개의 접지 단자를 가지는 1차 권선부 1개와 2개의 단자 모두를 출력 단자로 가지는 2차 권선부 2n(n: 양수)개가 형성된 보빈; 상기 1개의 1차 권선부에 권선된 1차 코일; 상기 2n개의 2차 권선부에 권선된 2차 코일; 및 상기 보빈 내에 형성된 삽입홀에 각각 삽입되는 한쌍의 코어;를 포함한다.
트랜스포머, 1차 권선부, 2차 권선부, 입력 단자, 출력 단자Abstract translation: 本发明涉及一种变压器，其中次级绕组部分位于初级绕组部分的两侧，次级绕组部分的所有端子被用作输出端子，并且输入端子和输出端子被设置在相反的方向上， 以及抑制回线中的高压输出侧发生时，印刷电路和足够的绝缘容易距离增益，并根据相对于该基板于此电路实现，并导致改进的效率和显着地节省成本比传统的变压器， 使用变压器的产品尺寸可以小型化。
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