Abstract:
A semiconductor module includes a carrier having a first carrier surface and a second carrier surface opposite the first carrier surface, a first semiconductor chip mounted over the first carrier surface and a heatsink coupled to the second carrier surface with a first heatsink surface facing the carrier. The second carrier surface or the first heatsink surface has at least one cavity in the form of one or more of dimples and trenches.
Abstract:
Provided is a copper foil for a printed wiring board including a roughened layer on at least one surface thereof. In the roughened layer, the average diameter D1 at the particle bottom being apart from the bottom of each particle by 10% of the particle length is 0.2 to 1.0 μm, and the ratio L1/D1 of the particle length L1 to the average diameter D1 at the particle bottom is 15 or less. In the copper foil for printed wiring board, when a copper foil for printed wiring having a roughened layer is laminated to a resin and then the copper layer is removed by etching, the sum of areas of holes accounting for the resin roughened surface having unevenness is 20% or more. The present invention involves the development of a copper foil for a semiconductor package substrate that can avoid circuit erosion without causing deterioration in other properties of the copper foil. In particular, an object of the present invention is to provide a copper foil for a printed wiring board and a method of producing the copper foil, in which the adhesion strength between the copper foil and the resin can be enhanced by improvement of the roughened layer of the copper foil.
Abstract:
The present invention provides a dry film which can obtain a solder resist having an excellent resolution while maintaining various characteristics including PCT resistance, a laminated structure such as a printed writing board, and a method of producing the laminated structure.A dry film comprising: a film; and a photosensitive resin layer formed on the film, wherein the absorption coefficient (α) of the photosensitive resin layer at a wavelength of 365 nm has an increase gradient or a decrease gradient from a surface of the photosensitive resin layer toward a surface of the film.
Abstract:
A wiring substrate 11A includes a high heat radiation substrate 21 which has a high thermal conductive layer in which at least one of a front surface and a rear surface thereof is a mounting surface 21a for a variety of components; a connection terminal 31 which is extended from the high heat radiation substrate 21 and bent in a direction perpendicular to a surface of the high heat radiation substrate 21; and a heat radiation piece section 35 which is integrally installed to the connection terminal 31.
Abstract:
Examples are provided for a flexible circuit element including a flexible insulating support structure, a solid metal trace extending at least partially between a first connector and a second connector on the flexible insulating support structure, and a liquid metal conductor disposed in contact with the solid metal trace in a region of the trace configured to repeatedly flex when installed in a device.
Abstract:
An electrical circuit board assembly (60) that can be used in a headphone includes acoustic elements incorporated into a rigid or flexible circuit board (62). The electrical circuit board assembly permits the convenient routing of electrical circuitry (68) and acoustic elements, such as an acoustic port (70), between acoustic chambers in the headphone. The acoustic port includes a channel embedded in the circuit board. Control of the dimensions of the channel is achieved using conventional circuit board assembly techniques. Advantageously, the circuit board assembly enables convenient and repeatable assembly into headphones, such as earbuds, and results in more consistent acoustic performance from the headphones.
Abstract:
본 발명은 특수한 무기 첨가제를 고분자 수지 자체에 포함시키지 않고도, 단순화된 공정으로 각종 고분자 수지 제품 또는 수지층 상에 미세한 도전성 패턴을 형성할 수 있으며, 백색 또는 다양한 색상의 고분자 수지 제품 등을 보다 적절히 구현할 수 있게 하는 전자기파의 직접 조사에 의한 도전성 패턴의 형성 방법과, 이로부터 형성된 도전성 패턴을 갖는 수지 구조체에 관한 것이다. 상기 전자기파의 직접 조사에 의한 도전성 패턴의 형성 방법은 이산화티타늄(TiO2)을 포함한 고분자 수지 기재에 선택적으로 전자기파를 조사하여 소정의 표면 거칠기를 갖는 제 1 영역을 형성하는 단계; 고분자 수지 기재 상에 전도성 시드(conductive seed)를 형성하는 단계; 전도성 시드가 형성된 고분자 수지 기재를 도금하여 금속층을 형성하는 단계; 및 제 1 영역보다 작은 표면 거칠기를 갖는 고분자 수지 기재의 제 2 영역에서 상기 전도성 시드 및 금속층을 제거하는 단계를 포함한다.