公开(公告)号：WO2004004433A1

公开(公告)日：2004-01-08

申请号：PCT/US2003/020362

申请日：2003-06-27

Applicant: PPG INDUSTRIES OHIO, INC.

Inventor： WANG, Alan E. ,  OLSON, Kevin C.

IPC: H05K3/44

CPC classification number: H05K3/44 ,  H05K1/056 ,  H05K3/002 ,  H05K3/0052 ,  H05K3/4641 ,  H05K3/4644 ,  H05K2201/0166 ,  H05K2201/0909 ,  H05K2201/0919 ,  H05K2201/09554 ,  H05K2203/135 ,  Y10T29/49126 ,  Y10T29/49156 ,  Y10T29/49167 ,  Y10T428/12361 ,  Y10T428/24322

Abstract: Provided is a process for creating vias for a circuit assembly including the steps of (a) applying a curable coating composition to a substrate, some or all of which is electrically conductive, to form an uncured coating thereon; (b) applying a resist over the uncured coating; (c) imaging the resist in predetermined locations; (d) developing the resist to expose predetermined areas of the uncured coating; (e) removing the exposed areas of the uncured coating; and (f) heating the coated substrate of step (e) to a temperature and for a time sufficient to cure the coating. Also disclosed is a process of fabricating a circuit assembly.

Abstract translation: 提供了一种用于创建电路组件的通孔的方法，包括以下步骤：（a）将可固化涂料组合物施加到基底上，其中一些或全部导电，以在其上形成未固化的涂层; （b）在未固化的涂层上涂覆抗蚀剂; （c）在预定位置对抗蚀剂进行成像; （d）显影抗蚀剂以暴露未固化涂层的预定区域; （e）去除未固化涂层的暴露区域; 和（f）将步骤（e）的涂覆的基材加热到足以固化涂层的温度和时间。 还公开了一种制造电路组件的工艺。

公开(公告)号：WO2004004432A1

公开(公告)日：2004-01-08

申请号：PCT/US2003/020361

申请日：2003-06-27

Applicant: PPG INDUSTRIES OHIO, INC.

Inventor： WANG, Alan E. ,  OLSON, Kevin C. ,  DI STEFANO, Thomas H.

IPC: H05K3/44

CPC classification number: H05K1/0231 ,  H01L2224/16225 ,  H05K1/056 ,  H05K3/002 ,  H05K3/0052 ,  H05K3/44 ,  H05K3/4641 ,  H05K3/4644 ,  H05K2201/0166 ,  H05K2201/0397 ,  H05K2201/0909 ,  H05K2201/0919 ,  H05K2201/09309 ,  H05K2201/09554 ,  H05K2201/10446 ,  H05K2203/135 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: A circuit board layer (2) in accordance with the present invention includes a conductive sheet (4) sandwiched between an insulating top layer (10) and an insulating bottom layer (14). The top and bottom layers (10) and (14) and the conductive sheet (4) define the circuit board layer (2) having an edge that includes an edge (20) of the conductive sheet (4). An insulating edge layer (18) covers substantially all of the edge (20) of the conductive sheet (4).

Abstract translation: 根据本发明的电路板层（2）包括夹在绝缘顶层（10）和绝缘底层（14）之间的导电片（4）。 顶层和底层（10）和（14）和导电片（4）限定具有包括导电片（4）的边缘（20）的边缘的电路板层（2）。 绝缘边缘层（18）几乎覆盖导电片（4）的所有边缘（20）。

公开(公告)号：WO2003015484A1

公开(公告)日：2003-02-20

申请号：PCT/US2002/024535

申请日：2002-08-02

Applicant: SANDISK CORPORATION

Inventor： WALLACE, Robert, F.

IPC: H05K1/11

CPC classification number: H05K1/0256 ,  G06K19/077 ,  G06K19/07732 ,  G06K19/07735 ,  H01L2224/48091 ,  H01L2224/48227 ,  H05K1/0259 ,  H05K1/0268 ,  H05K1/0298 ,  H05K1/117 ,  H05K3/0052 ,  H05K3/242 ,  H05K2201/0919 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/0969 ,  H05K2203/175 ,  H01L2924/00014

Abstract: A card manufacturing technique and the resulting card are provided. The card has a ground and/or power layer (112) extending to the edges of a circuit board for electrostatic discharge protection but also has gaps (112a) at the edge of the ground and/or power layer (112) to avoid short circuiting with conductive segments (160) of another layer deformed when the card is trimmed during manufacture.

Abstract translation: 提供卡制造技术和所得到的卡。 卡具有延伸到用于静电放电保护的电路板的边缘的接地和/或功率层（112），但是在接地和/或功率层（112）的边缘处还具有间隙（112a），以避免短路 当在制造期间修剪卡时，另一层的导电段（160）变形。

公开(公告)号：WO1983002521A1

公开(公告)日：1983-07-21

申请号：PCT/US1983000039

申请日：1983-01-12

Applicant: ELXSI

Inventor： ELXSI ,  HOLBERT, Kenneth, Wayne ,  MASSEY, Edwin, Michael

IPC: H01B07/08

CPC classification number: H02G5/005 ,  H05K1/0263 ,  H05K3/429 ,  H05K3/4641 ,  H05K2201/044 ,  H05K2201/0919 ,  H05K2201/09309 ,  H05K2201/09845 ,  H05K2201/10272

Abstract: A backplane power distribution system for making connections to the power planes of a computer system and having the capability of handling very high levels of current. This is achieved with a stepped backplane construction (17b-e). For example, in a multiple layer system having, in order, a first conductive layer (10a), a first dielectric layer (12a, 12b), a second conductive layer (10b), a second dielectric layer (12bc), and so on, each successive conductive and dielectric layers extend transversely beyond the preceding layers to present a substantial exposed area on all but the first conductive layer (17b-e). Typically, rectangular metal bus bars (not shown) are bolted to the backplane using plated through holes (20b-e) to make contact with the exposed areas (17b-e). Holes through the layers are provided and prepared such that each hole (15, 20 and 22) may make contact with a particular conductive layer as desired or in the case of ground with all ground conductive layers. Conductive layers (10a) and (10i) may be used as signal layers utilizing traces (14) and holes (15) while layers (10b-h) are so-called power planes.

Abstract translation: 背板配电系统，用于连接到计算机系统的电力平面，并且具有处理非常高水平的电流的能力。 这是通过阶梯式背板结构（17b-e）实现的。 例如，在依次具有第一导电层（10a），第一介电层（12a，12b），第二导电层（10b），第二介电层（12bc）等）的多层系统中 ，每个连续的导电和电介质层横向延伸超过先前的层，以在除第一导电层（17b-e）之外的所有部分上呈现基本的暴露区域。 通常，使用电镀通孔（20b-e）将矩形金属汇流条（未示出）螺栓连接到背板以与暴露区域（17b-e）接触。 提供并准备穿过这些层的孔，使得每个孔（15,20和22）可根据需要与特定的导电层接触，或者在所有接地导电层接地的情况下。 导电层（10a）和（10i）可以用作利用迹线（14）和孔（15）的信号层，而层（10b-h）是所谓的电源层。

公开(公告)号：SE7812434A

公开(公告)日：1979-06-07

申请号：SE7812434

申请日：1978-12-04

Applicant: PHILIPS NV

Inventor： GUSTIN P A G J ,  SCHAYES R G G

IPC: B41J2/395 ,  H05K3/00 ,  H05K3/40 ,  H05K3/46 ,  G06K15/14

CPC classification number: B41J2/395 ,  H05K3/0052 ,  H05K3/403 ,  H05K3/4614 ,  H05K2201/0379 ,  H05K2201/0919

公开(公告)号：ZA7104478B

公开(公告)日：1972-03-29

申请号：ZA7104478

申请日：1971-07-07

Applicant: STANDARD TELEPHONES CABLES LTD

Inventor： COOKE R ,  ELLWOOD G

IPC: H05K1/18 ,  H05K3/40 ,  H05K7/00 ,  H05K7/02 ,  H01B

CPC classification number: H05K7/00 ,  H05K1/184 ,  H05K3/403 ,  H05K7/02 ,  H05K2201/0919 ,  H05K2201/10446 ,  H05K2203/049

公开(公告)号：EP2724464B1

公开(公告)日：2016-09-14

申请号：EP12730884.9

申请日：2012-06-20

Applicant: Microchip Technology Germany GmbH

Inventor： BURGER, Stefan

IPC: H03K17/955 ,  H05K1/00

CPC classification number: G01R1/0408 ,  H03K17/962 ,  H03K2017/9602 ,  H03K2217/960765 ,  H03K2217/960775 ,  H05K1/162 ,  H05K2201/0919 ,  H05K2201/09672 ,  H05K2201/10151

Abstract: A printed circuit board (P) has an evaluation device (E) and an electrode configuration of a capacitive sensor, wherein the electrode configuration has at least two electrodes, one arranged above the other and spaced apart from each other, which each are formed by portions of at least one electrically conductive layer of the printed circuit board (P), and wherein at least one electrode of the electrode configuration is coupled with the evaluation device (E) via a conductor path of the printed circuit board (P). Furthermore, an electric handheld device may have at least one such printed circuit board (P).

Abstract translation: 印刷电路板（P）具有评价装置（E）和电容式传感器的电极结构，其中，电极结构具有至少两个电极，一个彼此并排设置并彼此间隔开，每个电极由 所述印刷电路板（P）的至少一个导电层的部分，并且其中所述电极构造的至少一个电极经由所述印刷电路板（P）的导体路径与所述评估装置（E）耦合。 此外，电动手持装置可以具有至少一个这样的印刷电路板（P）。

公开(公告)号：EP2832192A2

公开(公告)日：2015-02-04

申请号：EP13716915.7

申请日：2013-03-28

Applicant: Keyssa, Inc.

Inventor： SOVERO, Emilio ,  MCCORMACK, Gray D.

IPC: H05K1/02 ,  H01Q7/00 ,  H01Q1/48 ,  H01P3/12 ,  H01P3/00 ,  H01Q1/24

CPC classification number: H01Q13/103 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/15311 ,  H01P3/006 ,  H01P3/121 ,  H01Q1/24 ,  H01Q1/38 ,  H01Q1/48 ,  H01Q7/00 ,  H05K1/0218 ,  H05K1/0274 ,  H05K2201/0191 ,  H05K2201/0919 ,  H05K2201/09618 ,  H05K2201/09845 ,  H05K2201/2036 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A system for transmitting or receiving signals may include a dielectric substrate having a major face, a communication circuit, and an electromagnetic-energy directing assembly. The circuit may include a transducer configured to convert between RF electrical and RF electromagnetic signals and supported in a position spaced from the major face of the substrate operatively coupled to the transducer. The directing assembly may be supported by the substrate in spaced relationship from the transducer and configured to direct EM energy in a region including the transducer and along a line extending away from the transducer and transverse to a plane of the major face.

Abstract translation: 用于发送或接收信号的系统可以包括具有主面的电介质基板，通信电路和电磁能指导组件。 电路可以包括被配置为在RF电和RF电磁信号之间转换并被支持在与可操作地耦合到换能器的衬底的主面间隔开的位置的换能器。 引导组件可以由与换能器间隔开的基板支撑，并且被构造成在包括换能器的区域中沿着远离换能器延伸并横向于主面平面的线引导EM能量。

公开(公告)号：EP2683225A1

公开(公告)日：2014-01-08

申请号：EP11860278.8

申请日：2011-12-12

Applicant: Olympus Corporation

Inventor： FUJIMORI Noriyuki

IPC: H05K1/11 ,  A61B1/04 ,  G03B17/02 ,  H04N5/225 ,  H05K3/46

CPC classification number: H05K1/181 ,  A61B1/0011 ,  A61B1/051 ,  H04N5/2251 ,  H05K1/18 ,  H05K1/186 ,  H05K3/0052 ,  H05K3/10 ,  H05K3/403 ,  H05K3/4602 ,  H05K2201/0919 ,  H05K2201/10121 ,  H05K2201/10356 ,  H05K2201/10416 ,  H05K2201/10446 ,  Y10T29/49162

Abstract: A wiring board 10 includes a plurality of wiring layers 22, a plurality of insulating layers 23, and an electrode member 20 made of a conductive material, the electrode member 20 being incorporated in the wiring board 10 in a state in which the electrode member 20 includes exposed sections 20S on side surfaces 13 and 14 that cross the plurality of wiring layers 22 and the plurality of insulating layers 23.

Abstract translation: 布线基板10具有多个布线层22，多个绝缘层23和由导电材料制成的电极构件20，电极构件20在电极构件20的状态下配置在布线基板10中 包括穿过多个布线层22和多个绝缘层23的侧表面13和14上的暴露部分20S。

公开(公告)号：EP2451259A1

公开(公告)日：2012-05-09

申请号：EP10820151.8

申请日：2010-09-30

Applicant: Panasonic Corporation

Inventor： KASHIWAGI, Takafumi ,  SAKAI, Yukio ,  TADA, Nobuhiro ,  HIRUMA, Takayuki

IPC: H05K3/46 ,  H01L23/00 ,  H01L23/28

CPC classification number: H05K3/284 ,  H01L23/3121 ,  H01L23/552 ,  H01L24/97 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/97 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/1531 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K2201/0715 ,  H05K2201/0723 ,  H05K2201/0919 ,  H05K2201/09309 ,  H05K2203/1316 ,  Y10T29/4913 ,  H01L2224/81 ,  H01L2924/00012

Abstract: A module including a circuit board including an insulating layer and one or more layers of copper foil embedded in the insulating layer; an electronic component mounted on the circuit board; a sealing part sealing the electronic component on the circuit board; and a metal film covering side surfaces of the circuit board and surfaces of the sealing part. A part of the copper foil is exposed to the side surfaces of the circuit board, an exposed part of the copper foil has a width of less than 200 µm, and the copper foil and the metal film are electrically coupled to each other through the exposed part. Thus, occurrence of blushing, crack, or the like, can be prevented.

Abstract translation: 一种模块，包括：电路板，包括绝缘层和一层或多层嵌入绝缘层中的铜箔; 安装在电路板上的电子部件; 密封电路板上的电子部件的密封部; 以及覆盖电路板的侧面和密封部的表面的金属膜。 铜箔的一部分暴露于电路板的侧面，铜箔的露出部分的宽度小于200μm，铜箔和金属膜通过曝光 部分。 因此，可以防止发生白化，裂纹等。