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    CAPACITIVE BLIND-MATE MODULE INTERCONNECTION
    122.
    发明申请
    CAPACITIVE BLIND-MATE MODULE INTERCONNECTION 审中-公开
    电容式蓝牙模块互连

    公开(公告)号：WO2013096880A1

    公开(公告)日：2013-06-27

    申请号：PCT/US2012/071443

    申请日：2012-12-21

    Applicant: ANDREW LLC

    Inventor： ZIMMERMAN, Martin

    IPC: H01P5/02 ,  H01L23/48 ,  H01Q1/24 ,  H05K3/32

    CPC classification number: H03H7/004 ,  H01L2924/0002 ,  H01P5/028 ,  H01Q1/246 ,  H05K1/0225 ,  H05K1/0239 ,  H05K3/28 ,  H05K3/40 ,  H05K2201/0175 ,  H05K2201/09309 ,  H05K2201/09336 ,  H05K2201/09618 ,  H05K2201/09872 ,  H01L2924/0001

    Abstract: A blind-mate capacitive coupling interconnection between a main module enclosure one or more sub-module enclosures has coupling surfaces each with a ground portion and an aperture, an inner element provided in the aperture, spaced away from the ground portion. The coupling surfaces may be provided, for example, as traces on a printed circuit board. To accommodate a degree of mis-alignment, one of the inner elements may be provided larger than the other. Capacitive coupling between the coupling surfaces occurs when the coupling surfaces are mated together, retained in position, for example, by a mechanical fixture.

    Abstract translation: 一个或多个子模块外壳之间的主模块外壳之间的盲配电容耦合互连具有各自具有接地部分和开口的耦合表面，设置在孔中的内部元件与接地部分间隔开。 耦合表面可以例如设置在印刷电路板上的迹线上。 为了适应一定程度的误配对，可以将内部元件中的一个设置得大于另一个。 耦合表面之间的电容耦合发生在耦合表面配合在一起时，例如通过机械夹具保持在适当的位置。

    IMPROVED FLIP CHIP MMIC ON BOARD PERFORMANCE USING PERIODIC ELECTROMAGNETIC BANDGAP STRUCTURES
    125.
    发明申请
    IMPROVED FLIP CHIP MMIC ON BOARD PERFORMANCE USING PERIODIC ELECTROMAGNETIC BANDGAP STRUCTURES 审中-公开
    使用周期性电磁带结构改进板卡MMIC的性能

    公开(公告)号：WO2005088708A3

    公开(公告)日：2006-01-19

    申请号：PCT/US2005007530

    申请日：2005-03-04

    Applicant: RAYTHEON CO

    Inventor： TONOMURA SAMUAL D ,  CISCO TERRY C ,  HOLTER CLIFTON OLE

    IPC: H01L23/00 ,  H01L23/14 ,  H01L23/498 ,  H01L23/50 ,  H01L23/552 ,  H01L23/66 ,  H05K1/02 ,  H05K1/03 ,  H05K1/09 ,  H05K9/00 ,  H01L21/60

    CPC classification number: H01L23/552 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/66 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/81801 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/1305 ,  H01L2924/3025 ,  H01P1/2005 ,  H05K1/0236 ,  H05K1/0306 ,  H05K1/09 ,  H05K2201/0715 ,  H05K2201/09336 ,  H05K2201/09681 ,  H01L2924/00

    Abstract: A hybrid assembly having improved cross talk characteristics comprises a substrate (101) having an upper surface (111). Conductive paths on the upper surface are provided for conducting high frequency signals. Regular polygons (501, 503) made of an electromagnetic band gap (EBG) material having slow wave characteristics are 5 deposited on the upper surface and form a lattice for tessellating the upper surface. Each of the polygons has a periphery. The polygons are separated along their periphery from adjacent polygons by an interspace and are covered with an insulating material. Second polygons (804,808), also made of an electromagnetic band gap material, are deposited over the insulating material. Vias (828) connect second polygons 10 to ground plane(307). Semiconductor structures (404,406) are mounted over the second polygons. The semiconductor structures have a plurality of electrical contacts with the conductive paths. The regular polygons can be hexagons, triangles, octagons or any other combination that forms a lattice and can be printed onto the substrate.

    Abstract translation: 具有改进的串扰特性的混合组件包括具有上表面（111）的衬底（101）。 设置上表面的导电路径用于传导高频信号。 由具有慢波特性的电磁带隙（EBG）材料制成的常规多边形（501,503）沉积在上表面上并形成用于镶嵌上表面的格子。 每个多边形都有一个周边。 多边形沿其周边与相邻的多边形间隔开，并被绝缘材料覆盖。 也由电磁带隙材料制成的第二多边形（804,808）沉积在绝缘材料上。 通孔（828）将第二多边形10连接到接地层（307）。 半导体结构（404,406）安装在第二多边形上。 半导体结构具有多个与导电路径的电接触。 正多边形可以是六边形，三角形，八边形或形成网格并可以印刷到基底上的任何其他组合。

    A PERIODIC INTERLEAVED STAR WITH VIAS ELECTROMAGNETIC BANDGAP STRUCTURE FOR MICROSTRIP AND FLIP CHIP ON BOARD APPLICATIONS
    126.
    发明申请
    A PERIODIC INTERLEAVED STAR WITH VIAS ELECTROMAGNETIC BANDGAP STRUCTURE FOR MICROSTRIP AND FLIP CHIP ON BOARD APPLICATIONS 审中-公开
    具有VIAS电磁带结构的周期性交互式星形结构，用于板上应用的微阵列和片状芯片

    公开(公告)号：WO2005096350A2

    公开(公告)日：2005-10-13

    申请号：PCT/US2004/034792

    申请日：2004-10-18

    Applicant: RAYTHEON COMPANY

    Inventor： TONOMURA, Samuel, D.

    IPC: H01L21/00

    CPC classification number: H01P1/16 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/552 ,  H01L23/66 ,  H01L25/16 ,  H01L2223/6627 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2924/01046 ,  H01L2924/09701 ,  H01L2924/1305 ,  H01L2924/19032 ,  H01L2924/3025 ,  H01P1/2005 ,  H01Q15/006 ,  H05K1/0236 ,  H05K2201/0715 ,  H05K2201/09336 ,  H05K2201/09681 ,  H01L2924/00

    Abstract: A hybrid assembly having improved cross talk characteristics comprises an electromagnetic band gap (EBG) layer (612) on a substrate (101) having an upper surface (111) and a lower surface and a semiconductor structure (MMIC) (602) mounted above teh EBG layer. A plurality of stars (400,402) made of an EBG material are preferably printed, or deposited, on the upper surface (111). The EBG material has slow wave characteristics. The plurality of stars teeellates the upper surface between conductive paths. Each of the stars has a center section (408) formed from a regular polygon, the center section having projections extending from the center section. The projections and the center section form a periphery. The periphery engages adjacent stars along the periphery. Stars are separated from adjacent starts by an interspace. Each of the stars is connected to a conductive via (604, 606), in turn connected to ground potential. A conductive layer (307) at ground potential is electrically continuous with vias (604, 606) used to interconnect all stars forming the EBG layer.

    Abstract translation: 具有改进的串扰特性的混合组件包括在具有上表面（111）和下表面的衬底（101）上的电磁带隙（EBG）层（612）和安装在上述表面上的半导体结构（MMIC）（602） EBG层。 由EBG材料制成的多个恒星（400,402）优选地印刷或沉积在上表面（111）上。 EBG材料具有慢波特性。 多个星星使导电路径之间的上表面起弧。 每个星星具有由正多边形形成的中心部分（408），中心部分具有从中心部分延伸的突起。 突起和中心部分形成外围。 周边沿周边与相邻的星星接合。 星星通过间隙与相邻起始处分开。 每个恒星连接到导电通孔（604,606），然后连接到地电位。 接地电位的导电层（307）与用于互连形成EBG层的所有恒星的通孔（604,606）电连接。

    Rain sensor embedded on printed circuit board
    127.
    发明授权
    Rain sensor embedded on printed circuit board 有权
    嵌在印刷电路板上的雨量传感器

    公开(公告)号：EP2100783B1

    公开(公告)日：2017-12-20

    申请号：EP09155248.9

    申请日：2009-03-16

    Applicant: Guardian Industries Corp.

    Inventor： Veerasamy, Vijayen S.

    IPC: B60S1/08 ,  B32B17/10 ,  G01D5/24 ,  G01N21/25 ,  H05K1/02

    CPC classification number: B60S1/0825 ,  B32B17/10036 ,  B32B17/10174 ,  B32B17/10761 ,  B32B17/10788 ,  B60S1/0822 ,  B60S1/087 ,  G01D5/2405 ,  H05K1/0218 ,  H05K1/0219 ,  H05K1/0298 ,  H05K1/162 ,  H05K1/189 ,  H05K3/0058 ,  H05K2201/0715 ,  H05K2201/09336 ,  H05K2201/09663

    Abstract: A system and/or method for sensing the presence of moisture (e.g., rain) and/or other material(s) on a window such as a vehicle window (e.g., vehicle windshield, sunroof or backlite). In certain example embodiments, a plurality of sensing capacitors are supported by a window such as a vehicle windshield, the capacitors each having a different field and/or pattern. A sensing circuit outputs an analog signal that is based on and/or related to the capacitances of one or more of the sensing capacitors. In certain example embodiments, a flexible printed circuit board (PCB) mountable in or on a vehicle window is provided. First and second sensing circuits are formed on opposing sides of the flexible PCB, with each said sensing circuit comprising a plurality of different fractal structures. A ground plane is located between the first and second sensing circuits, with the ground plane being arranged so as to decouple the first and second capacitor arrays and to shield the first capacitor array from fields emanating from the second capacitor array and vice versa. The electronic device is configured to detect moisture on an exterior surface of the vehicle window, humidity on an interior surface of the vehicle window, and EMI.

    MEHRLAGIGE ELEKTRISCHE LEITERPLATTE
    128.
    发明公开
    MEHRLAGIGE ELEKTRISCHE LEITERPLATTE 审中-公开
    多层式电子电路板

    公开(公告)号：EP2759182A1

    公开(公告)日：2014-07-30

    申请号：EP12783083.4

    申请日：2012-08-17

    Applicant: ERNI Production GmbH & Co. KG.

    Inventor： EIFER, Bernd ,  TSCHRITTER, Jakob

    IPC: H05K1/02

    CPC classification number: H05K1/0216 ,  H05K1/0224 ,  H05K1/0228 ,  H05K1/0245 ,  H05K1/0248 ,  H05K1/0298 ,  H05K2201/0715 ,  H05K2201/0723 ,  H05K2201/09336

    Abstract: The invention relates to an electric multilayer printed circuit board which satisfies the PICMG specification EXP.O, comprising a first signal layer and a second signal layer. The first signal layer comprises at least one first conductive path (33) and a first shielding region. The second signal layer comprises at least one second conductive path (43) and a second shielding region. The at least one first conductive path (33) and the at least one second conductive path (34) can be arranged such that said paths cross in at least one crossing point K. The first conductive path (33) is arranged adjacently to the second shielding region at each point where the first conductive path does not cross a second conductive path (43), and each second conductive path (43) is arranged adjacently to the first shielding region at each point where the second conductive path does not cross a conductive path (33).

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