公开(公告)号：EP0504411A4

公开(公告)日：1993-02-10

申请号：EP91916592

申请日：1991-09-19

Applicant: FUJITSU LIMITED

Inventor： TANIZAWA, TETSU, FUJITSU LIMITED

IPC: H01L21/60 ,  H01L23/04 ,  H01L23/057 ,  H01L23/498 ,  H05K3/34 ,  H01L23/50 ,  H01L23/12

CPC classification number: H01L24/73 ,  H01L23/04 ,  H01L23/057 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/4985 ,  H01L24/48 ,  H01L24/81 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15173 ,  H01L2924/15312 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K3/3415 ,  H05K3/3421 ,  H05K3/3426 ,  H05K3/3447 ,  H05K2201/10659 ,  H05K2201/10704 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A semiconductor device with a high package lead density such as the PGA type, allowing the density of the semiconductor device to increase by forming the leads of the semiconductor device with lead pins (14) for surface mounting arranged by the specified quantity at the outer peripheral area on the back of a package (13) where a chip (11) is mounted and lead members (22 and 41) having the predetermined function at least one of which is arranged at the internal area other than the area of the above lead pins (14).

公开(公告)号：EP0521335A1

公开(公告)日：1993-01-07

申请号：EP92110122.6

申请日：1992-06-16

Applicant: FUJITSU LIMITED

Inventor： Sono, Michio, c/o Fujitsu Limited ,  Kasai, Junichi, c/o Fujitsu Limited ,  Saito, Kouji, c/o Fujitsu Limited ,  Mitobe, Kazuhiko, c/o Fujitsu Limited ,  Yoshimoto, Masanori, c/o Fujitsu Limited

IPC: H01L23/495

CPC classification number: H05K1/0203 ,  H01L23/49555 ,  H01L23/49568 ,  H01L23/49575 ,  H01L23/49582 ,  H01L2224/05554 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/19107 ,  H05K1/181 ,  H05K2201/10166 ,  H05K2201/10454 ,  H05K2201/10469 ,  H05K2201/1053 ,  H05K2201/10659 ,  Y02P70/611 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor device comprises a semiconductor chip; a resin package body (11) for accommodating the semiconductor chip; a plurality of interconnection leads (14) provided on the resin package body along a lower edge of the package body such that the interconnection leads project outward from the lower edge; and a heat dissipation lead (31) held on the resin package body for dissipating heat generated by the semiconductor chip. The heat dissipation lead (31) comprises a plate of a heat conducting material having a stage part and a heat sink part, wherein the stage part is held inside the resin package body and supporting the semiconductor chip thereon, while the heat sink part projects outward from the resin package body and including a part that extends in a downward direction. The heat sink part has a lower edge (31a) that is formed at a level substantially flush with the outer lead part of the interconnection leads such that the semiconductor device is held upright, when placed on the substrate, by the outer lead part of the interconnection leads and by the lower edge of the heat sink part of the heat dissipation lead.

Abstract translation: 半导体器件包括半导体芯片; 用于容纳半导体芯片的树脂封装体（11）; 多个互连引线（14），沿着所述封装体的下边缘设置在所述树脂封装主体上，使得所述互连引线从所述下边缘向外突出; 以及保持在树脂封装主体上用于散发由半导体芯片产生的热量的散热引线（31）。 散热引线31包括具有台部和散热部的导热材料板，其中台部保持在树脂封装主体的内部并在其上支撑半导体芯片，同时散热部向外伸出 并且包括沿向下方向延伸的部分。 散热部分具有下边缘（31a），该下边缘形成在与互连引线的外引线部分基本齐平的水平面上，使得半导体器件在被放置在基板上时被直立地保持在基板的外引线部分上 互连引线和散热片散热片的下边缘。

公开(公告)号：EP0437312A1

公开(公告)日：1991-07-17

申请号：EP91300037.8

申请日：1991-01-03

Applicant: NEC CORPORATION

Inventor： Kogure, Hiroshi, c/o NEC Corporation ,  Norimatsu, Hidehiko, c/o NEC Corporation

IPC: H05K7/20

CPC classification number: H05K3/341 ,  H05K3/3426 ,  H05K3/3494 ,  H05K2201/09781 ,  H05K2201/10166 ,  H05K2201/10522 ,  H05K2201/10659 ,  H05K2201/10689 ,  H05K2201/10818 ,  H05K2201/1084 ,  H05K2201/10969 ,  H05K2203/107 ,  Y02P70/613

Abstract: A structure of an electronic part which may be mounted on and soldered to the surface of a printed circuit board, and a method of mounting such an electronic part. While the electronic part mounted on the circuit board is operation, heat generated by the part is efficiently radiated to the ambience. Connecting terminals extending out from the electronic part are firmly soldered to the circuit board by a minimum of heat, whereby the bonding strength and the strength against shocks are enhanced. The electronic part of interest and other electronic parts neighboring it are free from damage ascriable to heat when the former has connecting terminals thereof soldered to the circuit board. When the connecting terminals of the electronic part are soldered to the circuit board by a laser beam, other electronic parts mounted on the circuit board are prevented from being damaged by the laser beam.

Abstract translation: 的电子部件的结构，其可被安装在和焊接到印刷电路板的表面上，和安装谋求电子部件的方法。 而安装在所述电路板上的电子部件是可操作的，由该部分产生的热量被有效地辐射到周围环境。 连接端子从电子部件延伸出来的由最小的热量，从而使接合强度和抵抗冲击的强度被增强被牢固地焊接到电路板上。 的利息和其他电子部件邻接它的电子部件是从损伤ascriable自由加热时，前者具有连接端子其焊接到所述电路板。 当电子部件的连接端子通过激光束焊接到所述电路板，安装在电路板上的其它电子部件从由所述激光束损坏。

公开(公告)号：EP0130410A2

公开(公告)日：1985-01-09

申请号：EP84106495.9

申请日：1984-06-06

Applicant: NEC CORPORATION

Inventor： Umetsu, Shinjiro ,  Yoshizawa, Shigeo

IPC: H05K1/02 ,  H05K1/18 ,  H03H9/10

CPC classification number: H03H9/1071 ,  H01L2224/48091 ,  H01L2924/16152 ,  H05K1/0243 ,  H05K3/341 ,  H05K3/3415 ,  H05K3/3447 ,  H05K3/3468 ,  H05K2201/09572 ,  H05K2201/1006 ,  H05K2201/10371 ,  H05K2201/10659 ,  H05K2201/10969 ,  H05K2203/045 ,  H05K2203/0455 ,  H05K2203/1147 ,  Y02P70/613 ,  H01L2924/00014

Abstract: The printed circuit board structure mounts a metal package with a circuit component for use in a high-frequency region contained therein. The structure comprises a grounding hole bored partially in an area of the printed circuit board under the metal package and means for connecting the metal package with conductors on the printed circuit board via the grounding hole.
This printed circuit board structure improves the characteristics of the high-frequency components contained in the metal package and minimizes the mounting area for a metal package.

Abstract translation: 印刷电路板结构安装具有用于其中包含的高频区域中的电路部件的金属封装。 该结构包括在金属封装下的印刷电路板的区域中部分地钻孔的接地孔，以及用于经由接地孔将金属封装与印刷电路板上的导体连接的装置。 该印刷电路板结构改善了包含在金属封装中的高频元件的特性，并使金属封装的安装面积最小化。

公开(公告)号：EP0069505A3

公开(公告)日：1985-01-02

申请号：EP82303255

申请日：1982-06-22

Applicant: FUJITSU LIMITED

Inventor： Kanai, Yasunori

IPC: H01L23/14 ,  H01L23/52 ,  H01L23/04

CPC classification number: H05K3/3415 ,  H01L23/055 ,  H01L23/057 ,  H01L23/49827 ,  H01L23/5383 ,  H01L24/48 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/16195 ,  H01L2924/30107 ,  H05K3/3421 ,  H05K3/3447 ,  H05K2201/10659 ,  H05K2201/10689 ,  H05K2201/10704 ,  Y02P70/613 ,  H01L2224/45099 ,  H01L2924/00

Abstract: Connection leads (32, 35) of a semiconductor device extending from a chip carrier housing (31) for connection with external circuitry are arranged in a plurality of rings, one within the other. The leads (32), in the outermost ring, are composed of surface connection leads to be electrically connected to the uppermost layer (41) only of a multilayer printed circuit board (40) and the connecting leads in the inner ring or rings are composed of lead pins (35) to be inserted into and be electrically connected to plated through holes (35) of the multilayer printed circuit board (40) for connection to other layers (43) of the board (40).

公开(公告)号：US12080634B2

公开(公告)日：2024-09-03

申请号：US17756556

申请日：2020-11-25

Applicant: THE NOCO COMPANY

Inventor： James P. McBride ,  James Richard Stanfield

IPC: H05K1/18 ,  H01L23/495 ,  H01M10/42 ,  H01M50/519 ,  H05K1/14 ,  H05K3/34 ,  H01L25/11

CPC classification number: H01L23/49555 ,  H01L23/49562 ,  H01M10/4257 ,  H01M50/519 ,  H05K1/141 ,  H05K1/181 ,  H05K3/3426 ,  H01L25/115 ,  H01M2010/4271 ,  H05K2201/10166 ,  H05K2201/10522 ,  H05K2201/10628 ,  H05K2201/10659 ,  H05K2201/10757 ,  H05K2201/10818 ,  H05K2203/049

Abstract: Provided is a MOSFET device for use with a printed circuit board (PCB) of a battery management system (BMS), the device including a semiconductor body; a metal conductor extending outwardly from a side of the semiconductor body; a plurality of power pins extending outwardly from at least one side of the semiconductor body, the power pins having tips bent downwardly; a gate pin extending outwardly from at least one side of the semiconductor body, wherein the tip of the gate pin is raised or elevated relative to the tips of the power pins so as to avoid electrical contact with the one of the spaced apart copper plates, and wherein the tip of the gate pin is connected to a circuit of the battery management system (BMS).

公开(公告)号：US20240147619A1

公开(公告)日：2024-05-02

申请号：US18406734

申请日：2024-01-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongwan SHIM ,  Bumhee BAE ,  Younho KIM ,  Jeongnam CHEON

IPC: H05K1/11 ,  H05K3/34

CPC classification number: H05K1/111 ,  H05K3/3457 ,  H05K2201/0154 ,  H05K2201/0314 ,  H05K2201/10318 ,  H05K2201/10659 ,  H05K2203/041

Abstract: A substrate structure is provided. The substrate structure includes a first substrate, a plurality of first elastomer pins arranged on the first substrate, an elastic body disposed on the first substrate to surround the plurality of first elastomer pins, the elastic body including a plurality of spaces for receiving a plurality of solder balls on a second substrate connected to the first substrate, and a plurality of solder ball holders arranged on a boundary area of an opening of each of the plurality of spaces, wherein each of the plurality of solder ball holders has strength higher than that of the elastic body, and wherein each of the plurality of solder ball holders includes a plurality of pieces.

公开(公告)号：US20170330827A1

公开(公告)日：2017-11-16

申请号：US15376458

申请日：2016-12-12

Applicant: Digi International Inc.

Inventor： Mike Oliver Rohrmoser ,  Sebastien Joseph Xavier Meyer

IPC: H01L23/498 ,  H05K1/02 ,  H01L23/552 ,  H05K1/11 ,  H05K1/18

CPC classification number: H05K1/183 ,  H01L23/13 ,  H01L23/49805 ,  H01L23/5386 ,  H01L23/552 ,  H05K1/0287 ,  H05K1/111 ,  H05K1/117 ,  H05K1/182 ,  H05K3/3436 ,  H05K3/3442 ,  H05K2201/10159 ,  H05K2201/10659 ,  H05K2201/10719

Abstract: A surface mount module form factor comprises a substrate having a bottom surface, a top surface, and an outer periphery, with at least one electronic component mounted on the substrate, and a plurality of land grid array pads mounted on the bottom surface of the substrate. At least some of the land grid array pads are coupled to the at least one electronic component. A plurality of castellated edge pads are mounted around the outer periphery of the substrate, with at least some of the castellated edge pads coupled to the at least one electronic component. At least some of the land grid array pads are mapped to at least some of the castellated edge pads.

公开(公告)号：US20120155044A1

公开(公告)日：2012-06-21

申请号：US12971862

申请日：2010-12-17

Applicant: David Mulford Shaddock ,  Vinayak Tilak ,  Tan Zhang

Inventor： David Mulford Shaddock ,  Vinayak Tilak ,  Tan Zhang

IPC: H05K7/00 ,  H05K3/10

CPC classification number: H05K3/328 ,  H05K3/4629 ,  H05K2201/10151 ,  H05K2201/10659 ,  H05K2201/10674 ,  Y10T29/49155

Abstract: An apparatus includes a set of first metal contact pads disposed on a low temperature co-fired ceramic substrate. A plurality of metalized interconnectors extend between a digital electronic component and the low temperature co-fired ceramic substrate. The apparatus is configured to operate at a temperature greater than 250 degrees Celsius.

Abstract translation: 一种装置包括设置在低温共烧陶瓷基板上的一组第一金属接触焊盘。 多个金属化互连器在数字电子部件和低温共烧陶瓷基板之间延伸。 该装置被配置为在大于250摄氏度的温度下操作。

公开(公告)号：US08169069B2

公开(公告)日：2012-05-01

申请号：US12513906

申请日：2006-12-05

Applicant: Stanley Job Doraisamy ,  Wae Chet Yong

Inventor： Stanley Job Doraisamy ,  Wae Chet Yong

IPC: H01L21/302

CPC classification number: H05K1/18 ,  H01L23/49541 ,  H01L23/49555 ,  H01L23/49562 ,  H01L2924/0002 ,  H05K1/0263 ,  H05K1/181 ,  H05K2201/10166 ,  H05K2201/10659 ,  H01L2924/00

Abstract: A transistor outline package is provided for a semiconductor integrated device suitable for use in a control module of an automobile for connection between a printed circuit board and a bus bar of such a module. The package includes a package housing, having a first end suitable for mounting to a PCB and which has a width. The package is also formed with a leadframe which includes a heat sink and ground plane blade suitable for connection to a bus bar, a plurality of connector leads suitable for connection to a PCB and at least one source tab lead suitable for connection to a module connector of such a control module. The plurality of connection leads and the source tab lead extend from the first end of the package housing side by side in the direction along and within the width of the first end of the package housing.

Abstract translation: 为适用于汽车的控制模块的半导体集成器件提供晶体管外形封装，用于连接印刷电路板和这种模块的母线。 封装包括封装壳体，其具有适于安装到PCB并具有宽度的第一端。 该封装还形成有引线框架，该引线框架包括适于连接到母线的散热器和接地平面叶片，适合于连接到PCB的多个连接器引线和适于连接到模块连接器的至少一个源极突起引线 的这种控制模块。 多个连接引线和源极突片从包装壳体的第一端沿着包装壳体的第一端的宽度方向并排地延伸。