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    13.
    发明专利
    未知

    公开(公告)号：DE69015878T2

    公开(公告)日：1995-07-13

    申请号：DE69015878

    申请日：1990-03-21

    Applicant: IBM

    Inventor： BREGMAN MARK FIELDING ,  BUCHWALTER STEPHEN LESLIE ,  HERMANN KARL ,  KOVAC CAROLINE ANN ,  POORE PAIGE ADAMS ,  VIEHBECK ALFRED

    IPC: H01L23/538 ,  H05K1/02 ,  H05K1/05 ,  H05K1/14 ,  H05K3/32 ,  H05K3/42 ,  H05K3/44 ,  H05K3/46 ,  H05K1/00

    Abstract: Structure for mounting electronic devices thereon. The structure is fabricated from a plurality of substrates (4, 6, 8, 10) each having a thermally and/or electrically conductive core (12) surrounded by a dielectric material (13). The substrates can be adherently placed together with the electrically conductive cores providing ground and power planes or the substrates can be mounted together with connectors (42) electrically interconnecting adjacent substrates and spacing the adjacent substrates apart providing a space through which a fluid can flow to extract heat generated by the electronic devices mounted thereon. The conductive cores provide both power and ground planes to the structure and a means for thermally dissipating the generated heat.

    14.
    发明专利
    未知

    公开(公告)号：BR9400335A

    公开(公告)日：1994-08-16

    申请号：BR9400335

    申请日：1994-01-26

    Applicant: IBM

    Inventor： FRANKENY JEROME ALBERT ,  FRANKENY RICHARD FRANCIS ,  HERMANN KARL ,  IMKEN RONALD LANN

    IPC: G06F1/18 ,  H01L23/538 ,  H05K1/11 ,  H05K1/18 ,  H05K3/00 ,  H05K3/36 ,  H01L27/10 ,  H01L21/56

    Abstract: Discrete computational elements are provided that will be connected to a base unit, and to one another or I/O devices, in order to configure a particular computer system. The base unit provides the electrical power required to energize the computational elements. A plurality of identically configured substrates are joined in a layered relation and are electrically connected with one another. These substrates are capable of being fabricated of different lengths such that they can extend outwardly from the computational element and may be connected to other computational elements. At least one integrated circuit will be placed on one side of the joined substrates and is electrically connected to each substrate layer. In this manner the ICs will be able to communicate with chips on other computational elements. A support member is also included that stiffens the plural substrate layers and independently distributes electrical power through voltage and ground potential planes, and interconnected substrate layers, to the chips. The support member will be disposed adjacent the substrate layers on a side opposite the ICs and independently attachable to the base unit by using electrical connection pins, a pluggable lip portion, or the like.

    15.
    发明专利
    未知

    公开(公告)号：DE69112134T2

    公开(公告)日：1996-05-02

    申请号：DE69112134

    申请日：1991-05-01

    Applicant: IBM

    Inventor： HAJ-ALI-AHMADE JAVAD ,  FRANKENY RICHARD FRANCIS ,  HERMANN KARL

    IPC: H01L23/473 ,  H01L23/40 ,  H01L23/42 ,  H01L23/433 ,  H01L25/00 ,  H01L25/065 ,  H05K5/00 ,  H05K7/02 ,  H01L25/10

    Abstract: An electronic circuit packaging module (12) includes a lower substrate, (16), an upper cooling unit (18) and a frame (12) disposed therebetween. The substrate (16) carries a plurality of integrated circuit chips (26) with lead-outs to a plurality of downwardly protruding dimpled contact points (50) disposed about the substrate periphery. The frame (12) includes a plurality of insulative inserts (14) about its periphery having conductive pins (34) each with a lower extension (38) extending below the insert and an upper contact point (36) recessed within the insert. The cooling unit (18) includes a plurality of fluid bags (22) each in contact with a respective chip (26) on the substrate (16) for thermal management. A plurality of such modules (10) are stacked in vertical registry whereby each downwardly protruding dimple (50) of a module (10) extends into a respective insert recess (36) of an adjacent module (10) therebelow. Electrical contactis thus effected between the respective dimples (50) on the lower surface of the upper module (10) and respective upper contact points of the recessed pins (36) on the upper surface of the cover module. (10).

    18.
    发明专利
    未知

    公开(公告)号：DE69112134D1

    公开(公告)日：1995-09-21

    申请号：DE69112134

    申请日：1991-05-01

    Applicant: IBM

    Inventor： HAJ-ALI-AHMADE JAVAD ,  FRANKENY RICHARD FRANCIS ,  HERMANN KARL

    IPC: H01L23/473 ,  H01L23/40 ,  H01L23/42 ,  H01L23/433 ,  H01L25/00 ,  H01L25/065 ,  H05K5/00 ,  H05K7/02 ,  H01L25/10

    Abstract: An electronic circuit packaging module (12) includes a lower substrate, (16), an upper cooling unit (18) and a frame (12) disposed therebetween. The substrate (16) carries a plurality of integrated circuit chips (26) with lead-outs to a plurality of downwardly protruding dimpled contact points (50) disposed about the substrate periphery. The frame (12) includes a plurality of insulative inserts (14) about its periphery having conductive pins (34) each with a lower extension (38) extending below the insert and an upper contact point (36) recessed within the insert. The cooling unit (18) includes a plurality of fluid bags (22) each in contact with a respective chip (26) on the substrate (16) for thermal management. A plurality of such modules (10) are stacked in vertical registry whereby each downwardly protruding dimple (50) of a module (10) extends into a respective insert recess (36) of an adjacent module (10) therebelow. Electrical contactis thus effected between the respective dimples (50) on the lower surface of the upper module (10) and respective upper contact points of the recessed pins (36) on the upper surface of the cover module. (10).

    20.
    发明专利
    未知

    公开(公告)号：DE69015878D1

    公开(公告)日：1995-02-23

    申请号：DE69015878

    申请日：1990-03-21

    Applicant: IBM

    Inventor： BREGMAN MARK FIELDING ,  BUCHWALTER STEPHEN LESLIE ,  HERMANN KARL ,  KOVAC CAROLINE ANN ,  POORE PAIGE ADAMS ,  VIEHBECK ALFRED

    IPC: H01L23/538 ,  H05K1/02 ,  H05K1/05 ,  H05K1/14 ,  H05K3/32 ,  H05K3/42 ,  H05K3/44 ,  H05K3/46 ,  H05K1/00

    Abstract: Structure for mounting electronic devices thereon. The structure is fabricated from a plurality of substrates (4, 6, 8, 10) each having a thermally and/or electrically conductive core (12) surrounded by a dielectric material (13). The substrates can be adherently placed together with the electrically conductive cores providing ground and power planes or the substrates can be mounted together with connectors (42) electrically interconnecting adjacent substrates and spacing the adjacent substrates apart providing a space through which a fluid can flow to extract heat generated by the electronic devices mounted thereon. The conductive cores provide both power and ground planes to the structure and a means for thermally dissipating the generated heat.

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