公开(公告)号：DE10332600B3

公开(公告)日：2005-04-14

申请号：DE10332600

申请日：2003-07-17

Applicant: INFINEON TECHNOLOGIES AG

Inventor： POPP MARTIN ,  TEMMLER DIETMAR

IPC: H01L21/60 ,  H01L21/768 ,  H01L21/8234 ,  H01L21/283 ,  H01L21/336

Abstract: An electrically conductive contact can be used to connect an integrated component to an interconnect. A sacrificial layer is deposited on a liner and planarized until a surface of the integrated component is uncovered. The sacrificial layer is patterned to define the later contacts. The layer is covered in a partial region above contact connection regions. An interlevel insulator is deposited and patterned, so that the sacrificial layer can then be stripped out from the partial region. After the removal of the liner, a conductive layer is deposited into the cavity formed as a result of the stripping-out process on the uncovered contact connection regions and optionally into trenches formed at the outset within the interlevel insulator.

公开(公告)号：DE10314595A1

公开(公告)日：2004-10-21

申请号：DE10314595

申请日：2003-03-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： POPP MARTIN ,  HEINECK LARS

IPC: H01L21/8234 ,  H01L21/8239 ,  H01L21/8242 ,  H01L27/108 ,  H01L21/8238

Abstract: Production of transistors (3,3') of different conductivity type in the first section of a surface of a semiconductor substrate (10) comprises forming a gate electrode layer (12) of first conductivity type doping on the substrate, producing gate structures (5) assigned to the transistors, forming a spacer structure and a covering structure to encapsulate the gate structures, using the encapsulated gate structures as masks and/or conducting structures for the self-adjusting contact of the transistors in a first section of the substrate, applying a protective layer (14) in the region of the first section, opening encapsulated gate structures by selectively removing the covering structures so that a part of the gate electrodes (7) of the gate structures is exposed, doping the gate electrode and the assigned source/drain regions (6,6') of the transistors with a dopant of second conductivity type.

公开(公告)号：DE10255846A1

公开(公告)日：2004-04-01

申请号：DE10255846

申请日：2002-11-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MANGER DIRK ,  POPP MARTIN

IPC: H01L21/336 ,  H01L21/8242 ,  H01L29/78

Abstract: Production of trench capacitor comprises: providing trench (5) in substrate (1) using hard masks (2,3); providing capacitor dielectric (30) and conducting filling (20) in lower and middle trench; implanting nitrogen ions in trench to change oxidation properties of partial regions of filling upper side and exposed substrate surface, and forming oxide layer on non-implanted partial regions; filling trench with conducting filling. Production of a trench capacitor in a substrate (1) comprises: (i) providing a trench (5) in the substrate using hard masks (2, 3); (ii) providing a capacitor dielectric (30) and an electrically conducting filling (20) in the lower and middle trench region; (iii) implanting nitrogen ions in the trench using the hard masks to change the oxidation properties of a partial region (200) of the upper side of the filling and a partial region of a surface region of the substrate exposed in the upper trench region; (iv) forming an oxide layer on the non-implanted partial region of the upper surface of the filling and on the non-implanted partial region of the exposed surface region of the substrate; and (v) filling the trench with a conducting filling to form a connecting region. An Independent claim is also included for an alternative process for the production of the trench capacitor in a substrate.

公开(公告)号：DE10212914A1

公开(公告)日：2003-10-16

申请号：DE10212914

申请日：2002-03-22

Applicant: INFINEON TECHNOLOGIES AG

Inventor： POPP MARTIN ,  SCHLOESSER TILL ,  LUETZEN JOERN

IPC: H01L21/285 ,  H01L21/60 ,  H01L21/768 ,  H01L21/8242 ,  H01L21/283 ,  H01L21/8239

公开(公告)号：DE10038728A1

公开(公告)日：2002-02-21

申请号：DE10038728

申请日：2000-07-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GOEBEL BERND ,  LUETZEN JOERN ,  POPP MARTIN ,  SEIDL HARALD

IPC: H01L21/8242 ,  H01L27/108

Abstract: A semiconductor memory cell configuration includes dynamic memory cells respectively having a trench capacitor and a vertical selection transistor, the memory cells being disposed in matrix form, the trench capacitors and the associated vertical selection transistors following one another in each case in the form of rows and/or columns.

公开(公告)号：DE102005036561B3

公开(公告)日：2007-02-08

申请号：DE102005036561

申请日：2005-08-03

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HEINECK LARS ,  POPP MARTIN

IPC: H01L21/8242

Abstract: A connecting structure connects a storage electrode of a trench capacitor and a selection transistor that are at least partially formed in a semiconductor substrate. The connecting structure includes a portion of an intermediate layer disposed adjacent to a surface of the storage electrode, and an electrically conducting material disposed adjacent to the intermediate layer and electrically connected to a semiconductor substrate surface portion adjacent to the selection transistor, wherein a part of the connecting structure is disposed above the semiconductor substrate surface so as to be adjacent to a horizontal substrate surface portion.

公开(公告)号：DE10131237B8

公开(公告)日：2006-08-10

申请号：DE10131237

申请日：2001-06-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： TEMMLER DIETMAR ,  RICHTER FRANK ,  POPP MARTIN ,  WICH-GLASEN ANDREAS

IPC: H01L29/78 ,  H01L21/336 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/06

Abstract: A transistor is provided which advantageously utilizes a part of the area which, in conventional transistors, is provided for the isolation between the transistors. In this case, the channel width can be enlarged in a self-aligned manner without the risk of short circuits. The field-effect transistor according to the invention has the advantage that it is possible to ensure a significant increase in the effective channel width for the forward current ION compared with previously used, conventional transistor structures, without having to accept a reduction of the integration density that can be attained. Thus, by way of example, the forward current I ON can be increased by up to 50%, without having to alter the arrangement of the active regions or of the trench isolation.

公开(公告)号：DE10202139B4

公开(公告)日：2006-07-13

申请号：DE10202139

申请日：2002-01-21

Applicant: INFINEON TECHNOLOGIES AG

Inventor： POPP MARTIN ,  TEMMLER DIETMAR

IPC: H01L27/108 ,  H01L21/8242 ,  H01L23/48

Abstract: A memory cell in a substrate (105) comprises a select transistor (160) and connected trench capacitor (110) surrounded by an second isolation layer (150). A first adjacent isolation layer (235) is thinner than the second layer but prevents lateral current flow, although the formation of a parasitic FET through cell operation is possible. An Independent claim is also included for a memory chip as above.

公开(公告)号：DE10329212B4

公开(公告)日：2006-07-06

申请号：DE10329212

申请日：2003-06-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： POPP MARTIN

IPC: H01L21/8242 ,  H01L21/762 ,  H01L21/8238

公开(公告)号：DE10131675B4

公开(公告)日：2005-04-07

申请号：DE10131675

申请日：2001-06-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： LINDOLF JUERGEN ,  POPP MARTIN ,  SELL BERNHARD

IPC: G01R27/26 ,  G11C29/50 ,  G11C29/00 ,  G01R31/26 ,  G11C11/4076

Abstract: A ring oscillator has a multiplicity of inverters. An interconnect is connected between two of the inverters, and a storage capacitor to be measured, with its associated lead resistor, is coupled to the interconnect either via an interconnect or a transistor can selectively coupled and decouple the capacitor and the lead resistance. A measuring device is connected up to the ring oscillator and is used to determine a value for the oscillation frequency of the ring oscillator on the basis of which a value for the time constant of the storage capacitor can be determined.