公开(公告)号：GB2481563A

公开(公告)日：2011-12-28

申请号：GB201118724

申请日：2009-12-22

Applicant: INTEL CORP

Inventor： MCKEEN FRANCIS X ,  ROZAS CARLOS V ,  SAVAGANKAR UDAY R ,  JOHNSON SIMON P ,  SCARLATA VINCENT R ,  GOLDSMITH MICHAEL A ,  BRICKELL ERNIE ,  LI JIANG TAO ,  HERBERT HOWARD C ,  DEWAN PRASHANT ,  TOLOPKA STEPHEN J ,  NEIGER GILBERT ,  DURHAM DAVID ,  GRAUNKE GARY ,  LINT BERNARD J ,  DYKE DON A VAN ,  CIHULA JOSEPH ,  JEYASINGH STALINSELVARAJ ,  DOREN STEPHEN R VAN ,  RODGERS DION ,  GARNEY JOHN I

IPC: G06F9/44 ,  G06F12/02 ,  G06F12/14 ,  G06F13/14 ,  G06F21/72 ,  G06F21/74

Abstract: A technique to enable secure application and data integrity within a computer system. In one embodiment, one or more secure enclaves are established in which an application and data may be stored and executed.

公开(公告)号：EP3049992A4

公开(公告)日：2017-05-03

申请号：EP14849831

申请日：2014-09-16

Applicant: INTEL CORP

Inventor： CHHABRA SIDDHARTHA ,  SAVAGAONKAR UDAY R ,  GOLDSMITH MICHAEL A ,  JOHNSON SIMON P ,  LESLIE-HURD REBEKAH M ,  MCKEEN FRANCIS X ,  NEIGER GILBERT ,  MAKARAM RAGHUNANDAN ,  ROZAS CARLOS V ,  SANTONI AMY L ,  SCARLATA VINCENT R ,  SHANBHOGUE VEDVYAS ,  SMITH WESLEY H ,  ANATI ITTAI ,  ALEXANDROVICH ILYA

IPC: G06F21/79 ,  G06F12/14

CPC classification number: G06F12/1408 ,  G06F9/45558 ,  G06F12/0808 ,  G06F12/0897 ,  G06F12/1027 ,  G06F2009/45587 ,  G06F2212/1032 ,  G06F2212/1048 ,  G06F2212/152

Abstract: Secure memory repartitioning technologies are described. A processor includes a processor core and a memory controller coupled between the processor core and main memory. The main memory includes a memory range including a section of convertible pages that are convertible to secure pages or non-secure pages. The processor core, in response to a page conversion instruction, is to determine from the instruction a convertible page in the memory range to be converted and convert the convertible page to be at least one of a secure page or a non-secure page. The memory range may also include a hardware reserved section that is convertible in response to a section conversion instruction.

Abstract translation: 描述了安全内存重新分区技术。 处理器包括处理器核心和耦合在处理器核心与主存储器之间的存储器控​​制器。 主存储器包括一个存储器范围，包括一部分可转换页面可转换为安全页面或非安全页面。 响应于页面转换指令，处理器核心根据指令确定要转换的存储器范围中的可转换页面并将可转换页面转换为安全页面或非安全页面中的至少一个。 存储器范围还可以包括响应于区段转换指令而可转换的硬件保留区段。

公开(公告)号：EP3025268A4

公开(公告)日：2017-03-01

申请号：EP14829860

申请日：2014-07-15

Applicant: INTEL CORP

Inventor： SCARLATA VINCENT R ,  ROZAS CARLOS V ,  JOHNSON SIMON P ,  SAVAGAONKAR UDAY R ,  ANATI ITTAI ,  MCKEEN FRANCIS X ,  GOLDSMITH MICHAEL A

IPC: G06F21/00 ,  G06F9/06

CPC classification number: H04L9/3213 ,  G06F21/12 ,  G06F21/53 ,  H04L9/3263

Abstract: Embodiments of an invention for feature licensing in a secure processing environment are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive an instruction to initialize a secure enclave. The execution unit is to execute the instruction. Execution of the instruction includes determining whether a requested feature is licensed for use in the secure enclave.

Abstract translation: 公开了在安全处理环境中的特征许可的发明的实施例。 在一个实施例中，处理器包括指令单元和执行单元。 指令单元将接收初始化安全飞地的指令。 执行单元执行指令。 指令的执行包括确定请求的特征是否被许可用于安全飞地。